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* virgl,vtest: Initialize return valueGert Wollny2018-11-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Avoids: Conditional jump or move depends on uninitialised value(s) at 0x9E2B39F: virgl_vtest_winsys_resource_cache_create (virgl_vtest_winsys.c:379) by 0x9E2725F: virgl_buffer_create (virgl_buffer.c:169) by 0x9E246D5: virgl_resource_create (virgl_resource.c:60) by 0xA0C1B9F: bufferobj_data (st_cb_bufferobjects.c:344) by 0xA0C1B9F: st_bufferobj_data (st_cb_bufferobjects.c:390) by 0x9F4ACE3: vbo_use_buffer_objects (vbo_exec_api.c:1136) by 0xA0C68C3: st_create_context_priv (st_context.c:416) by 0xA0C707A: st_create_context (st_context.c:598) by 0x9F81C6B: st_api_create_context (st_manager.c:918) by 0x9BBE591: dri_create_context (dri_context.c:161) by 0x9BB6931: driCreateContextAttribs (dri_util.c:473) by 0x4E97A44: drisw_create_context_attribs (drisw_glx.c:630) by 0x4E7C591: glXCreateContextAttribsARB (create_context.c:78) Uninitialised value was created by a stack allocation at 0x9E2B249: virgl_vtest_winsys_resource_cache_create (virgl_vtest_winsys.c:342) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Robert Foss <[email protected]>
* intel/compiler: fix register allocation in opt_peephole_selIago Toral Quiroga2018-11-281-2/+1
| | | | | | This wasn't handling 64-bit cases properly. Found by inspection. Reviewed-by: Ian Romanick <[email protected]>
* glsl: Remove unused member variableMatt Turner2018-11-271-4/+0
| | | | Reviewed-by: Tapani Pälli <[email protected]>
* nir: Call fflush() at the end of nir_print_shader()Matt Turner2018-11-271-0/+1
| | | | | | | | We normally call with stderr which is unbuffered, so this won't affect that, but it does let me call nir_print_shader(nir, fopen("log", "w+")) from gdb and actually get the whole shader in my file. Reviewed-by: Tapani Pälli <[email protected]>
* v3d: Add renderonly support.Eric Anholt2018-11-276-5/+77
| | | | | | I've been using this with the kmsro series to test v3d on VKMS without my old KMS hack in the v3d kernel driver. KMSRO still needs some cleanup, but v3d RO support seems reasonable.
* gallium: Remove unused variable in u_tests.Eric Anholt2018-11-271-1/+0
| | | | | Fixes: 0d17b685b1ff ("gallium/u_tests: add a compute shader test that clears an image") Reviewed-by: Marek Olšák <[email protected]>
* radv: Align large buffers to the fragment size.Bas Nieuwenhuizen2018-11-271-1/+5
| | | | | | | | | | | | | | | | Improves performance in Talos by about 15% (and significant improvements in RotR and possibly other but did not bench with final patch) on kernel 4.19 and earlier. On 4.20+ a similar effect comes from 433ca054949a "drm/amdgpu: try allocating VRAM as power of two" v2: Do not impact the alignment of the physical memory. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> CC: <[email protected]>
* freedreno: implements get_sample_positionHyunjun Ko2018-11-271-0/+45
| | | | | | | | | | Since 1285f71d3e landed, it needs to provide apps with proper sample position for MSAA. Currently no way to query this to hw, these are taken from blob driver. Fixes: dEQP-GLES31.functional.texture.multisample.samples_#.sample_position Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: also set FSSUPERTHREADENABLERob Clark2018-11-271-0/+1
| | | | | | | | | | We set equiv bit in SP_FS_CTRL_REG0. Somehow the hw doesn't hang with this mismatched config, but does run slower. It is faster with either neither bit set, or both bits set, but both is the fastest of the three configurations. Worth a bit over 10% gain in glmark2. Spotted-by: Jonathan Marek <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno: use MSM_BO_SCANOUT with scanout buffersJonathan Marek2018-11-273-1/+7
| | | | Signed-off-by: Jonathan Marek <[email protected]>
* freedreno: use GENERIC instead of TEXCOORD for blit programJonathan Marek2018-11-271-1/+1
| | | | | | | blip_fp uses GENERIC as input, so blit_vp should match for linking Signed-off-by: Jonathan Marek <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno: a2xx texture updateJonathan Marek2018-11-279-20/+212
| | | | | | | | | | | Adds all missing texture related logic. For everything to work it also needs changes to ir2/fd2_program, which are part of the ir2 update patch. Note: it needs rnndb update Signed-off-by: Jonathan Marek <[email protected]> [remove stray patch] Signed-off-by: Rob Clark <[email protected]>
* freedreno/a2xx: Compute depth base in gmem correctlyJonathan Marek2018-11-271-5/+7
| | | | | | | | Note: it needs rnndb update Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Jonathan Marek <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a2xx: set VIZ_QUERY_ID on a20xJonathan Marek2018-11-271-0/+5
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno: add missing a20x idsJonathan Marek2018-11-271-0/+2
| | | | | | | | 200: 256KiB GMEM A200 (imx53) 201: 128KiB GMEM A200 (imx51) Signed-off-by: Jonathan Marek <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a2xx: fix POINT_MINMAX_MAX overflowJonathan Marek2018-11-271-1/+1
| | | | | | | As it stands, it overflows to zero. Signed-off-by: Jonathan Marek <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno: a2xx: fd2_draw updateJonathan Marek2018-11-276-20/+114
| | | | | Signed-off-by: Jonathan Marek <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* nir: add fceil loweringJonathan Marek2018-11-272-0/+4
| | | | | | | | | lowers ceil(x) as -floor(-x) Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2018-11-277-39/+287
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: set guardband clipRob Clark2018-11-274-7/+57
| | | | | | | | | On older gens, the CLIP_ADJ bitfields were actually 3.6 fixed point. Which might make more sense. Although this formula comes up with values pretty close to what blob does for various viewport sizes (for at least a5xx and a6xx), and seems to work. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: disable LRZ for z32Rob Clark2018-11-271-1/+13
| | | | | | | | | f6131d4ec7a had the side effect of enabling LRZ w/ 32b depth buffers. But there are some bugs with this, which aren't fully understood yet, so for now just skip LRZ w/ z32.. Fixes: f6131d4ec7a freedreno/a6xx: Clear z32 and separate stencil with blitter Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: Clear gmem buffers at flush timeKristian H. Kristensen2018-11-274-178/+180
| | | | | | | | | We generate an IB to clear the gmem at flush time and jump to it before rendering each tile. This lets us get rid of the command stream patching for gmem offsets. Signed-off-by: Kristian H. Kristensen <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: Move resolve blits to an IBKristian H. Kristensen2018-11-273-8/+29
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a6xx: Move restore blits to IBKristian H. Kristensen2018-11-273-19/+49
| | | | | Signed-off-by: Kristian H. Kristensen <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* mesa/st: better colormask check for clear fallbackRob Clark2018-11-271-2/+8
| | | | | | | | | For RGB surfaces (for example) we don't really care that the colormask is 0x7 instead of 0xf. This should not trigger clear_with_quad() slowpath. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/st: swap order of clear() and clear_with_quad()Rob Clark2018-11-271-3/+3
| | | | | | | | | | | If we can't clear all the buffers with pctx->clear() (say, for example, because of ColorMask), push the buffers we *can* clear with pctx->clear() first. Tilers want to see clears coming before draws to enable fast- paths, and clearing one of the attachments with a quad-draw first confuses that logic. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno: move ir3 to common locationRob Clark2018-11-2744-110/+145
| | | | | | | | | | | | | | | | Move (most of) the ir3 compiler to src/freedreno/ir3 so that it can be re-used by some future vulkan driver. The parts that are gallium specific have been refactored out and remain in the gallium driver. Getting the move done now so that it can happen before further refactoring to support a6xx specific instructions. NOTE also removes ir3_cmdline compiler tool from autotools build since that was easier than fixing it and I normally use meson build. Waiting patiently for the day that we can remove *everything* from the autotools build. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: remove u_inlines usageRob Clark2018-11-271-10/+10
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: split up ir3_shaderRob Clark2018-11-2714-667/+766
| | | | | | | Split the parts that are gallium specific into ir3_gallium so the rest can move to a common location outside of gallium. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: remove pipe_stream_output_info dependencyRob Clark2018-11-278-17/+68
| | | | | | | | A bit annoying to have to copy into our own struct. But this is something the compiler really needs to know, at least on earlier generations where streamout is implemented in shader. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: some header file cleanupRob Clark2018-11-2711-26/+24
| | | | | | Clean up some of the low-hanging-fruit usages of freedreno_util.h Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: use env_var_as_unsigned()Rob Clark2018-11-272-14/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* util: env_var_as_unsigned() helperRob Clark2018-11-272-0/+22
| | | | | | | So I can drop env2u() helper from freedreno_util.h and get rid of one small ir3 dependency on gallium/freedreno Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: move disasm and optmsgs debug flagsRob Clark2018-11-279-22/+25
| | | | | | | Move them to IR3_SHADER_DEBUG so we can remove ir3's dependency on fd_mesa_debug. Signed-off-by: Rob Clark <[email protected]>
* freedreno: FD_SHADER_DEBUG -> IR3_SHADER_DEBUGRob Clark2018-11-274-33/+34
| | | | | | Only used by ir3, so move it into ir3 to be more self contained. Signed-off-by: Rob Clark <[email protected]>
* freedreno: remove shader_stage_name()Rob Clark2018-11-273-21/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: shader_t -> gl_shader_stageRob Clark2018-11-2722-143/+121
| | | | | | | | | Just massive search/replace for the most part. Step towards removing ir3 dependency on disasm.h which is shared by a2xx. One step closer to being able to move ir3 out of gallium. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: standalone compiler updatesRob Clark2018-11-271-6/+27
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: move drm to common locationRob Clark2018-11-2729-44/+176
| | | | | | | | So that we can re-use at least parts of it for vulkan driver, and so that we can move ir3 to a common location (which uses fd_bo to allocate storage for shaders) Signed-off-by: Rob Clark <[email protected]>
* freedreno/drm: remove dependency on gallium driverRob Clark2018-11-271-2/+11
| | | | | | | | Prep work to move drm to a common location. Slightly hacky, but the softpin debug flag is only temporary. Signed-off-by: Rob Clark <[email protected]>
* util: promote u_memory to src/utilDylan Baker2018-11-2713-18/+12
| | | | | as well as os_memory* Reviewed-by: Rob Clark <[email protected]>
* gallium: Fix uninitialized variable warning in compute test.Eric Anholt2018-11-271-1/+1
| | | | | | | The compiler doesn't know that ny != 0, so x might be uninitialized for the printf at the end. Reviewed-by: Elie Tournier <[email protected]>
* radv: Clamp gfx9 image view extents to the allocated image extents.Bas Nieuwenhuizen2018-11-271-4/+2
| | | | | | | | | | | Mirrors AMDVLK. Looks like if we go over the alignment of height we actually start to change the addressing. Seems like the extra miplevels actually work with this. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108245 Fixes: f6cc15dccd5 "radv/gfx9: fix block compression texture views. (v2)" Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* intel/compiler: fix indentation style in opt_algebraic()Iago Toral Quiroga2018-11-271-10/+10
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* anv/icl: Set use full ways in L3CNTLREGAnuj Phogat2018-11-262-0/+2
| | | | | | | | L3 allocation table in h/w specification recommends using 4 KB granularity for programming allocation fields in L3CNTLREG. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* intel/icl: Set way_size_per_bank to 4Anuj Phogat2018-11-261-1/+2
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/icl: Set use full ways in L3CNTLREGAnuj Phogat2018-11-262-0/+2
| | | | | | | | L3 allocation table in h/w specification recommends using 4 KB granularity for programming allocation fields in L3CNTLREG. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/icl: Fix L3 configurationsAnuj Phogat2018-11-261-6/+6
| | | | | | | | | | Use L3 configuration specified in h/w specification. V2: Drop configs which do under allocation of l3 cache. Bump up the comment above table. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* build: stop defining unused VERSIONEric Engestrom2018-11-262-3/+1
| | | | | | | | | | | | | Scons and autotools don't define it, and as of last commit nothing uses it. `VERSION` is also a generic enough name that something somewhere will eventually clash, and we don't want to repeat the LLVM `DEBUG` fiasco. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* vulkan/utils: s/VERSION/PACKAGE_VERSION/Eric Engestrom2018-11-261-3/+3
| | | | | | | | | | | Everything else uses PACKAGE_VERSION, so let's be consistent, and VERSION and PACKAGE_VERSION are currently defined to be the same in meson and android, while VERSION is undefined in autotools and scons. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
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