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* Update version to 17.3.0-rc5mesa-17.3.0-rc5Emil Velikov2017-11-201-1/+1
| | | | Signed-off-by: Emil Velikov <[email protected]>
* i965: Revert Gen8 aspect of VF PIPE_CONTROL workaround.Kenneth Graunke2017-11-181-1/+5
| | | | | | | | This apparently causes hangs on Broadwell, so let's back it out for now. I think there are other PIPE_CONTROL workarounds that we're missing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103787 (cherry picked from commit a01ba366e01b7d1cdfa6b0e6647536b10c0667ef)
* anv/cmd_buffer: Take bo_offset into account in fast clear state addressesJason Ekstrand2017-11-171-1/+1
| | | | | | | | | Otherwise, if the image is not bound to the start of the buffer, we're going to be reading and writing its fast clear state in the wrong spot. Reviewed-by: Lionel Landwerlin <[email protected]> Cc: [email protected] (cherry picked from commit a07f7b26198ce0f5c8799481a673754968ac5daf)
* anv/cmd_buffer: Advance the address when initializing clear colorsJason Ekstrand2017-11-171-3/+6
| | | | | | | | | Found by inspection Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Nanley Chery <[email protected]> Cc: [email protected] (cherry picked from commit a6cc361e5fd2450249847d5ee8093d26ed7ff545)
* i965/gen8+: Fix the number of dwords programmed in MI_FLUSH_DWAnuj Phogat2017-11-172-5/+17
| | | | | | | | | | | | | Number of dwords in MI_FLUSH_DW changed from 4 to 5 in gen8+. Signed-off-by: Anuj Phogat <[email protected]> Cc: <[email protected]> (cherry picked from commit 1dc45d75bb3ff3085f7356b8ec658111529ff76d) [Emil Velikov: trivial conflicts] Signed-off-by: Emil Velikov <[email protected]> Conflicts: src/mesa/drivers/dri/i965/intel_blit.c
* i965: Program DWord Length in MI_FLUSH_DWAnuj Phogat2017-11-173-3/+3
| | | | | | | | | | | | | | | | | Signed-off-by: Anuj Phogat <[email protected]> Cc: <[email protected]> (cherry picked from commit 6165fda59b889de035b38d9a1a08ffe0da19e6a6) Squashed with: i965: Remove DWord length from MI_FLUSH_DW definition Fixes: 6165fda59b8 ("i965: Program DWord Length in MI_FLUSH_DW") Cc: <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Nanley Chery <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 822fd2341db49cbbe813114d2d0fc1b66de4807c)
* meson: explicitly disable the build system for 17.3.xEmil Velikov2017-11-171-0/+2
| | | | | | | | | | | | | This build system is rather incomplete in the 17.3 branch, with multiple bugs and user facing changes already addressed in master. It's not shipped in the tarball and we don't want to receive bug reports about 17.3, 18.0 is the release that I hope to have the meson build in shape for. Simply error() out, if anyone tries to use it. Signed-off-by: Emil Velikov <[email protected]>
* Revert "intel/fs: Use a pure vertical stride for large register strides"Matt Turner2017-11-171-13/+3
| | | | | | | | | This reverts commit e8c9e65185de3e821e1e482e77906d1d51efa3ec. With the actual bug fixed (by commit 6ac2d1690192), this is not necessary. I'm doubtful of its correctness in any case. (cherry picked from commit a31d0382084c8aa860ffcef9b12592c5c44e192f)
* i965/fs: Split all 32->64-bit MOVs on CHV, BXT, GLKMatt Turner2017-11-171-4/+4
| | | | | | | | | Fixes the following tests on CHV, BXT, and GLK: KHR-GL46.shader_ballot_tests.ShaderBallotFunctionBallot dEQP-VK.spirv_assembly.instruction.compute.uconvert.uint32_to_int64 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103115 (cherry picked from commit cfcfa0b9cd1b1d563a988b1250950057c4612ac9)
* i965/fs: Fix extract_i8/u8 to a 64-bit destinationMatt Turner2017-11-171-2/+23
| | | | | | | | | | | | | | | | | The MOV instruction can extract bytes to words/double words, and words/double words to quadwords, but not byte to quadwords. For unsigned byte to quadword, we can read them as words and AND off the high byte and extract to quadword in one instruction. For signed bytes, we need to first sign extend to word and the sign extend that word to a quadword. Fixes the following test on CHV, BXT, and GLK: KHR-GL46.shader_ballot_tests.ShaderBallotBitmasks Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103628 Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 6ac2d16901927013393f873a34c717ece5014c1a)
* tgsi/exec: fix LDEXP in softpipeNicolai Hähnle2017-11-171-1/+1
| | | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103128 Fixes: cad959d90145 ("gallium: add LDEXP TGSI instruction and corresponding cap") Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit f3fa3b0d95c712c00318ca5601433bce1b82432d)
* egl/wayland: Add a fallback when fourcc query isn't supportedDerek Foreman2017-11-171-2/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When queryImage doesn't support __DRI_IMAGE_ATTRIB_FOURCC wayland clients will die with a NULL derefence in wl_proxy_add_listener. Attempt to provide a simple fallback to keep ancient systems working. Fixes: 6595c699511 ("egl/wayland: Remove more surface specifics from create_wl_buffer") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103519 Signed-off-by: Derek Foreman <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Acked-by: Daniel Stone <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit 0db36caa192b129cb4f22d152f82f38fcf6f06d4) Squashed with: egl: fix var type queryImage() takes an `int*`; compiler is warning about the signed<->unsigned pointer mismatch. Fixes: 0db36caa192b129cb4f2 "egl/wayland: Add a fallback when fourcc query isn't supported" Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Frank Binns <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Derek Foreman <[email protected]> (cherry picked from commit ca95d7ad4e1b900eb3d559ed5bda0b96b232961d)
* radv: Free temporary syncobj after waiting on it.Bas Nieuwenhuizen2017-11-171-4/+18
| | | | | | | | Otherwise we leak it. Fixes: eaa56eab6da "radv: initial support for shared semaphores (v2)" Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit 7c255788637b8fdfc31aca5f7891f39a110c5cb2)
* radv: Free syncobj with multiple imports.Bas Nieuwenhuizen2017-11-171-2/+8
| | | | | | | | | Otherwise we can leak the old syncobj. Fixes: eaa56eab6da "radv: initial support for shared semaphores (v2)" Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> (cherry picked from commit 917d3b43f2b206ccf036542aa1c39f1dbdd84f62)
* loader/dri3: Improve dri3 thread-safetyThomas Hellstrom2017-11-172-18/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | It turned out that with recent changes that call into dri3 from glFinish(), it appears like different thread end up waiting for X events simultaneously, causing deadlocks since they steal events from eachoter and update the dri3 counters behind eachothers backs. This patch intends to improve on that. It allows at most one thread at a time to wait on events for a single drawable. If another thread intends to do the same, it's put to sleep until the first thread finishes waiting, and then it rechecks counters and optionally retries the waiting. Threads that poll for X events never pulls X events off the event queue if there are other threads waiting for events on that drawable. Counters in the dri3 drawable structure are protected by a mutex. Finally, the mutex we introduce is never held while waiting for the X server to avoid unnecessary stalls. This does not make dri3 drawables completely thread-safe but at least it's a first step. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102358 Fixes: d5ba75f8881 "st/dri2 Plumb the flush_swapbuffer functionality through to dri3" Signed-off-by: Thomas Hellstrom <[email protected]> Acked-by: Nicolai Hähnle <[email protected]> (cherry picked from commit 54a58b2856377e18ea6a42706bea0304a8d7845e)
* intel/tools: Fix detection of enabled shader stages.Kenneth Graunke2017-11-171-1/+1
| | | | | | | | | | | We renamed "Function Enable" to "Enable", which broke our detection of whether shaders are enabled or not. So, we'd see a bunch of HS/DS packets with program offsets of 0, and think that was a valid TCS/TES. Fixes: c032cae9ff77e (genxml: Rename "Function Enable" to "Enable".) Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 9a0465b3a3a1a6e8beda7a59506c2e1a1aae776f)
* i965: Upload invariant state once at the start of the batch on Gen4-5.Kenneth Graunke2017-11-174-13/+3
| | | | | | | | | | | | | | | | | | | | | | | | | We want to emit invariant state at the start of a render batch. In the past, this more or less happened: a new batch flagged BRW_NEW_CONTEXT (because we don't have hardware contexts), which triggered the brw_invariant_state atom. So, it would be emitted before any 3D drawing. (Technically, there might be some BLT commands in the batch because Gen4-5 have a single combined render/BLT ring, but that should be harmless). With the advent of BLORP, this broke. The first item in a batch might be a BLORP operation, which bypasses the normal draw upload path. So, we need to ensure invariant state happens first. To do that, we just upload it when creating a new batch. On Gen6+ we'd need to worry about whether it's a RENDER or BLT batch, but because we have a combined ring, this approach should work fine on Gen4-5. Seems to fix GPU hangs when playing hardware accelerated video with mpv -hwdec=vaapi on Ironlake. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103529 Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 8f91aa35a54e127b68415376ef2b577ea8fc30f9)
* i965: Implement another VF cache invalidate workaround on Gen8+.Kenneth Graunke2017-11-171-8/+33
| | | | | | | | | | | | | ...and provide a better citation for the existing one. v2: - Apply the workaround to Gen8 too, as intended (caught by Topi). - Restructure to add bits instead of an extra flush (based on a similar patch by Rafael Antognolli). Cc: [email protected] Reviewed-by: Rafael Antognolli <[email protected]> (cherry picked from commit 8d48671492412e04c18651a779cabacf30ed0afe)
* swr/rast: Faster emulated simd16 permuteTim Rowley2017-11-171-23/+11
| | | | | | | | | Speed up simd16 frontend (default) on avx/avx2 platforms; fixes performance regression caused by switch to simdlib. Reviewed-by: Bruce Cherniak <[email protected]> Cc: [email protected] (cherry picked from commit d8489517a572c7e5c5405ebf510db9d20b1e2591)
* swr/rast: Use gather instruction for i32gather_ps on simd16/avx512Tim Rowley2017-11-171-11/+1
| | | | | | | | | Speed up avx512 platforms; fixes performance regression caused by swithc to simdlib. Reviewed-by: Bruce Cherniak <[email protected]> Cc: [email protected] (cherry picked from commit 439904847e9c2970494c18e8c47bd6c38c0ed8ab)
* i965: Add stencil buffers to cache set regardless of stencil texturingJason Ekstrand2017-11-171-3/+1
| | | | | | | | | We may access them as a texture using blorp regardless of whether or not stencil texturing is enabled. Reviewed-by: Kenneth Graunke <[email protected]> Cc: [email protected] (cherry picked from commit 6830ba0d3be8df12572622839743c41b4f294825)
* i965: Use PTE MOCS for all external buffersJason Ekstrand2017-11-172-10/+18
| | | | | | | | | | | | | | We were already using PTE for all render targets in case one happened to get scanned out. However, this still wasn't 100% correct because there are still possibly cases where we may want to texture from an external buffer even though we don't know the caching mode. This can happen, for instance, on buffers imported from another GPU via prime. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101691 Cc: "17.3" <[email protected]> Tested-by: Lyude Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit d7a19d69ebc032ba7207fc97bc6f10d5bb35bb99)
* intel/blorp: Make the MOCS setting part of blorp_addressJason Ekstrand2017-11-176-33/+44
| | | | | | | | | This makes our MOCS settings significantly more flexible. Cc: "17.3" <[email protected]> Tested-by: Lyude Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit bc933d0e8462871e19328f66182c35543e334013)
* anv/blorp: Add a device parameter to blorp_surf_for_anv_imageJason Ekstrand2017-11-171-22/+34
| | | | | | | Cc: "17.3" <[email protected]> Tested-by: Lyude Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit deec84fd771876b5c0755293376df11bc95b473b)
* intel/blorp: Use mocs.tex for depth stencilJason Ekstrand2017-11-171-5/+1
| | | | | | | Cc: "17.3" <[email protected]> Tested-by: Lyude Paul <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 4639cc716e89c69da41c7b54fa938457000fbd4c)
* r600: fix isoline tess factor component swapping.Dave Airlie2017-11-171-0/+7
| | | | | | | | | | As per radeonsi, the tess factor components for isolines are reversed. Fixes: tests/spec/arb_tessellation_shader/execution/isoline.shader_test Cc: <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit f3f8615d76b20ad66466b172a600e06b9a833729)
* r600/shader: reserve first register of vertex shader.Dave Airlie2017-11-171-2/+4
| | | | | | | | | | | r0 in input into vertex shaders contains things like vertexid, we need to reserve it even if we have no inputs. This fixes a bunch of tessellation piglits. Cc: <[email protected]> Signed-off-by: Dave Airlie <[email protected]> (cherry picked from commit 50330d7115f0d5050ec3cfe6bca2b0136222e097)
* glx/dri3: Fix passing renderType into glXCreateContextAdam Jackson2017-11-171-1/+2
| | | | | | | | | | | Without this, trying to create a GLX_RGBA_FLOAT_TYPE_ARB context would fail, because GLX_RGBA_TYPE would be a mismatch with the fbconfig. Cc: [email protected] Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Adam Jackson <[email protected]> (cherry picked from commit 257edb5b9aedc9fc5d5c13eb2f48a0c11d15456f)
* glx/drisw: Fix glXMakeCurrent(dpy, None, ctx)Adam Jackson2017-11-171-4/+2
| | | | | | | | | | | | This is perfectly legal in GL 3.0+. Fixes piglit/glx-create-context-current-no-framebuffer. Cc: [email protected] Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Adam Jackson <[email protected]> (cherry picked from commit 033cfb17db85b38bc012d74f30f6c92cddf85216)
* nir/spirv: tg4 requires a samplerAlex Smith2017-11-172-2/+1
| | | | | | | | | | | Gather operations in both GLSL and SPIR-V require a sampler. Fixes gathers returning garbage when using separate texture/samplers (on AMD, was using an invalid sampler descriptor). Signed-off-by: Alex Smith <[email protected]> Cc: "17.2 17.3" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 4122d008466cef47eaa3f958924618060f4e4330)
* spirv: Use correct type for sampled imagesAlex Smith2017-11-173-6/+6
| | | | | | | | | | | | | | | | | | | | | | | We should use the result type of the OpSampledImage opcode, rather than the type of the underlying image/samplers. This resolves an issue when using separate images and shadow samplers with glslang. Example: layout (...) uniform samplerShadow s0; layout (...) uniform texture2D res0; ... float result = textureLod(sampler2DShadow(res0, s0), uv, 0); For this, for the combined OpSampledImage, the type of the base image was being used (which does not have the Depth flag set, whereas the result type does), therefore it was not being recognised as a shadow sampler. This led to the wrong LLVM intrinsics being emitted by RADV. Signed-off-by: Alex Smith <[email protected]> Cc: "17.2 17.3" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit e9eb3c4753e4f56b03d16d8d6f71d49f1e7b97db)
* Update version to 17.3.0-rc4mesa-17.3.0-rc4Emil Velikov2017-11-141-1/+1
| | | | Signed-off-by: Emil Velikov <[email protected]>
* glsl: Allow precision mismatch on dead data with GLSL ES 1.00Tomasz Figa2017-11-131-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 259fc505454ea6a67aeacf6cdebf1398d9947759 added linker error for mismatching uniform precision, as required by GLES 3.0 specification and conformance test-suite. Several Android applications, including Forge of Empires, have shaders which violate this rule, on a dead varying that will be eliminated. The problem affects a big number of applications using Cocos2D engine and other GLES implementations accept this, this poses a serious application compatibility issue. Starting from GLSL ES 3.0, declarations with conflicting precision qualifiers are explicitly prohibited. However GLSL ES 1.00 does not clearly specify the behavior, except that "Uniforms are defined to behave as if they are using the same storage in the vertex and fragment processors and may be implemented this way. If uniforms are used in both the vertex and fragment shaders, developers should be warned if the precisions are different. Conversion of precision should never be implicit." The word "used" is not clear in this context and might refer to 1) declared (same as GLES 3.x) 2) referred after post-processing, or 3) linked after all optimizations are done. Looking at existing applications, 2) or 3) seems to be widely adopted. To avoid compatibility issues, turn the error into a warning if GLSL ES version is lower than 3.0 and the data is dead in at least one of the shaders. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97532 Signed-off-by: Tomasz Figa <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 0886be093fb871b0b6169718277e0f4d18df3ea7)
* i965: Make L3 configuration atom listen for TCS/TES program updates.Kenneth Graunke2017-11-131-0/+2
| | | | | | | | | | | The L3 configuration code already considers the TCS and TES programs, but failed to listen for TCS/TES program changes. This was somehow missing. Fixes: e9644cb1f96ccf7e ("i965: Consider tessellation in get_pipeline_state_l3_weights.") Reviewed-by: Francisco Jerez <[email protected]> (cherry picked from commit b8d42cccd053e32ca048645ea7e6f901366e286d)
* autotools: Set C++ visibility flags on IntelDylan Baker2017-11-131-0/+3
| | | | | | | | | | These flags are set for C sources, but not C++. This causes symbol visibility leaks from the C++ parts of the Intel compiler. Fixes: 700bebb958e93f4d ("i965: Move the back-end compiler to src/intel/compiler") Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Matt Turner <[email protected]> (cherry picked from commit 854455498c0370e959c0bb25680641e05faea3e2)
* docs: Fix GL_MESA_program_debug enumsRoland Scheidegger2017-11-131-18/+8
| | | | | | | | | | | 13b303ff9265b89bdd9100e32f905e9cdadfad81 added the actual enums but didn't remove the already existing XXXX ones. (And also duplicated the "fragment" names instead of using the "vertex" names.) Fixes: 13b303ff9265b89bdd91 "docs: Update the list of used MESA GL enums." Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]> (cherry picked from commit dd38a4ee0d0b6b7addb341fe327c245bf64903e5)
* nir: Don't print swizzles when there are more than 4 componentsMatt Turner2017-11-131-1/+1
| | | | | | | | | | ... as can happen with various types like mat4, or else we'll smash the stack writing past the end of components_local[]. Fixes: 5a0d3e1129b7 ("nir: Print the components referenced for split or packed shader in/outs.") Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit 77a63d190a9bd6bcb6d6d8eb9bc734c0b18ee0e3)
* glsl: Fix typo fragement -> fragmentAndreas Boll2017-11-131-1/+1
| | | | | | | | | | | Fixes: 94d669b0d2f ("glsl: enforce fragment shader input restrictions in GLSL ES 3.10") Signed-off-by: Andreas Boll <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit a6932faae1074445210d392a80b94fdac147b255)
* broadcom/vc5: Remove unused v3d_compiler.cAndreas Boll2017-11-131-43/+0
| | | | | | | | | | | | Unused since original import of VC5. Fixes: ade416d0236 ("broadcom: Add VC5 NIR compiler.") Signed-off-by: Andreas Boll <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Emil Velikov <[email protected]> (cherry picked from commit 4f29ed38f3c415a5a44d730cea1fc6fc9723f62d)
* configure.ac: require xcb* for the omx/va/... when using x11 platformEmil Velikov2017-11-131-1/+3
| | | | | | | | | | | | | Targets such as omx and va can work w/o anything X related. Mandate the xcb* dependencies only when the X11 platform is selected. Reported-by: Lukas Rusak <[email protected]> Fixes: 63e11ac2b5c ("configure: error out if building VA w/o supported platform") Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Lukas Rusak <[email protected]> (v1) (cherry picked from commit 85a017230cacd0661570421c8e5b0619e512d33d)
* configure.ac: loosen --enable-glvnd check to honour eglEmil Velikov2017-11-131-8/+4
| | | | | | | | | | | | | | | | Currently we error out when building GLVND w/o GLX. That was the original premice before we had EGL. As the commit says, that error should be reworked to honour both - do so. v2: Drop noop *);; (Eric) Reported-by: Lukas Rusak <[email protected]> Fixes: ce562f9e3fa ("EGL: Implement the libglvnd interface for EGL (v3)") Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Lukas Rusak <[email protected]> (v1) (cherry picked from commit b4967561c035182b64d3ae0f474d4ef281535ce1)
* automake: intel: correctly append to the LIBADD variableEmil Velikov2017-11-131-1/+1
| | | | | | | | | | | | | | | Commit 05fc62d89f5 sets the variable, yet it forgot the update the existing reference to append (instead of assign). Thus as-is the expat library was discarded from the link chain when building with Android. Fixes: 05fc62d89f5 ("automake: intel: move expat handling where it's used") Cc: Hongxu Jia <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> (cherry picked from commit ba414dba4f1bf354cc9494fd76e3e28b489f13a1)
* i965: disable NIR linking on HSW and belowTimothy Arceri2017-11-131-1/+4
| | | | | | | | Fixes: 379b24a40d3d "i965: make use of nir linking" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103537 Reviewed-by: Iago Toral Quiroga <[email protected]> (cherry picked from commit a9000cb860242d2d0308aec3e8fc20148a2c5eec)
* automake: include git_sha1.h.in in release tarballJuan A. Suarez Romero2017-11-131-1/+1
| | | | | | | | | | | | | Fixes: make[2]: Leaving directory '/home/local/mesa/mesa-17.4.0-devel/_build/sub/src' make[2]: *** No rule to make target '../../../src/git_sha1.h.in', needed by 'git_sha1.h'. Stop. Makefile:660: recipe for target 'all-recursive' failed Fixes: 16be271c6ee618e79c7d "git_sha1_gen: use git_sha1.h.in on all build systems" Reviewed-by: Eric Engestrom <[email protected]> Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit e17e8934f9e4b008bdfb4f9abd8ed4faa604c7d9)
* glsl: Transform fb buffers are only active if a variable uses themNeil Roberts2017-11-131-9/+15
| | | | | | | | | | | | | | | | The GL spec will soon be revised to clarify that a buffer binding for a transform feedback buffer is only required if a variable is actually defined to use the buffer binding point. Previously a declaration for the default transform buffer would make it require a binding even if nothing was declared to use the default buffer. Affects: KHR-GL44/45.enhanced_layouts.xfb_stride_of_empty_list KHR-GL44/45.enhanced_layouts.xfb_stride_of_empty_list_and_api Reviewed-by: Nicolai Hähnle <[email protected]> Cc: [email protected] (cherry picked from commit 4dc8458cd13154daa48bd97c3f8393daf02aa351)
* glsl: add varying resources for arrays of complex typesJuan A. Suarez Romero2017-11-131-4/+59
| | | | | | | | | | | | | | This patch is mostly a patch done by Ilia Mirkin. It fixes KHR-GL45.enhanced_layouts.varying_structure_locations. v2: fix locations for TCS/TES/GS inputs and outputs (Ilia) CC: Ilia Mirkin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103098 Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit d5a641106baae2122cc3f09b4a755077d902ee88)
* intel/nir: Use the correct indirect lowering masks in link_shadersJason Ekstrand2017-11-101-6/+4
| | | | | | | | | | Previously, if we were linking a vec4 VS with a SIMD8/16 FS, we wouldn't lower indirects on the fragment shader which is wrong. Instead of using a single indirect mask, take advantage of our new little helper. Reviewed-by: Timothy Arceri <tarceri at itsqueeze.com> Cc: [email protected] (cherry picked from commit 951a5dc4cc29da996b54ae63eeba1915a3a65b4a)
* mesa: rework how we free gl_shader_program_dataTimothy Arceri2017-11-103-42/+18
| | | | | | | | | | | | | | | | | When I introduced gl_shader_program_data one of the intentions was to fix a bug where a failed linking attempt freed data required by a currently active program. However I seem to have failed to finish hooking up the final steps required to have the data hang around. Here we create a fresh instance of gl_shader_program_data every time we link. gl_program has a reference to gl_shader_program_data so it will be freed once the program is no longer active. Cc: "17.2 17.3" <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Neil Roberts <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102177 (cherry picked from commit 6a72eba755fea15a0d97abb913a6315d9d32e274)
* glsl: use the correct parent when allocating program data membersTimothy Arceri2017-11-104-8/+8
| | | | | | | Cc: "17.2 17.3" <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit 9c33533586476693a197b7179552d140d54f23f2)
* glsl: drop cache_fallbackTimothy Arceri2017-11-105-77/+55
| | | | | | | | | | | This turned out to be a dead end, it is much easier and less error prone to just cache the IR used by the drivers backend e.g. TGSI or NIR. Cc: "17.2 17.3" <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> (cherry picked from commit cf05bb506a075c9e3b8a3c374b928ff0367c49b2)
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