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* vk/0.210.0: Change field names in vertex input structsJason Ekstrand2015-12-036-36/+37
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* vk/0.210.0: Misc. no-op structure changesJason Ekstrand2015-12-032-122/+123
| | | | | The only non-trivial change is to sparse resources that we don't handle anyway.
* vk/0.210.0: Rename property pCount parametersJason Ekstrand2015-12-032-22/+22
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* vk/0.210.0: Rework sampler filtering and mode enumsJason Ekstrand2015-12-035-68/+68
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* vk/0.210.0: Misc. function argument renamesJason Ekstrand2015-12-034-40/+40
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* vk/0.210.0: Rework copy/clear/blit APIJason Ekstrand2015-12-034-129/+114
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* vk/0.210.0: Rework dynamic statesJason Ekstrand2015-11-309-74/+75
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* vk/0.210.0: Rework color blending enumsJason Ekstrand2015-11-305-123/+123
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* gen7/8/cmd_buffer: Inline vk_to_gen_swizzleJason Ekstrand2015-11-302-2/+2
| | | | It's currently unused on IVB so we get compiler warnings.
* vk/0.210.0: Rework a few raster/input enumsJason Ekstrand2015-11-306-67/+64
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* vk/0.210.0: Rework texture view component mappingJason Ekstrand2015-11-306-117/+78
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* vk/0.210.0: Switch to the new VKAPI function decorationsJason Ekstrand2015-11-3011-379/+372
| | | | While we're at it, we do a bunch of the VkResult -> void updates
* vk/0.210.0: Rename CmdBuffer to CommandBufferJason Ekstrand2015-11-3012-334/+334
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* vk/0.210.0: A pile of minor enum updatesJason Ekstrand2015-11-3010-126/+112
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* vk/0.210.0: Switch to the new-style handle declarationsJason Ekstrand2015-11-307-67/+38
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* vk: Add connonical 0.170.2 and 0.210.0 headersJason Ekstrand2015-11-302-0/+6122
| | | | This is in preparation for the API update
* vk: Fix 3DSTATE_WM_DEPTH_STENCIL for gen8Kristian Høgsberg Kristensen2015-11-263-6/+14
| | | | | | | | | This packet is a different size on gen8 and we hit an assertion when we try to merge a gen9 size dword array from the pipeline with the gen8 sized array we create from dynamic state. Use a static assert in the merge macro and fix this issue by using different wm_depth_stencil arrays on gen8 and gen9.
* vk: Add SKL supportKristian Høgsberg Kristensen2015-11-2510-172/+366
| | | | Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
* vk: Make entrypoint generator output gen9 entry pointsKristian Høgsberg Kristensen2015-11-251-1/+6
| | | | Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
* vk: Add GEN9 pack headerKristian Høgsberg Kristensen2015-11-251-0/+9767
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* vk: Move all gen8 files to gen8 libKristian Høgsberg Kristensen2015-11-251-5/+5
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* Merge remote-tracking branch 'mesa-public/master' into vulkanJason Ekstrand2015-11-23330-6211/+13633
|\ | | | | | | This pulls in nir cloning and some much-needed upstream refactors.
| * i965: Use NIR for lowering texture swizzleJason Ekstrand2015-11-236-196/+44
| | | | | | | | | | | | | | | | | | | | Now that nir_lower_tex can do texture swizzle lowering, we can use that instead of repeating more-or-less the same code in both backends. This both allows us to share code and means that things like the tg4 work-arounds are somewhat simpler because they don't have to take the swizzle into account. Reviewed-by: Connor Abbott <[email protected]>
| * nir/lower_tex: Add support for lowering texture swizzleJason Ekstrand2015-11-232-0/+80
| | | | | | | | Reviewed-by: Connor Abbott <[email protected]>
| * nir: Add a tex_instr_is_query helperJason Ekstrand2015-11-231-0/+25
| | | | | | | | Reviewed-by: Connor Abbott <[email protected]>
| * nir: Add a ssa_def_rewrite_uses_after helperJason Ekstrand2015-11-232-0/+51
| | | | | | | | Reviewed-by: Connor Abbott <[email protected]>
| * nir: Use instr/if_rewrite in nir_ssa_def_rewrite_usesJason Ekstrand2015-11-231-12/+4
| | | | | | | | | | | | | | nir_ssa_def_rewrite_uses is one of the older helpers in NIR and predated both of those. Now it can be substantially simplified. Reviewed-by: Connor Abbott <[email protected]>
| * nir/validate: Validated dests after sourcesJason Ekstrand2015-11-231-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Previously, if someone accidentally made an instruction that refers to its own SSA destination, the validator wouldn't catch it. The reason for this is that it validated the destination too early and, by the time it got to the source, the destination SSA value was already added to the set of seen SSA values so it would assume that it came from some previous instruction. By moving destination validation to be after source validation, the SSA value is not in the list of seen values and the validator will catch self-referential instructions. Reviewed-by: Connor Abbott <[email protected]>
| * i965: Use nir_lower_tex for texture coordinate loweringJason Ekstrand2015-11-238-131/+42
| | | | | | | | | | | | | | | | | | | | Previously, we had a rescale_texcoords helper in the FS backend for handling rescaling of texture coordinates. Now that we can do variants in NIR, we can use nir_lower_tex to do the rescaling for us. This allows us to delete the i965-specific code and gives us proper TEXTURE_RECTANGLE and GL_CLAMP handling in vertex and geometry shaders. Reviewed-by: Kenneth Graunke <[email protected]>
| * i965/fs: Stomp the texture return type to UINT32 for resinfo messagesJason Ekstrand2015-11-231-0/+11
| | | | | | | | Reviewed-by: Kenneth Graunke <[email protected]>
| * nir/lower_tex: Set the dest_type for txs instructionsJason Ekstrand2015-11-231-0/+1
| | | | | | | | Reviewed-by: Iago Toral Quiroga <[email protected]>
| * nir/lower_tex: Report progressJason Ekstrand2015-11-233-6/+17
| | | | | | | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
| * i965: Move postprocess_nir to codegen timeJason Ekstrand2015-11-234-5/+20
| | | | | | | | | | | | | | | | | | This allows us to insert NIR passes between initial NIR compilation and optimization (link time) and actual backend code-gen. In particular, it will allow us to do shader variants in NIR and share some of that shader variant code between backends. Reviewed-by: Iago Toral Quiroga <[email protected]>
| * i965/nir: Split shader optimization and lowering into three stagesJason Ekstrand2015-11-232-38/+104
| | | | | | | | | | | | | | | | | | At the moment, brw_create_nir just calls the three stages in sequence so there's not much difference. Soon, however, we will want to start doing variants in NIR at which point the postprocessing step will have to move from shader create time to codegen time. Reviewed-by: Iago Toral Quiroga <[email protected]>
| * i965: Use ull immediates in brw_inst_bitsJason Ekstrand2015-11-231-2/+2
| | | | | | | | | | | | | | | | This fixes a regression introduced in b1a83b5d1 that caused basically all shaders to fail to compile on 32-bit platforms. Reported-by: Mark Janes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
| * docs: add missed freedreno features to relnotesIlia Mirkin2015-11-231-0/+5
| | | | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.1" <[email protected]>
| * docs: update relnotes with new freedreno/a4xx supportIlia Mirkin2015-11-231-1/+8
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * svga: Add ASTC formats to format table.Jose Fonseca2015-11-231-0/+28
| | | | | | | | | | | | Fixes build. Otherwise untested. Trivial.
| * freedreno/ir3: add support for a few gs5 opsIlia Mirkin2015-11-231-0/+27
| | | | | | | | | | | | | | Tested on a4xx. This is part of the builtins added by ARB_gpu_shader5 and GLSL ES 3.10. Signed-off-by: Ilia Mirkin <[email protected]>
| * ttn: fix UMSB conversionIlia Mirkin2015-11-231-1/+1
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add ARB_texture_query_lod supportIlia Mirkin2015-11-232-6/+20
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * ttn: add LODQ supportIlia Mirkin2015-11-231-2/+9
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: re-emit program on dirty framebufferIlia Mirkin2015-11-231-1/+1
| | | | | | | | | | | | | | The program emit depends on certain fb details. Make sure those get updated when the fb changes. Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: use a factor of 32767 for snorm8 blendingIlia Mirkin2015-11-231-5/+34
| | | | | | | | | | | | | | | | | | | | | | | | It appears that the hardware wants the integer to be scaled the same way that the hardware representation is. snorm16 uses one of the float factors, so this is only relevant for snorm8. This fixes a number of subcases of bin/fbo-blending-formats GL_EXT_texture_snorm Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
| * freedreno/a4xx: only compute texture offset once for the viewIlia Mirkin2015-11-233-13/+6
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add ARB_texture_view supportIlia Mirkin2015-11-233-8/+10
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add formats for ARB_texture_buffer_object_rgb32 supportIlia Mirkin2015-11-233-3/+9
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add ARB_texture_rgb10_a2ui supportIlia Mirkin2015-11-232-2/+3
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * freedreno/a4xx: add astc formatsIlia Mirkin2015-11-232-1/+39
| | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]>
| * st/mesa: add astc supportIlia Mirkin2015-11-232-1/+262
| | | | | | | | | | | | | | | | | | | | This doesn't account for the ldr/hdr distinction... that will probably have to be exposed via a separate cap. When relevant hardware appears, this can be worked out. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
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