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* glsl: Generate link error for non-matching gl_FragCoord redeclarationsAnuj Phogat2015-03-241-13/+2
| | | | | | | | | | | in different fragment shaders. This also applies to a case when gl_FragCoord is redeclared with no layout qualifiers in one fragment shader and not declared but used in other fragment shader. Signed-off-by: Anuj Phogat <[email protected]> Khronos Bug#12957 Cc: "10.5" <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* vc4: Add a dump-the-surface-contents routine.Eric Anholt2015-03-242-0/+101
| | | | | This has been useful once again while trying to debug stride issues between render targets and texturing.
* vc4: Allow DRI3 on simulation, as well.Eric Anholt2015-03-241-0/+5
| | | | The problem I'd seen before seems to be gone.
* vc4: Fix pitch alignment of linear textures.Eric Anholt2015-03-241-1/+1
| | | | | Fixes some non-power-of-two texture rendering when I force ARGB8888 to raster.
* vc4: Write the alignment of level width consistently in validation.Eric Anholt2015-03-241-2/+2
| | | | | | 16 / cpp happens to be the same as utile_w on the only raster format supported (4 bytes per pixel), but simulator/hw source code generally talks in terms of utiles.
* vc4: Fix use of a bool as an enum.Eric Anholt2015-03-241-1/+1
| | | | The enum compared to was 0, so it worked out, but it sure looked wrong.
* vc4: Decide the HW's format before laying out the miptree.Eric Anholt2015-03-241-3/+3
| | | | | | I'm experimenting with a workaround for raster texture misrendering on hardware, and this lets me look at the format chosen when computing strides.
* vc4: Use our device-specific ioctls for create/mmap.Eric Anholt2015-03-241-15/+36
| | | | | | They don't do anything special for us, but I've been told by kernel maintainers that relying on dumb for my acceleration-capable buffers is not OK.
* vc4: Make a new #define for making code conditional on the simulator.Eric Anholt2015-03-243-15/+25
| | | | | | I'd like to compile as much of the device-specific code as possible when building for simulator, and using if (using_simulator) instead of ifdefs helps.
* vc4: Add some useful debug printfs for miptrees.Eric Anholt2015-03-241-0/+37
| | | | I keep rewriting these.
* glsl: avoid calling base_alignment when samplers are involvedIlia Mirkin2015-03-242-9/+4
| | | | | | | | | | | | Earlier commit 53bf7c8fd2e changed the logic to always call base_alignment on structs. 1ec715ce8b12 hacked the function to return 0 for sampler fields, but didn't handle sampler arrays. Instead of extending the hack, avoid calling base_alignment in the first place on non-UBO uniforms. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89726 Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tapani Palli <[email protected]>
* Revert "nv50,nvc0: remove bogus 64_FLOAT formats"Ilia Mirkin2015-03-231-0/+5
| | | | | | | | | | | | | | | This reverts commit 20346808cf4f1ee4f320afaf18f94043fb146f2e. The conversion is actually done since these are the *B macro variants and no vtx format is supplied, which makes them go through the translate module. This restores the following piglit tests to passing: draw-vertices user gl-2.0-vertexattribpointer Signed-off-by: Ilia Mirkin <[email protected]>
* mapi: Make private copies of name strings provided by client.Mario Kleiner2015-03-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | glXGetProcAddress("glFoo") ends up in stub_add_dynamic() to create dynamic stubs for dynamic functions. stub_add_dynamic() doesn't store the caller provided name string "Foo" in a mesa private copy, but just stores a pointer to the "glFoo" string passed to glXGetProcAddress - a pointer into arbitrary memory outside mesa's control. If the caller passes some dynamically allocated/changing memory buffer to glXGetProcAddress(), or the caller gets unmapped from memory, e.g., some dynamically loaded application plugin which uses OpenGL, this ends badly - with a dangling pointer. strdup() the name string provided by the client to avoid this problem. Cc: "10.3 10.4 10.5" <[email protected]> Signed-off-by: Mario Kleiner <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* clover: Return 0 as storage size for local kernel args that are not set v2Tom Stellard2015-03-231-1/+1
| | | | | | | | | | | | | | | | | The storage size for local kernel args can be queried before the arguments are set by using the CL_KERNEL_LOCAL_MEM_SIZE param of clGetKernelWorkGroupInfo(). The spec says that if local kernel arguments have not been specified, then we should assume their size is 0. v2: - Implement using c++11 member initialization. Reviewed-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Cc: 10.5 10.4 <[email protected]>
* gallivm: Use MCInstrInfo in the disassembler for querying instruction infoTom Stellard2015-03-231-7/+1
| | | | This fixes the build since llvm r232885 and also simplifies the code.
* clover: use get_device_vendor instead of get_vendorGiuseppe Bilotta2015-03-231-1/+1
| | | | | | | | | | | | The pipe's get_vendor method returns something more akin to a driver vendor string in most cases, instead of the actual device vendor. Use get_device_vendor instead, which was introduced specifically for this purpose. Signed-off-by: Giuseppe Bilotta <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* gallium: implement get_device_vendor() for existing driversGiuseppe Bilotta2015-03-2313-0/+83
| | | | | | | | | The only hackish ones are llvmpipe and softpipe, which currently return the same string as for get_vendor(), while ideally they should return the CPU vendor. Signed-off-by: Giuseppe Bilotta <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* gallium: introduce get_device_vendor() entrypoint for pipesGiuseppe Bilotta2015-03-232-0/+14
| | | | | | | | | This will be needed by Clover to return the correct information to CL_DEVICE_VENDOR info queries. Signed-off-by: Giuseppe Bilotta <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium: remove trailing whitespace in p_screen.hGiuseppe Bilotta2015-03-231-1/+1
| | | | | | Signed-off-by: Giuseppe Bilotta <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* clover: The unit for CL_DEVICE_MEM_BASE_ADDR_ALIGN is bits not bytesTom Stellard2015-03-231-0/+3
| | | | | Reviewed-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* clover: Add all the mandatory 1.1 extensions to the extension stringTom Stellard2015-03-231-1/+7
| | | | | Reviewed-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* clover: Add a space at the end of CL_DEVICE_OPENCL_C_VERSIONTom Stellard2015-03-231-1/+1
| | | | | | | This is required by the spec. Reviewed-by: Jan Vesely <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965/vec4: Fix handling of multiple register reads and writes in ↵Francisco Jerez2015-03-231-7/+15
| | | | | | dead_code_eliminate(). Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Calculate live intervals with subregister granularity.Francisco Jerez2015-03-232-33/+46
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Define helpers to calculate the common live interval of a range ↵Francisco Jerez2015-03-234-29/+31
| | | | | | | | | of variables. These will be especially useful when we start keeping track of liveness information for each subregister. Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Define helper functions to convert a register to a variable index.Francisco Jerez2015-03-234-28/+34
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Don't lose the force_writemask_all flag during CSE.Francisco Jerez2015-03-231-0/+3
| | | | | | | And set it in the MOV instructions that copy the temporary to the original destination if the generator instruction had it set. Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Fix handling of multiple register reads and writes in opt_cse().Francisco Jerez2015-03-231-8/+17
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Fix handling of multiple register reads and writes during copy ↵Francisco Jerez2015-03-231-3/+6
| | | | | | propagation. Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Fix handling of multiple register reads and writes in ↵Francisco Jerez2015-03-231-9/+6
| | | | | | split_virtual_grfs(). Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Fix handling of multiple register reads and writes in ↵Francisco Jerez2015-03-231-14/+10
| | | | | | opt_register_coalesce(). Reviewed-by: Matt Turner <[email protected]>
* i965: Define method to check whether a backend_reg is inside a given range.Francisco Jerez2015-03-233-4/+11
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Remove dependency of vec4_live_variables on the visitor.Francisco Jerez2015-03-232-7/+8
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Trivial copy propagate clean-up.Francisco Jerez2015-03-231-5/+6
| | | | | | | Fix typo and punctuation in a comment, break long line and add space before curly bracket. Reviewed-by: Abdiel Janulgue <[email protected]>
* i965/vec4: Add argument index and type checks to SEL saturate propagation.Francisco Jerez2015-03-231-1/+4
| | | | | | | SEL saturate propagation already implicitly relies on these assumptions. Reviewed-by: Abdiel Janulgue <[email protected]>
* i965/vec4: Fix broken saturate mask check in copy propagation.Francisco Jerez2015-03-231-4/+11
| | | | | | | | | | | try_copy_propagate() was checking the bit of the saturate mask for the arg-th component of the source to decide whether the whole source should be saturated (WTF?). We need to swizzle the original saturate mask and check that for all enabled channels the saturate flag is either set or unset, as we cannot saturate a subset of destination components only. Reviewed-by: Abdiel Janulgue <[email protected]>
* i965/vec4: Don't lose copy propagation saturate bits for not written components.Francisco Jerez2015-03-231-1/+1
| | | | Reviewed-by: Abdiel Janulgue <[email protected]>
* Revert "i965/vec4: Don't lose the saturate modifier in copy propagation."Francisco Jerez2015-03-231-1/+1
| | | | | | | | | This reverts commit 0dfec59a2785cf7a87ee5128889ecebe810b611b. The change prevented propagation of copies with the saturate flag set, making the whole saturate mask tracking completely useless. A proper fix follows. Reviewed-by: Abdiel Janulgue <[email protected]>
* i965/vec4: Remove unused method definition.Francisco Jerez2015-03-231-1/+0
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Some more trivial swizzle clean-up.Francisco Jerez2015-03-235-30/+11
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Improve src_reg/dst_reg conversion constructors.Francisco Jerez2015-03-231-26/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This simplifies the src_reg/dst_reg conversion constructors using the swizzle utils introduced in a previous patch. It also makes them more useful by changing their semantics slightly: dst_reg(src_reg) used to set the writemask to XYZW if the src_reg swizzle was anything other than XXXX, which was almost certainly not what the caller intended if the swizzle was non-trivial. After this patch the same components that are present in the swizzle will be enabled in the resulting writemask. src_reg(dst_reg) used to set the first components of the swizzle to the enabled components of the writemask and then replicate the last enabled component to fill the swizzle, which, in cases where the writemask didn't have exactly the first n components set, would in general not be compatible with the original dst_reg. E.g.: | ADD(tmp, src_reg(tmp), src_reg(1)); would *not* do what one would expect (add one to each of the enabled components of tmp) if tmp didn't have a writemask of the described form (e.g. YZ, YW, XZW would all fail). This pattern actually occurs in many different places in the VEC4 back-end, it's a wonder that it hasn't caused piglit failures until now. After this patch src_reg(dst_reg) will construct a swizzle with each enabled component at its natural position (e.g. Y at the second position, Z at the third, and so on). The resulting swizzle will behave like the identity when used in any instruction with the original writemask. I've manually verified that *none* of the callers of both conversion constructors were relying on the previous broken semantics. There are no piglit regressions on any generation. Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Pass argument by reference to src_reg/dst_reg conversion ↵Francisco Jerez2015-03-232-4/+4
| | | | | | constructors. Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Remove swizzle_for_size() in favour of brw_swizzle_for_size().Francisco Jerez2015-03-233-31/+8
| | | | | | | | | | It could be objected that swizzle_for_size() is "faster" than brw_swizzle_for_size(). It's not measurably better in any reasonable CPU-bound benchmark on VLV according to the Finnish benchmarking system (including the SynMark2 DrvShComp shader compilation benchmark). Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Remove broken vector size deduction in ↵Francisco Jerez2015-03-231-14/+9
| | | | | | | | | | | setup_builtin_uniform_values(). This seemed to be trying to deduce the number of uniform vector components from the parameter swizzle, but the algorithm would always give 4 as result. Instead grab the correct number of components from the GLSL type. Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Simplify visitor handling of swizzles using the swizzle utils.Francisco Jerez2015-03-231-49/+10
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Simplify opt_register_coalesce() using the swizzle utils.Francisco Jerez2015-03-231-26/+7
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Simplify reswizzle() using the swizzle utils.Francisco Jerez2015-03-231-29/+11
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Simplify opt_reduce_swizzle() using the swizzle utils.Francisco Jerez2015-03-231-44/+7
| | | | Reviewed-by: Matt Turner <[email protected]>
* i965: Fix signedness of backend_reg::reg_offset.Francisco Jerez2015-03-231-1/+1
| | | | | | And make it 16-bit so it packs nicely with the previous field. Reviewed-by: Matt Turner <[email protected]>
* i965/vec4: Fix signedness of dst_reg::writemask.Francisco Jerez2015-03-232-3/+4
| | | | Reviewed-by: Matt Turner <[email protected]>
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