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* nir/xfb: adding varyings on nir_xfb_info and gather_infoAlejandro Piñeiro2019-03-084-12/+49
* nir_types: add glsl_varying_count helperAlejandro Piñeiro2019-03-082-0/+7
* nir/xfb: add component_offset at nir_xfb_infoAlejandro Piñeiro2019-03-082-0/+4
* Revert "radv: execute external subpass barriers after ending subpasses"Samuel Pitoiset2019-03-081-2/+2
* intel/error2aub: support older style engine namesLionel Landwerlin2019-03-081-6/+14
* intel/error2aub: deal with GuC log bufferLionel Landwerlin2019-03-081-0/+1
* intel/error2aub: add a verbose optionLionel Landwerlin2019-03-081-2/+16
* intel/error2aub: write GGTT buffers into the aub fileLionel Landwerlin2019-03-083-12/+149
* intel/error2aub: store engine last ring buffer head/tail pointersLionel Landwerlin2019-03-081-0/+22
* intel/error2aub: annotate buffer with their address spaceLionel Landwerlin2019-03-081-11/+26
* intel/error2aub: parse other buffer typesLionel Landwerlin2019-03-081-13/+22
* intel/error2aub: strenghten batchbuffer identifier markerLionel Landwerlin2019-03-081-2/+2
* intel/error2aub: identify buffers by engineLionel Landwerlin2019-03-081-24/+60
* intel/error2aub: build a list of BOs before writing themLionel Landwerlin2019-03-081-37/+87
* iris: Wire up EGL_IMG_context_priorityChris Wilson2019-03-074-3/+19
* iris: Export a copy_region helper that doesn't flushKenneth Graunke2019-03-072-16/+48
* iris: Spruce up "are we using this engine?" checks for flushingKenneth Graunke2019-03-072-12/+12
* radeonsi/nir: Only set window_space_position for vertex shaders.Timur Kristóf2019-03-081-2/+4
* nir/builder: Add a build_deref_array_imm helperJason Ekstrand2019-03-078-18/+26
* nir/builder: Cast array indices in build_deref_followerJason Ekstrand2019-03-071-1/+7
* nir/builder: Emit better code for iadd/imul_immJason Ekstrand2019-03-072-5/+24
* freedreno/a6xx: perfcntrsRob Clark2019-03-075-1/+1019
* freedreno/a6xx: fix border-color swizzlesRob Clark2019-03-071-2/+9
* freedreno/a6xx: refactor fd6_tex_swiz()Rob Clark2019-03-074-34/+61
* freedreno/a6xx: remove astc_srgb workaroundRob Clark2019-03-074-45/+2
* freedreno: fix ir3_cmdline buildRob Clark2019-03-072-0/+3
* iris: Drop PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLYKenneth Graunke2019-03-071-1/+0
* iris: Properly support alpha and luminance-alpha formatsKenneth Graunke2019-03-074-85/+117
* iris: Defer uploading sampler state tables until draw timeKenneth Graunke2019-03-073-20/+44
* iris: Plumb through ISL_SWIZZLE_IDENTITY in buffer surface emittersKenneth Graunke2019-03-071-6/+8
* isl: Add a swizzle parameter to isl_buffer_fill_state()Kenneth Graunke2019-03-076-4/+15
* iris: fix decode_get_bo callbackLionel Landwerlin2019-03-071-1/+3
* virgl: remove unused variableErik Faye-Lund2019-03-071-1/+0
* virgl: remove unused variableErik Faye-Lund2019-03-071-1/+0
* virgl: remove unused variableErik Faye-Lund2019-03-071-1/+0
* virgl: remove unused variablesErik Faye-Lund2019-03-071-3/+0
* iris: fix decoder callLionel Landwerlin2019-03-071-1/+1
* intel/aub_write: factorize context image/pphwsp/ring creationLionel Landwerlin2019-03-075-178/+161
* intel/aub_write: turn context images arrays into functionsLionel Landwerlin2019-03-074-242/+306
* intel/aub_write: store the physical page allocator in structLionel Landwerlin2019-03-072-15/+33
* intel/aub_write: log mmio writesLionel Landwerlin2019-03-071-0/+5
* intel/aub_write: switch to use i915_drm engine classesLionel Landwerlin2019-03-074-44/+59
* intel/aub_write: break execlist write in 2Lionel Landwerlin2019-03-071-41/+67
* intel/aub_write: write header in initLionel Landwerlin2019-03-074-82/+84
* intel/aub_write: split comment section from HW setupLionel Landwerlin2019-03-074-26/+52
* intel/aub_read: reuse defines from gen_contextLionel Landwerlin2019-03-071-12/+13
* intel/decoders: limit number of decoded batchbuffersLionel Landwerlin2019-03-074-2/+27
* intel/decoders: handle decoding MI_BBS from ringLionel Landwerlin2019-03-0711-17/+19
* intel/decoders: add address space indicator to get BOsLionel Landwerlin2019-03-078-42/+65
* vulkan/overlay: fix missing var rename in previous commitEric Engestrom2019-03-071-1/+1