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* gallivm: add coroutine pass manager supportDave Airlie2019-09-043-1/+32
| | | | | | | coroutines require a proper pass manager, so add the passes to the correct places Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm: add coroutine support files to gallivm.Dave Airlie2019-09-044-0/+273
| | | | | | | These wrap the coroutine intrinsics and also add some higher level wrappers around coroutine begin, end and suspend procedures Reviewed-by: Roland Scheidegger <[email protected]>
* gallivm/flow: add counter reset for loopsDave Airlie2019-09-042-0/+20
| | | | | | This allows the counter value to be forced to a certain value Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: enable fb no attachDave Airlie2019-09-041-1/+2
| | | | Reviewed-by: Roland Scheidegger <[email protected]>
* iris: Report correct number of planes for planar imagesKenneth Graunke2019-09-031-1/+8
| | | | | | | | | | | We were only handling the modifiers case and not counting the number of planes in actual planar images. Fixes Piglit's ext_image_dma_buf_import-export. Fixes: fc12fd05f56 ("iris: Implement pipe_screen::resource_get_param") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111509 Reviewed-by: Jordan Justen <[email protected]>
* teximage: ensure that Tex*SubImage* checks formatIlia Mirkin2019-09-041-0/+9
| | | | | | | | | We were previously not doing at least some of the checks. This uses the same logic that is used in glTexImage*. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/hud: add CPU usage support for DragonFly/NetBSD/OpenBSDJan Beich2019-09-031-2/+41
| | | | | | | | | Each BSD has slightly different sysctl for retrieving per-CPU times. FreeBSD returns long while NetBSD returns uint64_t. On OpenBSD return type differs between summation and per-CPU times. DragonFly is compatible with FreeBSD. Signed-off-by: Jan Beich <[email protected]>
* lima: Return fence unconditionallyRoman Stratiienko2019-09-041-4/+2
| | | | | | | | | Based on the vc4 implementation. Fixes Android RenderEngine::flush() routine: android.googlesource.com/platform/frameworks/native/+/refs/tags/android-o-mr1-iot-release-smart-clock-fcs/services/surfaceflinger/RenderEngine/RenderEngine.cpp#225 Signed-off-by: Roman Stratiienko <[email protected]> Reviewed-by: Qiang Yu <[email protected]>
* lima/ppir: clone uniforms and load_coords into each successorVasily Khoruzhick2019-09-044-41/+155
| | | | | | | | | | | | | | | | | | | | | | | Try more aggressive approach with cloning uniform and coord loads. Uniform load can be inserted into any instruction, so let's do that. ARM site claim that penalty for cache miss is one clock, so we don't lose anything if we merge it into instruction that uses the result. As side effect we can also pipeline it and thus decrease reg pressure. Do the same for varyings that hold texture coords, but for different reason: looks like there's a special path for coords that increases precision if varying that holds it is pipelined. If we don't pipeline it and load coords from a register its precision is fp16 and thus only 10 bits which is not enough to accurately sample textures of size 1024 or larger. Since instruction can hold only one uniform load and one varying load, node_to_instr now creates a move using helper introduced in previous commit if slot is already taken. As side effect of this change we can also try to pipeline texture loads and create a move if attempt fails. Reviewed-by: Erico Nunes <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]>
* lima/ppir: don't assume that load coords gets value from registerVasily Khoruzhick2019-09-043-9/+13
| | | | | | | | | It can load value from varying directly as well. Also load_regs is the only op that has a source, so add src_num field to load node and set it accordingly. Reviewed-by: Erico Nunes <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]>
* lima/ppir: add common helper for creating movsVasily Khoruzhick2019-09-043-49/+41
| | | | | | | Introduce common helper for creating movs to avoid code duplication Reviewed-by: Erico Nunes <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]>
* nir: fix memleak in error pathEric Engestrom2019-09-041-1/+3
| | | | | | | Fixes: 2cf59861a8128a91bfdd ("nir: Add partial redundancy elimination for compares") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* freedreno/drm-shim: fix mem leakEric Engestrom2019-09-041-3/+4
| | | | | | Fixes: 494ecef6b42198ab6c3e ("freedreno: Add support for drm-shim.") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* anv: fix format string in error messageEric Engestrom2019-09-041-1/+1
| | | | | | Fixes: 9775894f102535a79186 ("anv: Move size check from anv_bo_cache_import() to caller (v2)") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* util/os_file: fix double-close()Eric Engestrom2019-09-041-1/+0
| | | | | | Fixes: 955c63d3643f30d7db0c ("util/os_file: resize buffer to what was actually needed") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* egl: fix deadlock in malloc error pathEric Engestrom2019-09-041-1/+3
| | | | | | Fixes: cb0980e69aa921af7086 ("egl: move alloc & init out of _eglBuiltInDriver{DRI2,Haiku}") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* ttn: fix 64-bit shift on 32-bit `1`Eric Engestrom2019-09-041-1/+1
| | | | | | | | Fixes: 4d0b2c7aaac3cf3de5af ("ttn: Update shader->info as we generate code.") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* freedreno/ir3: use uniform baseRob Clark2019-09-031-4/+4
| | | | | | | | | | When lowering from ubo, use the constant base field in the load_uniform instruction for the constant part of the offset. Doesn't change much for constant indexing, but this will help for indirect indexing because constant-folding can't completely clean up the result. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno/drm: fix 64b iova shiftsRob Clark2019-09-031-10/+4
| | | | | | | Should shift before splitting 64b iova into dwords Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir: remove unused constant_fold_stateRob Clark2019-09-031-6/+0
| | | | | Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno: Fix the type of single-component scaled vertex attrs.Eric Anholt2019-09-034-12/+12
| | | | | | | | | | This looks like clear copy-and-pasteos, and fixes: dEQP-GLES2.functional.draw.random.40 (on A307 and A630, both tested in the new CI farm) Reviewed-by: Rob Clark <[email protected]>
* radeonsi/nir: Remove uniform variable scanningConnor Abbott2019-09-031-84/+7
| | | | | | | | | | | We can get all the information we need from NIR. It's slightly less accurate, but radeonsi doesn't use the extra information. The old code also overcounted atomic counters, which led to problems when everything was used at once. Fixes KHR-GL45.compute_shader.resources-max. Reviewed-by: Marek Olšák <[email protected]>
* ttn: Fill out more info fieldsConnor Abbott2019-09-031-0/+4
| | | | | | We'll use these in radeonsi. Reviewed-by: Marek Olšák <[email protected]>
* nir: Fix num_ssbos when lowering atomic countersConnor Abbott2019-09-033-6/+23
| | | | | | | | | | | | Otherwise it's impossible to know the maximum SSBO index for both internal TGSI shaders from TTN (which don't have any notion of atomic counters and no offset) as well as shaders from GLSL. I fixed everything I could find while grepping for num_ssbos and num_abos, which hopefully is everything (iris was the only user I could find that uses it in a meaningful way). Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: Fix gather4 integer wa with unnormalized coordinatesConnor Abbott2019-09-031-4/+26
| | | | | | | | | | | | | | This adds a bit of unneccesary code on radeonsi, since whether unnormalized coordinates are used is known at compile time with GL, but I wasn't sure if it was worth the few instructions to plumb everything through, especially for something so rare -- my shader-db doesn't have any instances where this changes anything. Fixes CTS tests I created at https://github.com/cwabbott0/VK-GL-CTS/tree/unnorm-gather-tests Acked-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: Rewrite gather4 integer workaround based on radeonsiConnor Abbott2019-09-031-65/+85
| | | | | | | | | | The workaround was originally written based on amdgpu-pro traces, but since then radeonsi has got its own slightly different version. Use the radeonsi version instead, to be consistent and because it'll be slightly more convenient for handling unnormalized coordinates. Acked-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* egl: warn user if they set an invalid EGL_PLATFORMEric Engestrom2019-09-031-0/+3
| | | | | | | | | Technically, the user might have set EGL_DISPLAY instead of EGL_PLATFORM, but since the former is deprecated let's just mention the latter in the warning message. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* panfrost: Remove panfrost_uploadAlyssa Rosenzweig2019-09-032-26/+0
| | | | | | | | | This routine was made obsolete over a series of reworks of memory allocation; Tomeu's changes to shader memory allocation finally made this unused as cppcheck noted. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* panfrost: Fix misc. issues flagged by cppcheckAlyssa Rosenzweig2019-09-033-10/+7
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* panfrost: Mark (1 << 31) as unsignedAlyssa Rosenzweig2019-09-031-3/+3
| | | | | | | I was not aware this incurred undefined behaviour; thank you cppcheck. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* pan/midgard: Remove mir_rewrite_index_*_tagAlyssa Rosenzweig2019-09-032-29/+0
| | | | | | | These helpers are unused, as flagged by cppcheck. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* pan/midgard: Remove mir_print_bundleAlyssa Rosenzweig2019-09-031-13/+0
| | | | | | | In practice, the new post-schedule print is just as useful. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* pan/midgard: Remove cppwrap.cppAlyssa Rosenzweig2019-09-032-10/+0
| | | | | | | | It has not been used in a long time; I forgot this file even existed. Flagged by cppcheck. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* pan/midgard: Fix cppcheck issuesAlyssa Rosenzweig2019-09-035-22/+27
| | | | | | | Miscellaneous minor issues flagged by cppcheck. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* pan/midgard: Correct issues in disassemble.cAlyssa Rosenzweig2019-09-031-23/+22
| | | | | | | cppcheck. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* pan/decode: Add missing format specifierAlyssa Rosenzweig2019-09-031-1/+1
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* pan/decode: Use portable format specifier for 64-bitAlyssa Rosenzweig2019-09-031-1/+1
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* pan/decode: Use %zu instead of %dAlyssa Rosenzweig2019-09-031-3/+3
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* pan/decode: Fix uninitialized variablesAlyssa Rosenzweig2019-09-031-2/+5
| | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Vizoso <[email protected]>
* docs: update calendar, add news item and link release notes for 19.1.6Juan A. Suarez Romero2019-09-033-7/+8
| | | | Signed-off-by: Juan A. Suarez Romero <[email protected]>
* docs: add sha256 checksums for 19.1.6Juan A. Suarez Romero2019-09-031-1/+1
| | | | | Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit 4ec2325dd07a768f2b52ea788ee76085586b2469)
* docs: add release notes for 19.1.6Juan A. Suarez Romero2019-09-031-0/+132
| | | | | Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit 85c8f88a49aa7c8aa866faed90a4a63330c15b8b)
* vulkan/overlay: bounce image back to present layoutLionel Landwerlin2019-09-031-2/+30
| | | | | | | | | | Once we write the overlay to an image to be presented, we must not forget to put it back into present layout. Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111401 Cc: <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* broadcom/vc4: Expand width of dst surfaceZhaowei Yuan2019-09-031-1/+1
| | | | | | | | | | | Four bytes of src_surf will be compressed into a 32-bits data and stored into dst_surf, and dst_surf is read as z-order, so its width must be aligned to multiples of 8(4x2) before divided by 2. Signed-off-by: Zhaowei Yuan <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111266 Reviewed-by: Alejandro Piñeiro <[email protected]>
* swr: Fix make_unique build error.Vinson Lee2019-09-021-3/+3
| | | | | | | | | | swr_shader.cpp: In function ‘void (* swr_compile_gs(swr_context*, swr_jit_gs_key&))(HANDLE, HANDLE, SWR_GS_CONTEXT*)’: swr_shader.cpp:732:44: error: ‘make_unique’ was not declared in this scope ctx->gs->map.insert(std::make_pair(key, make_unique<VariantGS>(builder.gallivm, func))); ^~~~~~~~~~~ Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Jan Zielinski <[email protected]>
* loader: include limits.h for PATH_MAXnia2019-09-021-0/+1
| | | | | | | | | This is needed to build on illumos. The location of the PATH_MAX definition in limits.h seems to be fairly standard: https://pubs.opengroup.org/onlinepubs/009695399/basedefs/limits.h.html Reviewed-by: Eric Engestrom <[email protected]>
* util: only allow _BitScanReverse64 on 64-bit cpusErik Faye-Lund2019-09-022-3/+3
| | | | | | | | | While the documentation for _BitScanReverse64 on MSDN says that it's available on ARM, this isn't true. It's only available on ARM64. So let's match reality. Signed-off-by: Erik Faye-Lund <[email protected]> Acked-by: Matt Turner <[email protected]>
* mesa/x86: improve SSE-checks for MSVCErik Faye-Lund2019-09-021-2/+2
| | | | | | | This enables some more SSE optimizations on MSVC builds. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* util: do not assume MSVC implies SSEErik Faye-Lund2019-09-021-4/+3
| | | | | | | This is not true for MSVC on ARM. Signed-off-by: Erik Faye-Lund <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* util: fix SSE-version needed for double opcodesErik Faye-Lund2019-09-021-1/+1
| | | | | | | | | This code generates CVTSD2SI, which requires SSE2. So let's fix the required SSE-version. Signed-off-by: Erik Faye-Lund <[email protected]> Fixes: 5de29ae (util: try to use SSE instructions with MSVC and 32-bit gcc) Reviewed-by: Matt Turner <[email protected]>
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