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* svga: don't use debug code in update_state() in release buildsBrian Paul2015-12-161-0/+4
* nv50,nvc0: free memory allocated by performance metricsSamuel Pitoiset2015-12-166-4/+22
* nvc0: free memory allocated by the prog which reads MP perf countersSamuel Pitoiset2015-12-161-0/+1
* nvc0: fix metric-achieved_occupancy calculation on KeplerSamuel Pitoiset2015-12-161-1/+4
* st/va: remove fence handling v3Christian König2015-12-165-22/+7
* Revert "i965: Use MESA_FORMAT_B8G8R8X8_SRGB for RGB visuals"Neil Roberts2015-12-161-6/+7
* i965: Fix crash when calling glViewport with no surface boundNeil Roberts2015-12-161-2/+4
* mesa/blit: Don't require the same format for mulitisample blitsNeil Roberts2015-12-161-2/+11
* st/va: retrieve size from the temporary img variableJulien Isorce2015-12-161-1/+1
* draw: handle edge flags in llvm pathRoland Scheidegger2015-12-162-26/+61
* draw: don't set start_instance and instance id for pt emitRoland Scheidegger2015-12-161-31/+31
* nir/lower_system_values: Refactor and use the builder.Jason Ekstrand2015-12-151-29/+31
* nir/builder: Add a load_system_value helperJason Ekstrand2015-12-152-10/+15
* nir/lower_system_values: Stop supporting non-SSAJason Ekstrand2015-12-151-8/+6
* nvc0: remove old comment related to metric calculationsSamuel Pitoiset2015-12-151-11/+0
* vc4: Add support for dumping executed commands to a file.Eric Anholt2015-12-153-0/+94
* vc4: Import updated vc4_drm.h with hang state.Eric Anholt2015-12-151-0/+45
* vc4: Only update vc4->msaa when the framebuffer changes.Eric Anholt2015-12-151-7/+0
* vc4: Don't consider nr_samples==1 surfaces to be MSAA.Eric Anholt2015-12-156-21/+25
* vc4: Fix min() wrapper definition for the simulator's kernel code.Eric Anholt2015-12-151-1/+1
* vc4: Warn instead of abort()ing on exec ioctl failures.Eric Anholt2015-12-151-3/+5
* docs: Replace sourceforge logo with a text linkAndreas Boll2015-12-152-5/+2
* radeonsi: fix perfcounter selection for SI_PC_MULTI_BLOCK layoutsNicolai Hähnle2015-12-151-1/+1
* gallium/radeon: remove unnecessary test in r600_pc_query_add_resultNicolai Hähnle2015-12-151-3/+0
* mesa/main: use BITSET_FOREACH_SET in perf_monitor_result_sizeNicolai Hähnle2015-12-151-4/+3
* docs: add news item and link release notes for 11.1.0Emil Velikov2015-12-152-0/+8
* docs: add sha256 checksums for 11.0.1Emil Velikov2015-12-151-1/+2
* docs: Update 11.1.0 release notesEmil Velikov2015-12-151-3/+188
* freedreno/a4xx: fix fragcoord.z + fragdepthRob Clark2015-12-152-5/+5
* freedreno: update generated headersRob Clark2015-12-156-92/+231
* freedreno/ir3/cmdline: don't dump nir by defaultRob Clark2015-12-151-3/+1
* st/va: remove nonesense HEVC picture id handlingChristian König2015-12-151-5/+0
* i965: Allocate URB space for HS and DS stages when required.Chris Forbes2015-12-153-36/+170
* docs: mark input/output block locations as DONETimothy Arceri2015-12-151-1/+1
* glsl: add support for explicit locations inside interface blocksTimothy Arceri2015-12-154-9/+105
* glsl: simplify interface matchingTimothy Arceri2015-12-151-108/+46
* draw: remove clip_vertex from vertex headerRoland Scheidegger2015-12-155-40/+54
* draw: use clip_pos, not clip_vertex for the fake guardband xy point clippingRoland Scheidegger2015-12-151-3/+3
* draw: rename vertex header membersRoland Scheidegger2015-12-156-42/+46
* draw: don't pretend have_clipdist is per-vertexRoland Scheidegger2015-12-155-18/+20
* draw: use position not clipVertex output for xyz view volume clippingRoland Scheidegger2015-12-151-1/+10
* i965: Use DIV_ROUND_UP() in gen7_urb.c code.Kenneth Graunke2015-12-141-9/+8
* i965: Make TES inputs match TCS outputs.Kenneth Graunke2015-12-141-0/+11
* i965: Force VS -> TCS varyings to use the SSO VUE map layout.Kenneth Graunke2015-12-142-2/+5
* i965: Handle TCS outputs and TES inputs.Kenneth Graunke2015-12-141-2/+112
* i965: Handle TCS inputs and TES outputs.Kenneth Graunke2015-12-141-1/+3
* i965: Add tessellation shader VUE map code.Kenneth Graunke2015-12-142-7/+107
* i965: Fix partial variable access for geometry shaders in SSO mode.Kenneth Graunke2015-12-141-4/+34
* i965: Separate base offset/constant offset combining from remapping.Kenneth Graunke2015-12-141-25/+70
* nir: Fix number of indices on shared variable store intrinsics.Kenneth Graunke2015-12-141-1/+1
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