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* nir/spirv: Beef up the type system a bitJason Ekstrand2017-07-052-28/+59
| | | | | | | | | This adds a vtn concept of base_type as well as a couple of other fields. This lets us be a tiny bit more efficient in some cases but, more importantly, it will eventually let us express things the GLSL type system can't. Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Compact vtn_typeJason Ekstrand2017-07-052-26/+39
| | | | | | | Use an anonymous union of structs to help keep the structure small and better organized. Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Simplify type copyingJason Ekstrand2017-07-051-7/+1
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Compute offsets for UBOs and SSBOs up-frontJason Ekstrand2017-07-052-27/+138
| | | | | | | | | Now that we have a pointer wrapper class, we can create offsets for UBOs and SSBOs up-front instead of waiting until we have the full access chain. For push constants, we still use the old mechanism because it provides us with some nice range information. Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Rework the way pointers get dereferencedJason Ekstrand2017-07-052-64/+88
| | | | | | | This has the advantage of moving all of the "extend an access chain" code into one place. Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Break variable creation out into a helperJason Ekstrand2017-07-051-172/+184
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Remove unneeded parameters from pointer_to_offsetJason Ekstrand2017-07-053-19/+8
| | | | | | | | Everyone now calls it with stop_at_matrix = false. Since we're now always walking all the way to the end of the access chain, the type returned is just the same as ptr->type; Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Simplify matrix loads/storesJason Ekstrand2017-07-052-100/+90
| | | | | | | | | | | | | | | | | | | | | Instead of handling all of the complexity at the end, we choose to decorate types a bit more cleverly. When we have a row-major matrix type, we give it the stride of a single vector and give it's array element type (which represents a column) the actual matrix stride. Previously, we were using stop_at_matrix and handling everything from matrix on down as special cases but now we walk the access chain all the way to the end and then load. Even though this looks like it may lead to a significant functional change, it doesn't. The reason why we needed to do stop_at_matrix before was to handle row-major properly since the offsets and strides would be all out-of-order. Now that row major matrix types have the small stride on the matrix and the large stride on the vector, offsetting to a single column of a row-major matrix works fine. The load/store code simply picks up on the fact that the stride isn't the type size and does multiple loads. The generated code from these methods should be the same. Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Use the correct stride for non-32-bit vectorsJason Ekstrand2017-07-051-1/+1
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Wrap access chains in a new vtn_pointer data structureJason Ekstrand2017-07-054-159/+187
| | | | | | | | | | | | The vtn_pointer structure provides a bit better abstraction than passing access chains around directly. For one thing, if the pointer just points to a variable, we don't need the access chain at all. Also, pointers know what their dereferenced type is so we can avoid passing the type in a bunch of places. Finally, pointers can, in theory, be extended to the case where you don't actually know what variable is being referenced. Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Rename some things from access_chain to pointerJason Ekstrand2017-07-054-82/+73
| | | | | | | We're about to add a vtn_pointer data structure and this will prevent some rename churn in the next commit. Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Split up Uniform and UniformConstant storage classesJason Ekstrand2017-07-051-3/+7
| | | | | | | | | We were originally handling them together because I was rather unclear on the distinction. However, keeping them combined keeps the confusion. Split them up so that it's more clear from the code how we expect the two storage classes to be used. Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Add a storage_class_to_mode helperJason Ekstrand2017-07-051-45/+78
| | | | Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Use the type from the deref for atomicsJason Ekstrand2017-07-051-3/+3
| | | | | | | Previously, we were using the type of the variable which is incorrect. Cc: "17.1" <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir/spirv: Move a "}"Jason Ekstrand2017-07-051-1/+1
| | | | | | | It's closing a "{" at the begining of a switch case. Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* i965: Move surface resolves back to draw/dispatch timeJason Ekstrand2017-07-054-121/+143
| | | | | | | | | | | | | | | | | This is effectively a revert of 388f02729bbf88ba104f4f8ee1fdf005a240969c though much code has been added since. Kristian initially moved it to try and avoid locking problems with meta-based resolves. Now that meta is gone from the resolve path (for good this time, we hope), we can move it back. The problem with having it in intel_update_state was that the UpdateState hook gets called by core mesa directly and all sorts of things will cause a UpdateState to get called which may trigger resolves at inopportune times. In particular, it gets called by _mesa_Clear and, if we have a HiZ buffer in the INVALID_AUX state, causes a HiZ resolve right before the clear which is pointless. By moving it back to try_draw_prims time, we know it will only get called right before a draw which is where we want it. Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Avoid set comprehension.Vinson Lee2017-07-051-1/+1
| | | | | | | | | | | | | | Fix build error on CentOS 6.9 with Python 2.6. GEN main/format_fallback.c File "./main/format_fallback.py", line 42 names = {fmt.name for fmt in formats} ^ SyntaxError: invalid syntax Fixes: a1983223d883 ("mesa: Add _mesa_format_fallback_rgbx_to_rgba() [v2]") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* ac/nir: Move VS position exports before param exports.Bas Nieuwenhuizen2017-07-051-55/+54
| | | | | | | | According to Nicolai the SX can already start work when all the position exports are done, so do those first. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Always set depthbuffer using image format instead of iview format.Bas Nieuwenhuizen2017-07-051-2/+2
| | | | | | | | We have some cases where changing between depth and stencil only aspect was causing hangs. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Dave Airlie <[email protected]>
* radv: Disable depth & stencil tests when the depthbuffer doesn't support it.Bas Nieuwenhuizen2017-07-056-11/+36
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Dave Airlie <[email protected]>
* egl: android: Fix potential use of unitialized variableTomasz Figa2017-07-051-1/+3
| | | | | | | | | | | If dri2_setup_extensions() fails, the "err" variable would not be assigned causing the error path to access an unitialized variable. Fix it by assigning an error message. Fixes: 2c341f2bda4 ("egl: refactor dri2_create_screen() into three separate functions") Signed-off-by: Tomasz Figa <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* intel: common: Fix link failure with standalone Android buildTomasz Figa2017-07-051-0/+5
| | | | | | | | | | | | | | | Some reshuffle in the Makefiles under src/intel resulted in Android libraries being no longer linked with code using src/intel/common/gen_debug.h that contains references to functions exported by those libraries (namely ALOGW macro, which is currently resolved into a call to __android_log_print() from cutils). Fix the build by taking into account ANDROID_CFLAGS and ANDROID_LIBS for affected module on Android NDK builds. Fixes: d5b355ce5fd ("i965: Move intel_debug.h to intel/common/gen_debug.h") Signed-off-by: Tomasz Figa <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Android: generate symlinks for all enabled gallium driversMauro Rossi2017-07-052-1/+2
| | | | | | | | | | | | Current post install command relies on GALLIUM_TARGET_DRIVERS variable, however variable needs to be initialized in src/gallium/Android.mk in order that all enabled gallium drivers symlinks are correctly generated. At the moment due to sorting of INC_DIRS and variable set with svga (vmwgfx) only vmwgfx_dri.so and virtio_gpu_dri.so symlinks are generated. Fixes: a3d98ca62f ("Android: use symlinks for driver loading") Reviewed-by: Emil Velikov <[email protected]>
* android: build imx-drm winsysTomeu Vizoso2017-07-053-2/+44
| | | | | | | | Add Android.mk for winsys/imx/drm. Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* android: add etnaviv driver build supportRob Herring2017-07-054-2/+78
| | | | | | | | Add etnaviv to Android makefiles. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* st/glsl_to_nir: fix edgeflag passthroughNicolai Hähnle2017-07-052-1/+6
| | | | | | | | | | We have to mark the additional shader input as used, otherwise it will be eliminated, and we have to setup its index correctly. This is a bit of a hack, but so is everything surrounding edgeflag passthrough. Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: use pipe_shader_type_from_mesaNicolai Hähnle2017-07-051-21/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* tgsi_from_mesa: add tgsi_get_gl_frag_result_semanticNicolai Hähnle2017-07-052-0/+40
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* tgsi_from_mesa: add pipe_shader_type_from_mesaNicolai Hähnle2017-07-051-0/+23
| | | | | | | | So... the pipe_ prefix doesn't really fit into a TGSI header; on the other hand, the return type has the pipe_ prefix. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* tgsi,st/mesa: move varying slot to semantic mapping into a helper for VSNicolai Hähnle2017-07-055-99/+203
| | | | | | | We will use this helper in radeonsi's NIR path. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ddebug: handle some cases of non-TGSI shadersNicolai Hähnle2017-07-053-6/+28
| | | | | | | | | | NIR shaders are not captured properly in pipelined mode currently. This would require shader cloning, which requires linking all the Gallium drivers against NIR. We can always do that later. v2: avoid immediate crashes in pipelined mode Reviewed-by: Marek Olšák <[email protected]> (v1)
* glsl_to_nir: zero-initialize var->data.descriptor_setNicolai Hähnle2017-07-051-0/+1
| | | | | | | This is convenient for backends that support both Vulkan and OpenGL while lowering samplers to derefs with nir_lower_samplers_as_deref. Reviewed-by: Timothy Arceri <[email protected]>
* glsl: add glsl_base_type_is_integerNicolai Hähnle2017-07-051-0/+11
| | | | | | We will use this from radeonsi/nir, which we want to keep as pure C code. Reviewed-by: Samuel Pitoiset <[email protected]>
* nir: add NIR_PRINT environment variableNicolai Hähnle2017-07-051-0/+19
| | | | Reviewed-by: Rob Clark <[email protected]>
* glsl/blob: add valgrind checks that written data is definedNicolai Hähnle2017-07-052-0/+13
| | | | | | | | | | | | | Undefined data will eventually trigger a valgrind error while computing its CRC32 while writing it into the disk cache, but at that point, it is basically impossible to track down where the undefined data came from. With this change, finding the origin of undefined data becomes easy. v2: remove duplicate VALGRIND_CFLAGS (Emil) Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* glsl: explicitly zero out padding to gl_shader_variable bitfieldNicolai Hähnle2017-07-051-1/+4
| | | | | | | | | | Otherwise, the padding bits remain undefined, which leads to valgrind errors when storing the gl_shader_variable in the disk cache. v2: use rzalloc instead of an explicit padding member variable Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: simplify add_uniform_to_shader::visit_fieldNicolai Hähnle2017-07-051-6/+5
| | | | | | | Each field gets a distinct name, so we should never hit the case where the name already exists in the parameter list. Reviewed-by: Timothy Arceri <[email protected]>
* glsl: look for multiple variables simultaneously with find_assignment_visitorNicolai Hähnle2017-07-051-41/+81
| | | | | | | | | | | | Save some passes over the IR. v2: redesign to make the users of find_assignments more readable v3: - fix missing ! - add some comments and make the num_found check more explicit (Timothy) Reviewed-by: Ian Romanick <[email protected]> (v1) Reviewed-by: Timothy Arceri <[email protected]>
* gallium/radeon: fix VDPAU breakage, need VRAM with WCMarek Olšák2017-07-051-1/+2
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* a5xx: enable polygon offset clampsIlia Mirkin2017-07-041-1/+3
| | | | | | | This is already set and emitted by the code. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: implement logicop supportIlia Mirkin2017-07-043-7/+13
| | | | | | | The former 0x60 hardcoded in is equivalent to ROP_COPY with the shift. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: enable polygon mode selectionIlia Mirkin2017-07-044-7/+24
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: disable ARB_depth_clamp for nowIlia Mirkin2017-07-041-1/+3
| | | | | | | | We need to figure out how to implement it properly. Right now it doesn't work at all. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: fix clip_halfz supportIlia Mirkin2017-07-043-4/+7
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: improve 3d texture samplingIlia Mirkin2017-07-041-3/+0
| | | | | | | | | At least the first level works now. Eventually the later levels stop working, there appears to be some alignment issue. But this improves the situation immensely. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: remove one of the MIPFILTER_LINEAR bitsIlia Mirkin2017-07-041-1/+0
| | | | | | | | | It doesn't appear to do what we want. Removing this bit makes lodclamp-between as well as a number of dEQP tests pass, with no visible ill effect. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: enable formats newly added to the headersIlia Mirkin2017-07-041-69/+69
| | | | | | | | | This enables S3TC, BPTC, ETC2, and ASTC texture decoding. Additionally this enables RGB32 texture buffer objects, as well as 11_11_10_FLOAT and 10_10_10_2 vertex formats (and related extensions). Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: include color swap when decoding verticesIlia Mirkin2017-07-041-0/+1
| | | | | | | This fixes support for BGRA vertex formats Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* a5xx: update headersIlia Mirkin2017-07-041-10/+47
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Rob Clark <[email protected]>
* gallium/radeon: attempt to fix a compiler failure in radeon_winsys.hMarek Olšák2017-07-041-1/+1
| | | | trivial.
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