summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
...
* radv/gfx10: make use the output usage mask when exporting NGG GS paramsSamuel Pitoiset2019-09-061-3/+8
* radv/gfx10: account for the subpass view for the NGG GS storageSamuel Pitoiset2019-09-061-0/+3
* panfrost/ci: Increase timeoutsTomeu Vizoso2019-09-061-2/+2
* panfrost/ci: Use special runner for LAVA jobsTomeu Vizoso2019-09-061-9/+1
* panfrost/ci: Re-add support for armhfTomeu Vizoso2019-09-064-28/+39
* radv: calculate esgs_itemsize in the shader info passSamuel Pitoiset2019-09-062-14/+20
* radv: calculate the GSVS vertex size in the shader info passSamuel Pitoiset2019-09-062-15/+11
* radv: gather primitive ID in the shader info passSamuel Pitoiset2019-09-062-3/+17
* radv: gather layer in the shader info passSamuel Pitoiset2019-09-062-10/+20
* radv: gather viewport in the shader info passSamuel Pitoiset2019-09-062-8/+3
* radv: gather pointsize in the shader info passSamuel Pitoiset2019-09-062-8/+3
* radv: gather clip/cull distances in the shader info passSamuel Pitoiset2019-09-062-21/+25
* radv: move ac_fill_shader_info() to radv_nir_shader_info_pass()Samuel Pitoiset2019-09-062-45/+38
* radv: merge radv_shader_variant_info into radv_shader_infoSamuel Pitoiset2019-09-066-293/+275
* radeon: Fix mjpeg issue for ARCTURUSZhu, James2019-09-061-0/+1
* radeon/vcn: add RENOIR VCN decode supportLeo Liu2019-09-061-4/+4
* glsl: Fix unroll of do{} while(false) like loopsDanylo Piliaiev2019-09-062-17/+41
* tgsi_to_nir: Remove dependency on libglsl.Timur Kristóf2019-09-062-14/+18
* nir: Carve out nir_lower_samplers from GLSL code.Timur Kristóf2019-09-065-127/+159
* radeonsi: Release storage for smda_uploads when the context is destroyedGert Wollny2019-09-061-0/+1
* android: mesa: revert "Enable asm unconditionally"Mauro Rossi2019-09-064-0/+14
* radv/gfx10: always set ballot_mask_bits to 64Samuel Pitoiset2019-09-061-2/+1
* nir/lower_explicit_io: Handle 1 bit loads and storesCaio Marcelo de Oliveira Filho2019-09-051-9/+24
* Revert "intel/fs: Move the scalar-region conversion to the generator."Jason Ekstrand2019-09-064-5/+5
* intel/fs: Fix FB write inst groupsJason Ekstrand2019-09-061-1/+1
* lima/ppir: don't lower phis to scalarVasily Khoruzhick2019-09-051-1/+0
* freedreno/a2xx: formats updateJonathan Marek2019-09-065-250/+106
* freedreno/a2xx: fix depth gmem restoreJonathan Marek2019-09-061-15/+12
* freedreno/a2xx: implement polygon offsetJonathan Marek2019-09-062-0/+14
* freedreno/a2xx: fix SRC_ALPHA_SATURATE for alpha blend functionJonathan Marek2019-09-061-1/+6
* freedreno/a2xx: ir2: update register state in scalar insertJonathan Marek2019-09-061-0/+6
* freedreno/a2xx: ir2: fix incorrect instruction reorderingJonathan Marek2019-09-061-0/+16
* freedreno/a2xx: ir2: check opcode on the right instruction in export cpJonathan Marek2019-09-061-1/+1
* freedreno/a2xx: ir2: fix saturate in cpJonathan Marek2019-09-061-0/+4
* freedreno/a2xx: ir2: set lower_fdphJonathan Marek2019-09-061-0/+1
* freedreno/a2xx: ir2: remove pointcoord y invertJonathan Marek2019-09-061-4/+2
* freedreno/a2xx: ir2: fix lowering of instructions after float loweringJonathan Marek2019-09-061-3/+2
* lima/ppir: don't lower vector {b,f}csel to scalar if condition is scalarVasily Khoruzhick2019-09-061-5/+21
* nir: allow specifying filter callback in lower_alu_to_scalarVasily Khoruzhick2019-09-0616-67/+113
* util: android logging supportRob Clark2019-09-062-2/+21
* freedreno/ir3: allow copy propagation for relativeRob Clark2019-09-061-9/+19
* freedreno/ir3: fix cp cmps.s optRob Clark2019-09-061-1/+1
* freedreno/ir3: assert that only single addressRob Clark2019-09-062-0/+5
* freedreno/ir3: fix mad copy propagation special caseRob Clark2019-09-061-9/+35
* freedreno/ir3: fix addr/pred spillingRob Clark2019-09-061-7/+42
* freedreno/ir3: cleanup "partially const" ubo srcsRob Clark2019-09-061-4/+52
* lima/ppir: improve regalloc spill cost calculationErico Nunes2019-09-051-5/+49
* lima/ppir: optimizations in regalloc spilling codeErico Nunes2019-09-051-90/+88
* lima/ppir: mark regalloc created ssa unspillableErico Nunes2019-09-051-0/+1
* v3d: writes to magic registers aren't RF writes after THRENDJose Maria Casanova Crespo2019-09-051-1/+3