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* r600: port over the get_lds_unique_index from radeonsiDave Airlie2015-12-072-0/+39
| | | | | | On r600 this needs to subtract 9 due to texcoord interactions. Signed-off-by: Dave Airlie <[email protected]>
* r600: add set_tess_state callback.Dave Airlie2015-12-072-1/+12
| | | | | | | This just stores the values in the context to be used later when emitting the constant buffers. Signed-off-by: Dave Airlie <[email protected]>
* r600/eg: init tess registers to defaults (v1.1)Dave Airlie2015-12-071-10/+31
| | | | | | | | | | This initialises the tess min/max using fglrx values, and also initialises a number of other registers related to tessellation. v1.1: caicos doesn't have some registers. Signed-off-by: Dave Airlie <[email protected]>
* r600: hook up constants/samplers/sampler view for tessellationDave Airlie2015-12-072-10/+82
| | | | | | | This hooks the resources to the correct hw shaders when tess is enabled. Signed-off-by: Dave Airlie <[email protected]>
* r600: add create/bind/delete shader hooks for tessellationDave Airlie2015-12-071-0/+59
| | | | | | This hooks up the gallium API for the tessellation shaders. Signed-off-by: Dave Airlie <[email protected]>
* r600/sb: add LS/HS hw shader types.Dave Airlie2015-12-073-3/+9
| | | | | | | This just adds printing for the hw shader types, and hooks it up. Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600/blit: add tcs/tes shader saves.Dave Airlie2015-12-071-0/+2
| | | | Signed-off-by: Dave Airlie <[email protected]>
* r600: disable SB for now on tess related shaders.Dave Airlie2015-12-071-0/+7
| | | | | | | Note we have to disable on vertex shaders when we are operating in tes mode. Signed-off-by: Dave Airlie <[email protected]>
* r600: update correct hw shaders depending on configuration.Dave Airlie2015-12-071-1/+12
| | | | | | | This updates the tess hw shaders from the sw ones routing things correctly. Signed-off-by: Dave Airlie <[email protected]>
* r600: add shader key entries for tcs and tes.Dave Airlie2015-12-075-3/+49
| | | | | | | with tessellation vs can now run on ls, and tes can run on vs or es, tcs runs on hs. Signed-off-by: Dave Airlie <[email protected]>
* r600: add PATCHES to the pipe conversion.Dave Airlie2015-12-071-0/+1
| | | | | | This just converts the value to the hw value. Signed-off-by: Dave Airlie <[email protected]>
* r600: add functions to update ls/hs state.Dave Airlie2015-12-072-0/+27
| | | | | | | This just adds the two functions, these will get hooked up later in the shader code. Signed-off-by: Dave Airlie <[email protected]>
* r600g/sb: Support LDS ops in SB bytecode I/OGlenn Kennard2015-12-074-9/+105
| | | | | | | This just adds the LDS ops to the SB bytecode reader/writers. Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: add support for LDS instruction encoding.Dave Airlie2015-12-074-2/+144
| | | | | | | | | | These are used in tessellation shaders to read/write values between VS/TCS/TES. This splits the eg alu assembler out to handle these instructions. Signed-off-by: Dave Airlie <[email protected]>
* r600/sb: add support for GDS to the sb decoder/dump. (v1.1)Dave Airlie2015-12-074-10/+93
| | | | | | | | | This just adds support to the decoder, not actual SB support. v1.1: fixup GDS relative mode. (Glenn). Reviewed-by: Glenn Kennard <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: add support for GDS clause to the assembler.Dave Airlie2015-12-074-1/+148
| | | | | | | This just adds enough for the tessellation shaders, which require TF_WRITE to work. Signed-off-by: Dave Airlie <[email protected]>
* r600: use macros for updating the various stages.Dave Airlie2015-12-071-15/+25
| | | | | | | These macros will make things easier to see when tess is added to the mix. Signed-off-by: Dave Airlie <[email protected]>
* r600: add SET_NULL_SHADER macro.Dave Airlie2015-12-071-2/+7
| | | | | | This is used to set a hw shader to NULL. Signed-off-by: Dave Airlie <[email protected]>
* r600: move clip misc and streamout stream updates to a single placeDave Airlie2015-12-071-6/+11
| | | | | | This will be updated in a macro later. Signed-off-by: Dave Airlie <[email protected]>
* r600: move selecting shaders into earlier code.Dave Airlie2015-12-071-5/+4
| | | | | | select the ps/gs/vs in that order then process the results. Signed-off-by: Dave Airlie <[email protected]>
* r600: use a macro to remove common shader selection code.Dave Airlie2015-12-071-12/+9
| | | | | | | | This function is going to get a lot messier with tessellation so I'm going to use some macros to try and clean some bits of common code up. Signed-off-by: Dave Airlie <[email protected]>
* r600: move to using hw stages array for hw stage atomsDave Airlie2015-12-075-32/+24
| | | | | | | | | | This moves to using an array of hw stages for the atoms. Note this drops the 23 from the vertex shader, this value is calculated internally when shaders are bound, so not required here. Signed-off-by: Dave Airlie <[email protected]>
* r600: make adjust_gprs use hw stages.Dave Airlie2015-12-072-55/+64
| | | | | | | | | | This changes the r600 specific GPR adjustment code to use the stage defines, and arrays. This is prep work for the tess changes later. Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: introduce HW shader stage definesDave Airlie2015-12-071-0/+11
| | | | | | | | | Add a list of defines for the HW stages. We will use this for GPR calculations amongst other things. Reviewed-by: Oded Gabbay <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600: fix masks for two of the unused evergreen regs.Dave Airlie2015-12-071-2/+2
| | | | Signed-off-by: Dave Airlie <[email protected]>
* gallium: Remove redundant NULL ptr checksEdward O'Callaghan2015-12-062-8/+5
| | | | | Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/drivers: Sanitize NULL checks into canonical formEdward O'Callaghan2015-12-0654-132/+132
| | | | | | | | | | Use NULL tests of the form `if (ptr)' or `if (!ptr)'. They do not depend on the definition of the symbol NULL. Further, they provide the opportunity for the accidental assignment, are clear and succinct. Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/auxiliary: Sanitize NULL checks into canonical formEdward O'Callaghan2015-12-0641-61/+61
| | | | | | | | | | Use NULL tests of the form `if (ptr)' or `if (!ptr)'. They do not depend on the definition of the symbol NULL. Further, they provide the opportunity for the accidental assignment, are clear and succinct. Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/auxiliary: Trivial code style cleanupEdward O'Callaghan2015-12-0625-91/+91
| | | | | Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/drivers: Trivial code-style cleanupEdward O'Callaghan2015-12-0616-58/+58
| | | | | Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/auxiliary: Fix zero integer literal to pointer comparisonEdward O'Callaghan2015-12-061-1/+1
| | | | | Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* winsys/amdgpu: Make use of ARRAY_SIZE macroEdward O'Callaghan2015-12-061-4/+2
| | | | | Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* svga: Make use of ARRAY_SIZE macroEdward O'Callaghan2015-12-062-2/+2
| | | | | Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* llvmpipe: Make use of ARRAY_SIZE macroEdward O'Callaghan2015-12-062-4/+4
| | | | | Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/drivers/nouveau: Make use of ARRAY_SIZE macroEdward O'Callaghan2015-12-0614-22/+20
| | | | | Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/radeon*: Remove useless castsEdward O'Callaghan2015-12-065-14/+11
| | | | | | | | These are unnecessary and are likely just left overs from prior work. Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* nv50/ir: fold shl + mul with immediatesIlia Mirkin2015-12-051-0/+16
| | | | | | | | | | | | | | On SM20 this gives: total instructions in shared programs : 6299222 -> 6294240 (-0.08%) total gprs used in shared programs : 944139 -> 944068 (-0.01%) total local used in shared programs : 54116 -> 54116 (0.00%) local gpr inst bytes helped 0 126 2781 2781 hurt 0 55 11 11 Signed-off-by: Ilia Mirkin <[email protected]>
* nv50/ir: propagate indirect loads into instructionsIlia Mirkin2015-12-051-0/+52
| | | | | | | | | | | | | | | | This way $r1 = $r0 + 4; c1[$r1] becomes c1[$r0+4]. On SM35: total instructions in shared programs : 6206257 -> 6185058 (-0.34%) total gprs used in shared programs : 911045 -> 910722 (-0.04%) total local used in shared programs : 39072 -> 39072 (0.00%) local gpr inst bytes helped 0 417 4195 4195 hurt 0 280 0 0 Signed-off-by: Ilia Mirkin <[email protected]>
* nv50/ir: flip shl(add, imm) into add(shl, imm)Ilia Mirkin2015-12-051-4/+34
| | | | | | | | | | | | | | | | | This works when the add also has an immediate. This often happens in address calculations. These addresses can then be inlined as well. On code targeted to SM35: total instructions in shared programs : 6223346 -> 6206257 (-0.27%) total gprs used in shared programs : 911075 -> 911045 (-0.00%) total local used in shared programs : 39072 -> 39072 (0.00%) local gpr inst bytes helped 0 119 3664 3664 hurt 0 74 15 15 Signed-off-by: Ilia Mirkin <[email protected]>
* vc4: Fix accidental scissoring when scissor is disabled.Eric Anholt2015-12-051-5/+23
| | | | | | | | Even if the rasterizer has scissor disabled, we'll have whatever vc4->scissor bounds were last set when someone set up a scissor, so we shouldn't clip to them in that case. Fixes piglit fbo-blit-rect, and a lot of MSAA tests once they're enabled.
* vc4: Disable RCL blitting when scissors are enabled.Eric Anholt2015-12-051-0/+3
| | | | | | | | We could potentially handle scissored blits when they're tile aligned, but it doesn't seem worth it. If you're doing a scissored blit, you're probably a testcase. Fixes piglit's fbo-scissor-blit fbo
* vc4: Bring over cleanups from submitting to the kernel.Eric Anholt2015-12-054-87/+78
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* nvc0: expose a group of performance metrics for SM30 (Kepler)Samuel Pitoiset2015-12-052-2/+8
| | | | | | | This allows to monitor these performance metrics through GL_AMD_performance_monitor. Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: re-introduce performance metrics for SM30 (Kepler)Samuel Pitoiset2015-12-052-5/+188
| | | | | | | This implements more performance metrics than the previous support, but some other metrics still need to be figured out. Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: remove useless counting operations for MP countersSamuel Pitoiset2015-12-051-101/+5
| | | | | | Those bits were related to old performance metrics support. Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: remove old performance metrics support on KeplerSamuel Pitoiset2015-12-052-37/+0
| | | | | | | These performance metrics will be re-introduced in an upcoming patch that will follow the same design as Fermi. Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: remove wrong inst_issued HW SM perf counter on KeplerSamuel Pitoiset2015-12-052-3/+0
| | | | | | | inst_issued is performance metric not a hardware event on Kepler (SM30). It will be re-introduced in an upcoming patch. Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: add missing HW SM perf counters for SM30 (Kepler)Samuel Pitoiset2015-12-053-0/+10
| | | | | | | SM30 is the compute capability version for GK104/GK106/GK107. This also introduces a new signal group selection called UNK0F. Signed-off-by: Samuel Pitoiset <[email protected]>
* nvc0: fix the comment that describe MP counters storage on KeplerSamuel Pitoiset2015-12-051-0/+5
| | | | Signed-off-by: Samuel Pitoiset <[email protected]>
* freedreno/ir3: nir shader prints with 'disasm' debug optionRob Clark2015-12-051-2/+2
| | | | | | | | Move these to 'disasm' instead of the more verbose 'optmsgs' since, like the tgsi dumps, it is useful without the more verbose compiler logging enabled. Signed-off-by: Rob Clark <[email protected]>
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