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* iris: Enable INTEL_shader_integer_functions2Ian Romanick2020-01-232-0/+10
| | | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* gallium: Add a cap bit for integer multiplication between 32-bit and 16-bitIan Romanick2020-01-233-0/+3
| | | | | | | | | | | | | | Driver supports integer multiplication between a 32-bit integer and a 16-bit integer. If the second operand is 32-bits, the upper 16-bits are ignored, and the low 16-bits are possibly sign extended as necessary. Iris will eventually enable this. Not sure about other drivers. v2: Add default value to u_screen.c. Suggested by Caio. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* gallium: Add a cap bit for OpenCL-style extended integer functionsIan Romanick2020-01-233-0/+5
| | | | | | | | | | | | Iris will eventually enable this. Looking at the header files, it looks like Midgard could also enable it. Basically, any GPU that fully supports OpenCL can. v2: Add default value to u_screen.c. Suggested by Caio. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* i965: Enable INTEL_shader_integer_functions2 on Gen8+Ian Romanick2020-01-233-0/+8
| | | | | | | | | | | v2: Use new lower_hadd64 and lower_usub_sat64 flags. v3: Enable SPIR-V capability. v4: Move lowering options to COMMON_SCALAR_OPTIONS. Suggested by Caio. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* spirv: Add support for IntegerFunctions2INTEL capabilityIan Romanick2020-01-232-0/+5
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* spirv: Silence a bunch of unused parameter warningsIan Romanick2020-01-231-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change to get_uniform_nir_atomic_op make it look like the other get_*_nir_atomic_op functions. The rest just add UNUSED or ASSERTED to parameters required for some of the interfaces. src/compiler/spirv/spirv_to_nir.c: In function ‘struct_member_decoration_cb’: src/compiler/spirv/spirv_to_nir.c:673:47: warning: unused parameter ‘val’ [-Wunused-parameter] struct vtn_value *val, int member, ^~~ src/compiler/spirv/spirv_to_nir.c: In function ‘struct_member_matrix_stride_cb’: src/compiler/spirv/spirv_to_nir.c:778:50: warning: unused parameter ‘val’ [-Wunused-parameter] struct vtn_value *val, int member, ^~~ src/compiler/spirv/spirv_to_nir.c: In function ‘type_decoration_cb’: src/compiler/spirv/spirv_to_nir.c:805:61: warning: unused parameter ‘ctx’ [-Wunused-parameter] const struct vtn_decoration *dec, void *ctx) ^~~ src/compiler/spirv/spirv_to_nir.c: In function ‘spec_constant_decoration_cb’: src/compiler/spirv/spirv_to_nir.c:1359:70: warning: unused parameter ‘v’ [-Wunused-parameter] spec_constant_decoration_cb(struct vtn_builder *b, struct vtn_value *v, ^ src/compiler/spirv/spirv_to_nir.c: In function ‘handle_workgroup_size_decoration_cb’: src/compiler/spirv/spirv_to_nir.c:1407:43: warning: unused parameter ‘data’ [-Wunused-parameter] void *data) ^~~~ src/compiler/spirv/spirv_to_nir.c: In function ‘vtn_handle_function_call’: src/compiler/spirv/spirv_to_nir.c:1806:55: warning: unused parameter ‘opcode’ [-Wunused-parameter] vtn_handle_function_call(struct vtn_builder *b, SpvOp opcode, ^~~~~~ src/compiler/spirv/spirv_to_nir.c:1807:54: warning: unused parameter ‘count’ [-Wunused-parameter] const uint32_t *w, unsigned count) ^~~~~ src/compiler/spirv/spirv_to_nir.c: In function ‘get_uniform_nir_atomic_op’: src/compiler/spirv/spirv_to_nir.c:2548:47: warning: unused parameter ‘b’ [-Wunused-parameter] get_uniform_nir_atomic_op(struct vtn_builder *b, SpvOp opcode) ^ src/compiler/spirv/spirv_to_nir.c: In function ‘vtn_handle_atomics’: src/compiler/spirv/spirv_to_nir.c:2633:48: warning: unused parameter ‘count’ [-Wunused-parameter] const uint32_t *w, unsigned count) ^~~~~ src/compiler/spirv/spirv_to_nir.c: In function ‘vtn_handle_barrier’: src/compiler/spirv/spirv_to_nir.c:3197:48: warning: unused parameter ‘count’ [-Wunused-parameter] const uint32_t *w, unsigned count) ^~~~~ src/compiler/spirv/spirv_to_nir.c: In function ‘vtn_handle_execution_mode’: src/compiler/spirv/spirv_to_nir.c:3618:68: warning: unused parameter ‘data’ [-Wunused-parameter] const struct vtn_decoration *mode, void *data) ^~~~ Acked-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* nir/spirv: Translate SPIR-V to NIR for new INTEL_shader_integer_functions2 ↵Ian Romanick2020-01-232-0/+35
| | | | | | | | | | | | | | | opcodes v2: Rebase on 272e927d0e9 ("nir/spirv: initial handling of OpenCL.std extension opcodes") v3: Add missing SpvOpUCountTrailingZerosINTEL case to switch in vtn_handle_body_instruction. Remove stray semicolon in vtn_nir_alu_op_for_spirv_opcode. Use umin instead of umax for SpvOpUCountTrailingZerosINTEL "lowering" in vtn_handle_alu. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* intel/fs: Implement support for NIR opcodes for INTEL_shader_integer_functions2Ian Romanick2020-01-231-0/+67
| | | | | | | | | | | | | | | | | | | | | v2: Remove smashing type to D for nir_op_irhadd. Caio noticed it was odd, and removing it fixes an assertion failure in the crucible func.shader.averageRounded.int64_t test (because the source should be W). v3: Emit BRW_OPCODE_MUL directly for nir_op_umul_32x16 and nir_op_imul_32x16. Suggested by Curro. v4: Smash types of MUL instruction generated for nir_op_umul_32x16 and nir_op_imul_32x16. With this change, I get the same assembly now as I did with v2. v5: Remove support for pre-Gen7. The integer multiply path was incorrect, and, since the extension isn't enabled pre-Gen7, there's no way to test it. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* intel/fs: Add SHADER_OPCODE_[IU]SUB_SAT pseudo-opsIan Romanick2020-01-233-0/+101
| | | | | | | | | | | | | v2: Add a big comment explaining the [IU]SUB_SAT lowering. Suggested by Caio. v3: Use get_fpu_lowered_simd_width in get_lowered_simd_width. Suggested by Ken on IRC. v4: Fix a typo in a comment. Noticed by Caio. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* intel/fs: Don't lower integer multiplies that don't need loweringIan Romanick2020-01-231-0/+11
| | | | | | | | | v2: Move the check to fs_visitor::lower_integer_multiplication. Previously the cases where lowering was skipped, the original instruction was removed by fs_visitor::lower_integer_multiplication. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* compiler: Translate GLSL IR to NIR for new INTEL_shader_integer_functions2 ↵Ian Romanick2020-01-231-0/+30
| | | | | | | | | | expressions v2: Rebase on 272e927d0e9 ("nir/spirv: initial handling of OpenCL.std extension opcodes") Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* nir/algebraic: Add lowering for 64-bit iadd_sat and isub_satIan Romanick2020-01-231-0/+50
| | | | | | | | v2: Rearranged and expand the comment about the optimizations applied to the lowering. Suggested by Caio. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* nir/algebraic: Add lowering for 64-bit uadd_satIan Romanick2020-01-231-0/+1
| | | | | | | | Fixes piglit fs-addsaturate-uint64 and vs-addsaturate-uint64 on Ice Lake. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* nir/algebraic: Add lowering for 64-bit usub_satIan Romanick2020-01-232-0/+18
| | | | | | | | | | | | | v2: Rebase on 272e927d0e9 ("nir/spirv: initial handling of OpenCL.std extension opcodes") v3: Add a new lower_usub_sat64 flag that only applies to the 64-bit version of the nir_op_usub_sat instruction. v4: Also enable the lowering when nir_lower_iadd64 is set. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> [v3] Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* nir/algebraic: Add lowering for 64-bit hadd and rhaddIan Romanick2020-01-232-0/+26
| | | | | | | | | | | | | v2: Rebase on 272e927d0e9 ("nir/spirv: initial handling of OpenCL.std extension opcodes") v3: Add a new lower_hadd64 flag that only applies to the 64-bit versions of the instructions. v4: Also enable the lowering when nir_lower_iadd64 is set. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> [v3] Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* nir/algebraic: Add lowering for uabs_usub and uabs_isubIan Romanick2020-01-231-0/+3
| | | | | | | v2: Remove some rebase failures noticed by Caio. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* nir: Add new instructions for INTEL_shader_integer_functions2Ian Romanick2020-01-231-0/+17
| | | | | | | | | | | | | | | uctz isn't added because it will implemented in the GLSL path and the SPIR-V path using other pre-existing instructions. v2: Avoid signed integer overflow for uabs_isub(0, INT_MIN). Noticed by Caio. v3: Alternate fix for signed integer overflow for abs_sub(0, INT_MIN). I tried the previous methon in a small test program with -ftrapv, and it failed. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> [v1] Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* glsl: Add built-in functions for INTEL_shader_integer_functions2Ian Romanick2020-01-231-0/+311
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* glsl_types: Add function to get an unsigned base type from a signed typeIan Romanick2020-01-231-0/+21
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* glsl: Add new expressions for INTEL_shader_integer_functions2Ian Romanick2020-01-235-0/+133
| | | | | | | | | | | | | | | | v2: Re-write iadd64_saturate and isub64_saturate to avoid undefined overflow behavior. Also fix copy-and-paste bug in isub64_saturate. Suggested by Caio. v3: Avoid signed integer overflow for abs_sub(0, INT_MIN). Noticed by Caio. v4: Alternate fix for signed integer overflow for abs_sub(0, INT_MIN). I tried the previous methon in a small test program with -ftrapv, and it failed. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* mesa: Extension boilerplate for INTEL_shader_integer_functions2Ian Romanick2020-01-234-0/+5
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/767>
* intel/compiler: Move Gen4/5 rounding to visitorMatt Turner2020-01-224-37/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gen4/5's rounding instructions operate differently than later Gens'. They all return the floor of the input and the "Round-increment" conditional modifier answers whether the result should be incremented by 1.0 to get the appropriate result for the operation (and thus its behavior is determined by the round opcode; e.g., RNDZ vs RNDE). Since this requires a second instruciton (a predicated ADD) that consumes the result of the round instruction, the round instruction cannot write its result directly to the (write-only) message registers. By emitting the ADD in the generator, the backend thinks it's safe to store the round's result directly to the message register file. To avoid this, we move the emission of the ADD instruction to the NIR translator so that the backend has the information it needs. I suspect this also fixes code generated for RNDZ.SAT but since Gen4/5 don't support GLSL 1.30 which adds the trunc() function, I couldn't write a piglit test to confirm. My thinking is that if x=-0.5: sat(trunc(-0.5)) = 0.0 But on Gen4/5 where sat(trunc(x)) is implemented as rndz.r.f0 result, x // result = floor(x) // set f0 if increment needed (+f0) add result, result, 1.0 // fixup so result = trunc(x) then putting saturate on both instructions will give the wrong result. floor(-0.5) = -1.0 sat(floor(-0.5)) = 0.0 // +1 increment would be needed since floor(-0.5) != trunc(-0.5) sat(sat(floor(-0.5)) + 1.0) = 1.0 Fixes: 6f394343b1f ("nir/algebraic: i2f(f2i()) -> trunc()") Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2355 Reviewed-by: Ian Romanick <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3459> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3459>
* meson: Do not require libdrm for DRI2 on hurdSamuel Thibault2020-01-221-1/+3
| | | | | | | | Cc: 19.3 <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Signed-off-by: Samuel Thibault <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3231> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3231>
* util: Do not fail to build on unknown pthread_setname_npSamuel Thibault2020-01-221-1/+1
| | | | | | | | | | | This is only used for debugging, so better making porting on various systems less hard. Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Samuel Thibault <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3229> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3229>
* loader: #define PATH_MAX when undefined (eg. Hurd)Samuel Thibault2020-01-221-0/+5
| | | | | | | Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Samuel Thibault <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3228> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3228>
* util/atomic: fix return type of p_atomic_add_return() fallbackEric Engestrom2020-01-221-1/+1
| | | | | | | | | Fixes: 385d13f26d2b69db9423 ("util/atomic: Add a _return variant of p_atomic_add") Reviewed-by: Ivan Briano <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3012> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3012>
* gallium: dmabuf support for yuv formats that are not natively supportedJames Xiong2020-01-223-10/+26
| | | | | | | | | | V2 (Kenneth Graunke): added a helper function to check if every format is supported Signed-off-by: James Xiong <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2846> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2846>
* intel/compiler: Return early if read() failedEmmanuel Gil Peyrot2020-01-221-1/+4
| | | | | | | | This was the only warning I could see while compiling Iris. Reviewed-by: Matt Turner <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2821> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2821>
* intel/perf: adapt to platforms like Solaris without d_type in struct direntAlan Coopersmith2020-01-222-5/+25
| | | | | | | | | | | | Signed-off-by: Alan Coopersmith <[email protected]> [Eric: factor out the is_dir_or_link() check and fix a bug in v1] Signed-off-by: Eric Engestrom <[email protected]> v3: include directory path when lstat'ing files v4: fix inverted check in enumerate_sysfs_metrics() Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2258> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2258>
* llvmpipe: drop LLVM < 3.4 supportEric Engestrom2020-01-221-4/+0
| | | | | | | | | We don't support < 3.9 anymore, so this code is dead. Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2760> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2760>
* egl: drop confusing mincore() error messageEric Engestrom2020-01-221-2/+0
| | | | | | | | | | | | A user came to me asking how to fix this error, but it's entirely expected that `get_wl_surface_proxy()` on recent enough wayland compositors will always print it. Let's just remove the message altogether, it is basically never useful. Reviewed-by: Matt Turner <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3219> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3219>
* aco: fix off-by-one error when initializing sgpr_live_inRhys Perry2020-01-221-1/+1
| | | | | | | | | Signed-off-by: Rhys Perry <[email protected]> Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2394 Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler') Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3511> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3511>
* radv: fix double free corruption in radv_alloc_memory()Samuel Pitoiset2020-01-221-1/+0
| | | | | | | | | | | | If the driver fails to allocate memory for some reasons, it shouldn't free the 'mem' object twice. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/2302 Fixes: 825ddfee599 ("radv: Handle device memory alloc failure with normal free.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3508> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3508>
* gitlab-ci: Use single if for manual job rules entryMichel Dänzer2020-01-221-2/+1
| | | | | | | | | | | | I thought multiple ifs would all need to match, but looks like only the last one (or either one?) does. This should prevent a manual pipeline from getting created after merging changes which can't affect the pipeline. Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3474> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3474>
* gitlab-ci: Set GIT_STRATEGY to none for the dummy jobMichel Dänzer2020-01-221-0/+2
| | | | | | | It doesn't need anything from the Git repository. Reviewed-by: Eric Engestrom <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3474>
* util/u_thread: Fix build under HaikuX5122020-01-221-1/+7
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* haiku/hgl: Fix build via header reorderingAlexander von Gluck IV2020-01-221-2/+4
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* aco: fix operand kill flags when a temporary is used more than onceRhys Perry2020-01-221-2/+6
| | | | | | | | | | | | | | | | | | | | Helps create v_mac_f32 from v_mad_f32(b, a, b) Totals from affected shaders: SGPRS: 35824 -> 35824 (0.00 %) VGPRS: 33460 -> 33456 (-0.01 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 2187264 -> 2180976 (-0.29 %) bytes LDS: 127 -> 127 (0.00 %) blocks Max Waves: 3802 -> 3802 (0.00 %) Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3486> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3486>
* panfrost/midgard: Add missing lowering passes for type/size conversion opsBoris Brezillon2020-01-221-13/+34
| | | | | | | | | | Replace the manual type/size conversion lowering description by one that's automatically generated and covers all type/size conversions. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Add 64 bits float <-> int convertersBoris Brezillon2020-01-221-0/+5
| | | | | | | | The 64 bit converter cases were missing, add them now. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Fix mir_print_instruction() for branch instructionsBoris Brezillon2020-01-221-7/+31
| | | | | | | | Branch instructions should not be treated as regular ALUs. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Add f2f64 supportBoris Brezillon2020-01-221-2/+4
| | | | | | | | So we can convert floats into doubles. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Factorize f2f and u2u handlingBoris Brezillon2020-01-221-20/+7
| | | | | | | | | | Those size conversion operations work the same way apart from f2f using an fmov op code and u2u using an imov. Let's handle them in the same case block to avoid code duplication. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Make sure promote_fmov() only promotes 32-bit imovsBoris Brezillon2020-01-221-0/+1
| | | | | | | | | mir_constant_float() assumes we're dealing with 32-bit integers/floats, which is only the case if reg_mode is equal to midgard_reg_mode_32. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Rework mir_adjust_constants() to make it type/size agnosticBoris Brezillon2020-01-221-94/+69
| | | | | | | | | | Right now, constant combining is not supported in 16 bit mode, and 64 bit mode is simply ignored. Let's rework the function to make it type/bit-size agnostic. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* panfrost/midgard: Use a union to manipulate embedded constantsBoris Brezillon2020-01-228-49/+85
| | | | | | | | | | | | Each instruction bundle can contain up to 16 constant bytes. The meaning of those byte is instruction dependent: it depends on the instruction native type (int, uint or float) and the instruction reg_mode (8, 16, 32 or 64 bit). Those different layouts can be exposed as a union to facilitate constants manipulation. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3478>
* anv: ensure prog params are initialized with 0sLionel Landwerlin2020-01-221-1/+1
| | | | | | | | | | | | | | | | | | As a result of 9baa33cef01f our backend compiler leaves params pretty much untouched. So in order to avoid storing uninitialized values in the shader cache blobs, just 0 out this array. I've considered not even allocating this array which works on gen8+ but the vec4 backend still makes a copy of this array and so it crashes on memcpy on HSW. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 9baa33cef01f ("anv: Rework push constant handling") Reported-by: Tapani Pälli <[email protected]> Acked-by: Jason Ekstrand <[email protected]> Acked-by: Tapani Pälli <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3516> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3516>
* panfrost: Fix crash in compute variant allocationAlyssa Rosenzweig2020-01-221-1/+2
| | | | | | | Signed-off-by: Alyssa Rosenzweig <[email protected]> Fixes: d8a3501f1b2 ("panfrost: Dynamically allocate shader variants") Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3515> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3515>
* etnaviv: drm: Don't miscalculate timeoutGuido Günther2020-01-221-3/+2
| | | | | | | | | | The current code overflows (s * 1000000000) for s >= 5 but that is e.g. used in etna_bo_cpu_prep. Signed-off-by: Guido Günther <[email protected]> Reviewed-by: Jonathan Marek <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3509> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3509>
* egl: Fix _eglPointerIsDereferencable w/o mincore()Alexander van der Grinten2020-01-221-3/+4
| | | | | | | | | | | | | | | | On platforms without mincore(), _eglPointerIsDereferencable() currently just checks whether p != NULL. This is not sufficient: In the Wayland platform code (i.e., in get_wl_surface_proxy()), _eglPointerIsDereferencable() is called on the version field of `struct wl_egl_window` which is 3 on current versions of Wayland. This causes a segfault when trying to dereference p. Fix this behavior by assuming that the first page of the process is never dereferencable. Reviewed-by: Eric Engestrom <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3103> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3103>
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