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* intel/ir: Fix CFG corruption in opt_predicated_break().Francisco Jerez2019-08-012-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Specifically the optimization of a conditional BREAK + WHILE sequence into a conditional WHILE seems pretty broken. The list of successors of "earlier_block" (where the conditional BREAK was found) is emptied and then re-created with the same edges for no apparent reason. On top of that the list of predecessors of the block immediately after the WHILE loop is emptied, but only one of the original edges will be added back, which means that potentially several blocks that still have it on their list of successors won't be on its list of predecessors anymore, causing all sorts of hilarity due to the inconsistency in the control flow graph. The solution is to remove the code that's removing valid edges from the CFG. cfg_t::remove_block() will already clean up after itself. The assert in bblock_t::combine_with() also needs to be removed since we will be merging a block with multiple children into the first one of them. Found the issue on a hardware enabling branch originally, but apparently somebody reproduced the same problem independently on master in the meantime. Fixes: d13bcdb3a9f ("i965/fs: Extend predicated break pass to predicate WHILE.") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111009 Cc: [email protected] Cc: Sergii Romantsov <[email protected]> Cc: Matt Turner <[email protected]> Cc: [email protected] Tested-by: Paul Chelombitko <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* intel/device: make internal functions privateMark Janes2019-08-012-84/+68
| | | | | | | | | | | | | The device info initializer makes several fuctions internal: - handling of device override - updating topology from kernel information The implementation file is slightly reordered due to the renamed functions being static. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/device: rename gen_get_device_infoMark Janes2019-08-0112-20/+22
| | | | | | | | | | | | | | | | | | Rename the original device info initialization routine so callers don't mistakenly call the wrong one: gen_get_device_info_from_fd: Queries kernel for full device info, including topology details. gen_get_device_info_from_pci_id: Partially initializes device info based on PCI ID lookup, when the kernel is not available. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/tools: use device info initializerMark Janes2019-08-011-22/+3
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: use initialization routine for gen_device_infoMark Janes2019-08-011-15/+7
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* iris/screen: use initialization routine for gen_device_infoMark Janes2019-08-011-5/+3
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965: Move device info initialization to common codeMark Janes2019-08-014-114/+143
| | | | | | | | | | | With perf queries, initializing the device info is much more complex than just getting a PCI ID and calling gen_get_device_info. This commit adds a new gen_get_device_info_from_fd helper in common code which does all of the requisite kernel queries to get device info including all of the topology information. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/perf: verify kernel support before registering OA metricsMark Janes2019-08-011-0/+44
| | | | | | | | | | When gen_device_info updates the topology in it's initializer, the kernel queries will fail silently. Iris and anv have minimum kernel requirements that support the queries. i965 must verify kernel support before reporting OA metrics. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/common: provide common ioctl routineMark Janes2019-08-016-95/+89
| | | | | | | | | | | i965 links against libdrm for drmIoctl, but anv and iris both re-implement this routine to avoid the dependency. intel/dev also needs an ioctl wrapper, so lets share the same implementation everywhere. Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* panfrost: Remove unused argumentAlyssa Rosenzweig2019-08-014-4/+1
| | | | | | A relic from when we didn't have an online compiler, hah. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Handle MESA_SHADER_COMPUTE in compile callbackAlyssa Rosenzweig2019-08-011-0/+5
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/midgard: Use standard list traversal to find initial tagAlyssa Rosenzweig2019-08-011-7/+4
| | | | | | | | Fixes a hang (and abort) on empty shaders, which you shouldn't have anyway but better safe than sorry. DCE going on the fritz is no reason to freeze the system. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Use gl_shader_stage directly for compilesAlyssa Rosenzweig2019-08-014-32/+9
| | | | | | No need to add a third set of enums to the mix. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Emit "draw" info for compute jobsAlyssa Rosenzweig2019-08-011-0/+2
| | | | | | | Important fields relating to shader state and UBOs are filled out from this (misnomer) function. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Feed compute shaders into the compilerAlyssa Rosenzweig2019-08-011-3/+25
| | | | | | | | The path for compute shader compiles resembles the graphic shader compile path, although it is substantially simpler as we don't need any shader keying. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Expose compute shaders as panfrost_shader_variantsAlyssa Rosenzweig2019-08-012-2/+14
| | | | | | Whether variants are packed by graphics or compute is irrelevant. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Remove shader state *baseAlyssa Rosenzweig2019-08-012-4/+0
| | | | | | It is now unused. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Remove CSO dependency from shader_compileAlyssa Rosenzweig2019-08-013-10/+26
| | | | | | | We want this routine to be generic across graphics and compute, so let the caller deal with the typing. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Generalize UBO upload for other shader stagesAlyssa Rosenzweig2019-08-011-4/+7
| | | | | | Now that everything is unified, this generalization is nice and easy. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Guard vertex upload by ctx->vertex != NULLAlyssa Rosenzweig2019-08-011-1/+2
| | | | | | This is irrelevant for graphics but matters for compute workloads. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Generalize vertex shader uploadAlyssa Rosenzweig2019-08-011-11/+21
| | | | | | This allows us to reuse the same code path for compute. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Share gl_enables between VERTEX/COMPUTEAlyssa Rosenzweig2019-08-011-0/+3
| | | | | | Catch-all for magic bits. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Invoke compute shader according to grid infoAlyssa Rosenzweig2019-08-011-0/+6
| | | | | | | | We already have helpers for packing invocations (due to its role in instanced vertex shaders), so we can reuse this drop in for compute shaders. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Explain and include compute FBDAlyssa Rosenzweig2019-08-011-0/+17
| | | | | | | | | | | Squint at it hard enough and you realize it's the beginning of an SFBD... I guess... A compute shader with register spilling would be able to confirm this, but we would expect to see the first field | 1 and an address splattered later, setting up TLS. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Unify-driven cleanupAlyssa Rosenzweig2019-08-011-20/+6
| | | | | | Again, now that stages are unified some logic goes away. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Unify ctx->vs and ctx->fsAlyssa Rosenzweig2019-08-013-25/+21
| | | | | | | It's a little verbose, but this way we can support other shader stages without too much contortion. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Flesh out launch_grid stubAlyssa Rosenzweig2019-08-011-4/+23
| | | | | | | It's still incomplette, but we're able to hook into launch_grid to create a stub COMPUTE job. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Cleanup via payload unificationAlyssa Rosenzweig2019-08-011-20/+8
| | | | | | Since these are now indexable, quite a bit of code cleans up. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Unify payload_vertex/payload_tilerAlyssa Rosenzweig2019-08-013-58/+57
| | | | | | | Rather than disparate variables, let's use an array of payloads indexed by the shader stage. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Only wallpaper if we drew somethingAlyssa Rosenzweig2019-08-011-1/+1
| | | | | | | last_tiler.gpu may be NULL at flush time despite no clear and existing jobs -- if we executed a compute-only workload. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Adjust shader CAPs to expose dEQP computeAlyssa Rosenzweig2019-08-011-2/+1
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Expose NIR as our PIPE_SHADER_CAP_SUPPORTED_IRSAlyssa Rosenzweig2019-08-011-1/+1
| | | | | | | We *could* expose TGSI as well -- we pipe it through tgsi_to_nir for Gallium-internal shaders anyway -- but we'd rather not. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Copy freedreno's panfrost_get_compute_paramAlyssa Rosenzweig2019-08-011-0/+70
| | | | | | | Values reported here aren't remotely correct, but it's a start to just get the entrypoint stubbed out. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Expose COMPUTE-related caps for GLES3.1Alyssa Rosenzweig2019-08-011-4/+8
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stub out launch_gridAlyssa Rosenzweig2019-08-011-0/+13
| | | | | | Just dumps some information about the invocation for later debug. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stub out compute CSOAlyssa Rosenzweig2019-08-014-0/+68
| | | | | | Doesn't do anything, just gets the functions there. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Implement gl_FrontFacingAlyssa Rosenzweig2019-08-014-0/+27
| | | | | | | Interestingly, this requires no compiler changes. It's just exposed as a special varying. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Add support for decoding gl_FrontFacingAlyssa Rosenzweig2019-08-012-1/+11
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Use max varying index as varying buffer countAlyssa Rosenzweig2019-08-011-6/+6
| | | | | | | This allows us to decode asymmetric varyings correctly, which occurs with e.g. gl_FrontFacing. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* iris: add support for gl_ClipVertex in tess eval shadersTimothy Arceri2019-08-014-2/+37
| | | | | | Required for OpenGL compat support. Reviewed-by: Kenneth Graunke <[email protected]>
* iris: add support for gl_ClipVertex in geometry shadersTimothy Arceri2019-08-014-21/+57
| | | | | | This will enable us to support the OpenGL compat profile. Reviewed-by: Kenneth Graunke <[email protected]>
* nir: Stop whacking gl_FrontFacing to a system valueJason Ekstrand2019-08-015-7/+7
| | | | | | | | | | We have a cap bit for gallium and a GLSL compiler flag to control this. Just trust what GLSL gives us and stop forcing it. In order for this to be safe, we have to advertise another cap in some of the gallium drivers. Reviewed-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* panfrost: Implement panfrost_set_shader_buffers callbackAlyssa Rosenzweig2019-08-012-0/+18
| | | | | | | Just copy over the passed SSBO for now. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gallium/util: Add util_set_shader_buffers_mask helperAlyssa Rosenzweig2019-08-012-0/+42
| | | | | | | | | | Conceptually follows util_set_vertex_buffers_mask but for SSBOs. v2: Fix missing ~ when clearing mask. Adjust mask behaviour to match freedreno/v3d when buffer == NULL. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* kmsro: move entry points from etnaviv to kmsroJonathan Marek2019-08-011-3/+3
| | | | | | | | | These drivers are kmsro drivers so they should be part of the kmsro #if This fixes missing imx_drm driver when building with only freedreno+kmsro Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* gitlab-ci: remove software-properties-commonEmil Velikov2019-08-011-6/+5
| | | | | | | | | | | Currently we use the python package to manage repositories. At the same time we also do that by hand - since it's a trivial echo to a file. Stay consistent, remove the package and manage things manually. Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* st/mesa: fix MSVC compile breakageBrian Paul2019-08-011-2/+2
| | | | Trivial.
* virgl: Enable depth_clamp by lowering if the host is new enough.Gert Wollny2019-08-012-1/+8
| | | | | Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Reviewed-by: Marek Olšák <[email protected]>
* gallium: Make PIPE_CAP_DEPTH_CLIP_DISABLE a tri-state value and use itGert Wollny2019-08-012-1/+6
| | | | | | | | | | | Use value "2" to signal that lowering is needed and supported and enable it accordingly. v2: - Note in CAP description that this lowering currently requires TGSI - use "true" instead of GL_TRUE (both Erik) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Reviewed-by: Marek Olšák <[email protected]>
* mesa/st: Signal state changes when depth_clamp is emulatedGert Wollny2019-08-011-1/+25
| | | | | | | | | | | | | v1 implemented by Erik Faye-Lund <[email protected]> v2: - Add GS and TES - fix constants state update flags (Erik) v3: don't update rasterizer when depth_clamp is lowered (Erik) v4: Correct NewDepthClamp and also set flags for NewClipControl (Erik) v5: Also set shader_has_one_variant property acording to possible depth_clamp lowering (Marek) Signed-off-by: Gert Wollny <[email protected]> Reviewed-by: Reviewed-by: Marek Olšák <[email protected]>
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