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* Revert "nir: assert that nir_lower_tex runs after lowering derefs"Kenneth Graunke2020-01-131-6/+0
| | | | | | | | | This reverts commit 4cda61f11e922fb5914ae73d22cc0c495abf0377 for now, as it appears to break i965 CI (32,000+ failures). Rob and I suspect we need to do the equivalent of 1c6a2efa06e9bb5914f4557118930fc61065a467 on i965 - we are doing nir_lower_tex and brw_nir_lower_resources in the wrong order and that's likely triggering this condition. Once we fix that, we should put this patch back.
* zink: fixup initialization of operand_mask / num_extra_operandsErik Faye-Lund2020-01-141-2/+2
| | | | | | This doesn't change behavior, but makes the code a bit easier to read. Both values are zero, but I somehow swapped the logical meaning of them when initializing.
* mesa: Fix detection of invalidating both depth and stencil.Eric Anholt2020-01-131-2/+3
| | | | | | | | | | | Fixes an extra 1024x1024x4 MSAA Z/S store on WebGL fishtank on cheza. Reported-by: Dave Airlie <[email protected]> Fixes: db2ae5112106 ("mesa: Skip partial InvalidateFramebuffer of packed depth/stencil.") Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Rob Clark <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3370> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3370>
* mesa/st: lower samplers before nir_lower_texRob Clark2020-01-131-0/+4
| | | | | | | | | | Fixes incorrect lowering of YUV samplers when there are non-yuv samplers. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3368> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3368>
* nir: assert that nir_lower_tex runs after lowering derefsRob Clark2020-01-131-0/+6
| | | | | | | | | It isn't going to do the right thing, because texture_index/ sampler_index defaults to zero. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3368>
* i965: support EXT_EGL_image_storageGurchetan Singh2020-01-132-0/+30
| | | | | | i965 can support this. Reviewed-by: Tapani Pälli <[email protected]>
* i965: refactor intel_image_target_texture_2dGurchetan Singh2020-01-131-4/+15
| | | | | | | intel_image_target_texture_tex_storage can reuse much of this code. Reviewed-by: Tapani Pälli <[email protected]>
* i965: track if image is created by a dmabufGurchetan Singh2020-01-132-0/+2
| | | | | | Will be used by EXT_EGL_image_storage later. Reviewed-by: Tapani Pälli <[email protected]>
* dri_util: add driImageFormatToSizedInternalGLFormat functionGurchetan Singh2020-01-132-45/+82
| | | | | | | | | | | This is needed to implement the EXT_EGL_image_storage spec: "If <target> is GL_TEXTURE_2D, then the resultant texture must have a sized internal format which is colorspace and size compatible with the dma-buf. If the GL is unable to determine such a format, the error INVALID_OPERATION is generated." Reviewed-by: Tapani Pälli <[email protected]>
* glapi / teximage: implement EGLImageTargetTexStorageEXTGurchetan Singh2020-01-139-7/+142
| | | | | | | Check various parts of the EXT_EGL_image_storage spec, and add a new vfunc for drivers implementing it. Reviewed-by: Tapani Pälli <[email protected]>
* teximage: split out helper from EGLImageTargetTexture2DOESGurchetan Singh2020-01-131-18/+29
| | | | | | | | | | | | | | | The major differences between EXT_EGL_image_storage and EGLImageTargetTexture2DOES are: (1) The texture target is made immutable (2) EXT_EGL_image_storage supports non-2D targets. We can reuse EGLImageTargetTexture2D and FreeTextureImageBuffer for (1) pretty easily. For (2), let's just not support the complicated targets. Let's reuse aspects of the EGLImageTargetTexture2DOES implementation. Reviewed-by: Tapani Pälli <[email protected]>
* anv: Memset array propertiesJason Ekstrand2020-01-131-0/+5
| | | | | | | | | | | This is probably better than possibly leaving those bytes uninitialized even if the app will theoretically not use them. Cc: [email protected] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Ivan Briano <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3369> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3369>
* anv: Don't over-advertise descriptor indexing featuresJason Ekstrand2020-01-131-15/+17
| | | | | | | | | We should only advertise sub-features if we advertise the extension. Fixes: 6e230d7607f "anv: Implement VK_EXT_descriptor_indexing" Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Ivan Briano <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3369>
* intel/blorp: Fill out all the dwords of MI_ATOMICJason Ekstrand2020-01-131-0/+4
| | | | | | | | | This makes us valgrind clean again. Fixes: 9175c7058efb "intel/blorp: Make blorp update the clear color..." Reviewed-by: Lionel Landwerlin <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3366> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3366>
* gitlab-ci: Upgrade kernel for LAVA jobs to v5.5-rc5Tomeu Vizoso2020-01-132-2/+2
| | | | | | | | Some fixes got in that should prevent hangs in lima jobs. Signed-off-by: Tomeu Vizoso <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3363> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3363>
* aco: fix unconditional demote_to_helperDaniel Schürmann2020-01-132-13/+16
| | | | | | | | | | This patch fixes an out-of-bounds access on p_exit_early and binds the exec register to the correct operand. Fixes: 2ea9e59e8d976ec77800d2a20645087b96d1e241 ('aco: move s_andn2_b64 instructions out of the p_discard_if') Reviewed-by: Rhys Perry <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3347> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3347>
* radeonsi: don't enable VBOs in user SGPRs if compute-based culling can be usedMarek Olšák2020-01-133-30/+46
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: put up to 5 VBO descriptors into user SGPRsMarek Olšák2020-01-1310-62/+148
| | | | | | | | | | | | | | | | | | | | | gfx6-8: 1 VBO descriptor in user SGPRs gfx9-10: 5 VBO descriptors in user SGPRs We no longer pull up to 5 VBO descriptors from GTT when SDMA is disabled. Totals from affected shaders: SGPRS: 1110528 -> 1170528 (5.40 %) VGPRS: 952896 -> 951936 (-0.10 %) Spilled SGPRs: 83 -> 61 (-26.51 %) Spilled VGPRs: 0 -> 0 (0.00 %) Private memory VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 23766296 -> 22843920 (-3.88 %) bytes LDS: 0 -> 0 (0.00 %) blocks Max Waves: 179344 -> 179344 (0.00 %) Wait states: 0 -> 0 (0.00 %) Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* ac,radeonsi: increase the maximum number of shader args and return valuesMarek Olšák2020-01-132-7/+8
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: simplify si_set_vertex_buffersMarek Olšák2020-01-131-7/+8
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: don't allow draw calls with uninitialized VS inputsMarek Olšák2020-01-133-1/+8
| | | | | | These always hang, because vertex buffer descriptors are not set up. Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: add si_context::num_vertex_elementsMarek Olšák2020-01-133-11/+7
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* radeonsi: rename desc_list_byte_size -> vb_desc_list_alloc_sizeMarek Olšák2020-01-135-11/+9
| | | | Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
* anv: set stencil layout for input attachmentsLionel Landwerlin2020-01-131-6/+14
| | | | | | | | | | | | | | If an input attachment has a stencil format, we need to set this. v2: Fish out VkAttachmentReferenceStencilLayoutKHR from VkAttachmentReference2KHR::pNext (Jason) Signed-off-by: Lionel Landwerlin <[email protected]> Reported-by: Samuel Pitoiset <[email protected]> Fixes: c1c346f16673 ("anv: implement VK_KHR_separate_depth_stencil_layouts") Reviewed-by: Jason Ekstrand <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2891> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2891>
* anv: Drop an unused variableJason Ekstrand2020-01-131-1/+0
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* nir/lower_atomics_to_ssbo: Also lower barriersJason Ekstrand2020-01-1310-15/+7
| | | | | | | | | | | This is more correct for a pass which is supposed to completely lower away atomic counters. It also lets us stop supporting atomic counter barriers in most of the drivers. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Rename nir_intrinsic_barrier to control_barrierJason Ekstrand2020-01-1318-24/+30
| | | | | | | | This is a more explicit name now that we don't want it to be doing any memory barrier stuff for us. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* intel/nir: Stop adding redundant barriersJason Ekstrand2020-01-131-14/+0
| | | | | | | | | | Now that both GLSL and SPIR-V are adding shared and tcs_patch barriers (as appropreate) prior to the nir_intrinsic_barrier, we don't need to do it ourselves in the back-end. This reverts commit 26e950a5de01564e3b5f2148ae994454ae5205fe. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir/glsl: Emit memory barriers as part of barrier()Jason Ekstrand2020-01-131-0/+12
| | | | | | | | | | | | The GLSL barrier() intrinsic does an implicit shared memory barrier in compute shaders and an implicit TCS patch output barrier in tessellation control shaders. We'd like NIR's barrier intrinsic to just be a control flow barrier and not have memory implications. To satisfy this, we need to add an extra memory barrier in front of each nir_intrinsic_barrier. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* spirv: Add output memory semantics to OpControlBarrier in TCSJason Ekstrand2020-01-131-3/+21
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* spirv: Add a workaround for OpControlBarrier on old GLSLangJason Ekstrand2020-01-132-1/+24
| | | | | | | | | | | As per the Vulkan memory model, the proper translation of GLSL barrier() is an OpControlBarrier with a scope of Workgroup and semantics of Acquire, Release, and WorkgroupMemory. Older versions of GLSLang gave an OpControlBarrier with semantics of None so we need to patch it up on those versions. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Add a new memory_barrier_tcs_patch intrinsicJason Ekstrand2020-01-1312-0/+32
| | | | | | | | | | | Right now, it's implemented as a no-op for everyone. For most drivers, it's a switch case in the NIR -> whatever which just breaks. For ir3, they already have code to delete tessellation barriers so we just add a case to also delete memory_barrier_tcs_patch. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* llmvpipe: No-op implement more barriersJason Ekstrand2020-01-131-0/+3
| | | | | Acked-by: Dave Airlie <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Handle barriers with more granularity in combine_storesJason Ekstrand2020-01-131-5/+9
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Handle more barriers in dead_write and copy_propJason Ekstrand2020-01-132-0/+22
| | | | | Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* intel/vec4: Support scoped_memory_barrierJason Ekstrand2020-01-131-1/+2
| | | | | | Fixes: 06aecb14c0476 "anv: Implement VK_KHR_vulkan_memory_model" Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* lima: Add stencil supportAndreas Baierl2020-01-132-27/+64
| | | | | | | | | | | | | | This re-enables and fixes support for stencil buffer. It fixes 365 stencil related deqp tests. All tests that use INCR, INCR_WRAR, DECR and DECR_WRAP as a stencil op still fail, but they also fail with the blob, so we may ignore that for now. We still have dEQP-GLES2.functional.depth_stencil_clear.depth_stencil_masked failing, which is strange because it's the only one out of the depth_stencil_clear.* set. Reviewed-by: Vasily Khoruzhick <[email protected]> Signed-off-by: Andreas Baierl <[email protected]>
* lima/parser: Make rsw alpha blend parsing more readableAndreas Baierl2020-01-131-4/+5
| | | | | Reviewed-by: Vasily Khoruzhick <[email protected]> Signed-off-by: Andreas Baierl <[email protected]>
* panfrost: Remove unneeded phi nodesBoris Brezillon2020-01-131-0/+1
| | | | | | | | | Add a pass to remove unneeded phi nodes as done in other drivers. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3294> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3294>
* aco: check if multiplication/clamp is live when applying output modifierRhys Perry2020-01-131-18/+24
| | | | | | | | | | | | | | It's possible that a multiplication/clamp is dead code and the single use is from a different user. Fixes portal rendering in Path of Exile when global illumination is enabled. Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler') Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: disable add combining for ds_swizzle_b32Rhys Perry2020-01-131-1/+1
| | | | | | | | | ds_bpermute_b32/ds_permute_b32 are fine, I think Signed-off-by: Rhys Perry <[email protected]> Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler') Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: don't DCE atomics with return valuesRhys Perry2020-01-135-19/+26
| | | | | | | | | | We don't create atomics with definitions if they are not used in NIR, but our own DCE can remove the uses if an export turns out to be null. Signed-off-by: Rhys Perry <[email protected]> Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler') Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: set exec_potentially_empty for demotesRhys Perry2020-01-131-0/+6
| | | | | | | Signed-off-by: Rhys Perry <[email protected]> Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler') Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: better handle neg/abs of sgprsRhys Perry2020-01-131-2/+3
| | | | | | | | | isel/label_instruction currently doesn't create these but we should probably check anyway. Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: check usesModifiers() when identifying a neg/absRhys Perry2020-01-131-2/+2
| | | | | | | | | This was fine because a literal used to mean that it didn't use modifiers, but now VOP3 can take a literal on GFX10. Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: handle omod successors with the constant in the first operandRhys Perry2020-01-131-6/+8
| | | | | | | | No pipeline-db changes Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: handle VOP3 modifiers when combining a constant comparison's NaN testRhys Perry2020-01-131-0/+6
| | | | | | | | No pipeline-db changes Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: fix uninitialized data in the binaryRhys Perry2020-01-131-1/+5
| | | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler') Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: fix imageSize()/textureSize() with large buffers on GFX8Rhys Perry2020-01-131-19/+15
| | | | | | | | | | | | Tested on Navi by using dEQP-VK.image.image_size.buffer.* and the GFX8 path with the size multipled by the stride. dEQP-VK.image.image_size.buffer.* was also run with the tests modified to use a 96bit format. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler') Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
* aco: set vm for pos0 exports on GFX10Rhys Perry2020-01-132-3/+6
| | | | | | | | | RADV's LLVM backend and radeonsi does the same thing. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Cc: 19.3 <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3081>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 17:54:17 +0000