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* compiler/blob: Switch to init/finish instead of create/destroyJason Ekstrand2017-10-125-87/+80
| | | | | | | | | There's no reason why that tiny bit of memory needs to be on the heap. We always put blob_reader on the stack, so why not do the same with the writable blob. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* compiler: Move blob up a levelJason Ekstrand2017-10-126-6/+6
| | | | | | | | We're going to want to use the blob for Vulkan pipeline caching so it makes sense to have it in libcompiler not libglsl. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* meson: Add inc_compiler to the libglsl includesJason Ekstrand2017-10-121-1/+1
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* glsl/blob: Return false from grow_to_fit if we've ever failedJason Ekstrand2017-10-122-1/+13
| | | | | | | | | | | | Otherwise we could have a failure followed by a smaller write that succeeds and get a corrupted blob. If we ever OOM, we should stop. v2 (Jason Ekstrand): - Initialize the new boolean member in create_blob Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Cc: [email protected]
* glsl/blob: Return false from ensure_can_read on overrunJason Ekstrand2017-10-121-0/+3
| | | | | | | | | Otherwise, if you have a large read fail and then try to do a small read, the small read may succeed even though it's at the wrong offset. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Cc: [email protected]
* i965: Share the flush for brw_blorp_miptree_download into a pboChris Wilson2017-10-123-31/+24
| | | | | | | | | | | | | As all users of brw_blorp_miptree_download() must emit a full pipeline and cache flush when targetting a user PBO (as that PBO may then be subsequently bound or *be* bound anywhere and outside of the driver dirty tracking) move that flush into brw_blorp_miptree_download() itself. v2 (Ken): Rebase without userptr stuff so it can land sooner. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* meta: Delete the PBO texture upload/download pathJason Ekstrand2017-10-124-97/+0
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use blorp instead of meta for PBO pixel readsJason Ekstrand2017-10-121-9/+51
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use blorp instead of meta for PBO texture downloadsJason Ekstrand2017-10-121-4/+29
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/tex: Use blorp texture upload for all CCS_E texturesJason Ekstrand2017-10-121-1/+2
| | | | | | | | | | | This improves the FillTex benchmark in GLBench 2.7 by 30% on my Broxton. On Ken's Broxton which only has single-channel ram, it improves by 210%. v2 (Ken): Check mt->aux_usage == ISL_AUX_USAGE_CCS_E rather than using intel_miptree_is_lossless_compressed(). Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Use blorp instead of meta for PBO texture uploadsJason Ekstrand2017-10-121-4/+30
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Add blorp-based texture upload and download pathsJason Ekstrand2017-10-122-0/+362
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v1 (Topi Pohjolainen): original patch. v2 (Topi Pohjolainen): - Fix return value (s/MESA_FORMAT_NONE/false/) (Anuj) - Move _mesa_tex_format_from_format_and_type() just in the end avoiding additional if-block (Anuj) - Explain better the array alignment restriction (Anuj) - Do not bail out in case of gl_pixelstore_attrib::ImageHeight, it is handled by _mesa_image_offset() automatically (Ken). - Support 1D_ARRAY by flipping depth, width and y, z (Ken). v3 (Topi Pohjolainen): - Contrary to v2, do not try to handle gl_pixelstore_attrib::ImageHeight. Currently there are no tests in piglit or cts for it. One could possibly copy or modify tests/texturing/texsubimage.c. There, however, seems to be number of corner cases to consider. Moreover, current meta path applies the packing height for both source and targets when determining the offset. This would probably require re-visiting also. v4 (Topi Pohjolainen): Rebased on top of merged drm-bacon v5 (Jason Ekstrand): - Move to brw_blorp.c - Significant refactoring - Fixed 1-D array textures - Simplified handling of PBOs vs. CPU data. - Handle gl_pixelstore_attrib::ImageHeight. It turns out there are piglit tests that cover this. The original version was failing them because of an error in the way it handled 1-D array textures. - Add support for texture download v6 (Kenneth Graunke): Rebase fixes: - Use intel_miptree_check_level_layer instead of deleted fields - Update for mesa_format_supports_render[] rename. - Pass 'false' (read-only) to intel_bufferobj_buffer v7 (Kenneth Graunke): - Fix brw_blorp_download_miptree to pass 'false' (not read only) for the destination buffer (caught by Chris Wilson). - Fix blorp_get_client_bo to pass intel_bufferobj_buffer !read_only for the 'writable' parameter instead of 'false' (caught by Jason). - Support GL_BGR, GL_BGRA, GL_BGRA_INTEGER, GL_BGR_INTEGER, allowing us to use this for ReadPixels on the window system buffer (caught by Chris Wilson). - Fix y-flipping bugs in download path (exposed by BGRA support). - Fix false vs. NULL return value in blorp_get_client_bo. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Refactor y-flipping coordinate transform.Kenneth Graunke2017-10-121-7/+11
| | | | | | I want to reuse it for the BLORP download path. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/tex: Check if there is data to upload up-frontJason Ekstrand2017-10-121-0/+4
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/barrier: Do the correct flushes for framebuffer accessJason Ekstrand2017-10-121-1/+1
| | | | | | | | | Framebuffer access includes framebuffer reads so we need to invalidate the texture cache. We do not, however, need to flush the depth cache because you cannot do bind a depth texture as an image. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/barrier: Do the correct flushes for texture updatesJason Ekstrand2017-10-121-2/+4
| | | | | | | | | Texture uploads and downloads may go through the render pipe which may result in texturing from or rendering to the texture or the PBO. We need to flush accordingly. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* include: Revert out the update of the Khronos GLX extension header.Eric Anholt2017-10-121-11/+1
| | | | | | | | They made a mistake in the MESA_swap_control XML, which I'm pursuing in their github. Until then, we can just back this piece out. Tested-by: Mark Janes <[email protected]> Reviewed-by: Mark Janes <[email protected]>
* i965: Ignore GL_SKIP_DECODE_EXT for textures accessed via texelFetch().Kenneth Graunke2017-10-121-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GL_EXT_texture_sRGB_decode spec says: "The conversion of sRGB color space components to linear color space is always performed if the texel lookup function is one of the texelFetch builtin functions. Otherwise, if the texel lookup function is one of the texture builtin functions or one of the texture gather functions, the conversion of sRGB color space components to linear color space is controlled by the TEXTURE_SRGB_DECODE_EXT parameter. If the TEXTURE_SRGB_DECODE_EXT parameter is DECODE_EXT, the conversion of sRGB color space components to linear color space is performed. If the TEXTURE_SRGB_DECODE_EXT parameter is SKIP_DECODE_EXT, the value is returned without decoding. However, if the texture is also accessed with a texelFetch function, then the result of texture builtin functions and/or texture gather functions may be returned with decoding or without decoding." This patch makes i965 force sRGB decoding for any textures accessed via texelFetch(). If textures are accessed via texelFetch() and a regular texture access function, this will affect the other ones too - which is fine - it's undefined according to the last paragraph quoted. We could make both work, but we'd have to emit multiple SURFACE_STATEs, and have two binding table sections, like we do for texture gather hacks on older platforms. Fixes the following Android O CTS test: dEQP-GLES31.functional.srgb_texture_decode.skip_decode.srgba8.texel_fetch Reviewed-by: Jason Ekstrand <[email protected]>
* meta: Unset the textures_used_by_txf bitfield.Kenneth Graunke2017-10-121-0/+13
| | | | | | | | | | | Drivers that use Meta are happily using blitting data using texelFetch and GL_SKIP_DECODE_EXT, but the GL_EXT_texture_sRGB spec unfortunately makes GL_SKIP_DECODE_EXT not necessarily work with texelFetch. As a hack, just unset the texture_used_by_txf bitfield so we can continue with the old desired behavior. Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Make nir_shader_gather_info() track texelFetch texture accesses.Kenneth Graunke2017-10-121-1/+13
| | | | | | | | For TGSI-based drivers, st_glsl_to_tgsi records this information. For NIR-based drivers, nir_shader_gather_info() will do so. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* compiler: Move gl_program::TexelFetchSamplers to shader_info.Kenneth Graunke2017-10-124-3/+6
| | | | | | | I'd like to put this sort of metadata in the shader_info structure, rather than adding more things to gl_program. Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: take unsafe_math and sisched into account when hashing shaders.Dave Airlie2017-10-123-9/+24
| | | | | | | | | We want to generate different variants for sisched and unsafe_math shader variants, so add them to the hash key. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa/bufferobj: fix atomic offset/size getDave Airlie2017-10-131-2/+4
| | | | | | | | | | | When I realigned the bufferobj code, I didn't see the getters were different, realign the getters to work the same as ssbo. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103214 Fixes: 65d3ef7cd (mesa: align atomic buffer handling code with ubo/ssbo (v1.1)) Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Mark Janes <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* relnotes: document EGL_ANDROID_native_fence_sync on radeonsiMarek Olšák2017-10-121-0/+1
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* include: Update GL headers from khronos opengl registry.Eric Anholt2017-10-124-23/+84
| | | | | | | | Taken from their c6a99aff31874697741a08cbc8a3488606ce59c7, keeping the BUILDING_MESA hunk in place. Reviewed-by: Daniel Stone <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* mapi: Update extension number of MESA_tile_raster_order.Eric Anholt2017-10-121-2/+1
| | | | | Reviewed-by: Daniel Stone <[email protected]> Acked-by: Kenneth Graunke <[email protected]>
* broadcom/vc5: Remove the u_resource_vtbl usage.Eric Anholt2017-10-123-25/+18
| | | | Like for vc4, this was just a wasted indirection.
* mesa: Disallow GL_RED/GL_RG with half-floats on GLES2.Eric Anholt2017-10-121-0/+4
| | | | | | | | | Sure, you'd think that the combination of GL_OES_texture_half_float and GL_EXT_texture_rg would mean that GL_RG16F exists, but it doesn't. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103227 Fixes: c16a7443e999 ("mesa: Expose GL_OES_required_internalformat on GLES contexts.") Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: implement sync_file import/exportMarek Olšák2017-10-122-2/+79
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* winsys/amdgpu: implement sync_file import/exportMarek Olšák2017-10-124-8/+139
| | | | | | syncobj is used internally for interactions with command submission. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac: add radeon_info::has_sync_filecros-mesa-17.2.3-vanillachadv/cros-mesa-17.2.3-vanillaMarek Olšák2017-10-123-0/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* broadcom/vc5: Don't pair VPMSETUP with other peripheral access.Eric Anholt2017-10-121-0/+3
| | | | | The specs don't say you can't, but pairing it with an SFU write on the 7268 breaks all our simple shader tests using gl_MVP * gl_Vertex.
* broadcom/vc5: Fix inclusion of FS flag bits in dumping the FS address.Eric Anholt2017-10-121-1/+1
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* st/dri: implement __DRIimageExtension::validateUsage properlyMarek Olšák2017-10-121-8/+22
| | | | | Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: add pipe_screen::check_resource_capabilityMarek Olšák2017-10-125-0/+74
| | | | | | | | | This is optional (and no CAP). Implemented by radeonsi, ddebug, rbug, trace. Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: add ac_surface::is_displayableMarek Olšák2017-10-122-0/+13
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* amd/addrlib: add Addr2IsValidDisplaySwizzleModeMarek Olšák2017-10-124-2/+58
| | | | | | | | Some "standard" (_S) swizzle modes are displayable on Raven, even though the micro tile mode says it's not displayable. Expose the addrlib function to the driver. Reviewed-by: Nicolai Hähnle <[email protected]>
* meson: fix typo in isltournier.elie2017-10-121-1/+1
| | | | | | Signed-off-by: Elie Tournier <[email protected]> Reviewed-by: Antia Puentes <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* Android: disable i9x5 drivers on non-x86 buildsRob Herring2017-10-121-0/+4
| | | | | | | | The i965 driver has become dependent on x86 specific compiler builtin functions, so ensure it's disabled for non-x86 builds. Reviewed-by: Kenneth Graunke <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* etnaviv: Do GC3000 resolve-in-place when possibleWladimir J. van der Laan2017-10-124-4/+25
| | | | | | | | | | | | | If an RS blit is done with source exactly the same as destination, and the hardware supports this, do an in-place resolve. This only fills in tiles that have not been rendered to using information from the TS. This is the same as the blob does and potentially saves significant bandwidth when doing i.MX6qp scanout using PRE, and when rendering to textures (though here using sampler TS would be even better). Signed-off-by: Wladimir J. van der Laan <[email protected]> Reviewed-by: Lucas Stach <[email protected]>
* egl_haiku: drop haiku_egl_driver structEric Engestrom2017-10-121-20/+14
| | | | | | | The struct only contained the one field we're interested in. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl: remove left over _EGLMain_tEric Engestrom2017-10-121-3/+0
| | | | | | | Fixes: b174a1ae720cb404738c "egl: Simplify the "driver" interface" Cc: Adam Jackson <[email protected]> Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl: drop memset(0) of calloc'ed memoryEric Engestrom2017-10-121-2/+0
| | | | | | | | `_EGLDriver *drv` is a freshly calloc()'ed object, memset(0)'ing some of it is a no-op. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl: replace _egl_driver->Unload() callback with a simple free()Eric Engestrom2017-10-124-28/+1
| | | | | | | Bonus: fixes a memleak on haiku when unloading the driver Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radv: don't crash if cache is disabled.Dave Airlie2017-10-121-5/+9
| | | | | | | | If you set MESA_GLSL_CACHE_DISABLE, radv crashed. Fixes: fd24be134f (radv: make use of on-disk cache) Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radv: use CLEAR_STATE for initializing some registersSamuel Pitoiset2017-10-121-41/+58
| | | | | | | | | Based on RadeonSI. This improves some Vulkan demos by +1% to +3%. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: add has_clear_state and enable it on CIK+ onlySamuel Pitoiset2017-10-122-1/+6
| | | | | | | | This will allow us to emit the CLEAR_STATE packet instead of a bunch of useless packets when doing CS initialization. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: do not set registers for merged ES-GS on GFX9Samuel Pitoiset2017-10-121-2/+5
| | | | | | | Based on RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: move the raster config emission in si_set_raster_config()Samuel Pitoiset2017-10-121-53/+60
| | | | | | | Similar to RadeonSI, also only call this function for <= VI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radeonsi: add support for PIPE_FORMAT_{X1,A1}R5G5B5_UNORMNicolai Hähnle2017-10-121-0/+8
| | | | | | Fixes dEQP-EGL.functional.image.modify.tex_rgb5_a1_tex_subimage_rgba8 Reviewed-by: Marek Olšák <[email protected]>
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