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* gallivm: improve dumping of bitcodeRoland Scheidegger2016-05-112-4/+9
* swr: [rasterizer] Include cmath for std::isnan and std::isinf.Vinson Lee2016-05-101-0/+2
* i965/blorp: Don't blend integer values during MSAA resolvesJason Ekstrand2016-05-101-11/+19
* meta/blit: Don't blend integer values during MSAA resolvesJason Ekstrand2016-05-101-2/+11
* i965/fs: Default all constants to a location of -1Jason Ekstrand2016-05-101-6/+4
* st/glsl_to_tgsi: attach image to correct instruction for samplesDave Airlie2016-05-111-2/+2
* mesa: move MESA_MAP_NOWAIT_BIT up away from GL_MAP_PERSISTENT_BITDave Airlie2016-05-111-1/+1
* mesa/meta: check for signed/unsigned int conversion for pbo getteximageDave Airlie2016-05-111-0/+3
* i965: Handle BRW_OPCODE_DO on Gen6+ in brw_instruction_name().Matt Turner2016-05-101-0/+6
* radeonsi: Set declared tessellation LDS size to hardware size.Bas Nieuwenhuizen2016-05-101-16/+2
* freedreno/ir3: size input/output arrays properlyRob Clark2016-05-101-3/+14
* ir_to_mesa: Emit smarter ir_binop_logic_or for vertex programsIan Romanick2016-05-101-15/+11
* prog: Delete all remains of OPCODE_SNE, OPCODE_SEQ, OPCODE_SGT, and OPCODE_SLEIan Romanick2016-05-108-428/+0
* ir_to_mesa: Do not emit OPCODE_SEQ or OPCODE_SNEIan Romanick2016-05-101-9/+64
* ir_to_mesa: Do not emit OPCODE_SLE or OPCODE_SGTIan Romanick2016-05-101-2/+12
* nvc0: enable compute support by default on GK110+Samuel Pitoiset2016-05-101-15/+3
* gallium/radeon: don't flush the GFX IB if DMA doesn't depend on itMarek Olšák2016-05-101-2/+8
* radeonsi: consolidate radeon_add_to_buffer_list calls for DMAMarek Olšák2016-05-103-33/+14
* gallium/radeon: add a heuristic for better (S)DMA performanceMarek Olšák2016-05-104-0/+32
* gallium/radeon: flush if DMA IB memory usage is too highMarek Olšák2016-05-108-15/+35
* radeonsi: add new SDMA texture copy codeMarek Olšák2016-05-101-0/+438
* gallium/radeon: fix (S)DMA read-after-write hazardsMarek Olšák2016-05-108-0/+32
* radeonsi: raise the max size for SDMA buffer copiesMarek Olšák2016-05-102-3/+3
* radeonsi: remove SDMA texture copy codeMarek Olšák2016-05-101-215/+2
* radeonsi: only expose *_init_*dma_functions from (S)DMA filesMarek Olšák2016-05-105-34/+31
* gallium/radeon: implement randomized SDMA texture copy testing (v2)Marek Olšák2016-05-106-0/+419
* gallium/radeon: discard CMASK or DCC if overwriting a whole texture by DMAMarek Olšák2016-05-101-7/+39
* gallium/radeon: use a common function for DMA blit preparationMarek Olšák2016-05-106-31/+73
* gallium/radeon: split out code for discarding DCCMarek Olšák2016-05-101-6/+12
* gallium/radeon: rename r600_texture_disable_cmask -> discard_cmaskMarek Olšák2016-05-101-2/+2
* st/mesa: use transfer_inline_write for memcpy TexSubImage pathMarek Olšák2016-05-101-4/+39
* gallium/radeon: fix partial layered transfers of cube (array) texturesMarek Olšák2016-05-101-15/+6
* gallium/radeon: align alignments for better buffer reuseMarek Olšák2016-05-102-0/+2
* gallium/radeon: use gart_page_size instead of hardcoded 4096Marek Olšák2016-05-106-10/+18
* winsys/radeon: use gart_page_size instead of private size_alignMarek Olšák2016-05-103-14/+11
* winsys/amdgpu: move gart_page_size to struct radeon_winsysMarek Olšák2016-05-104-10/+10
* gallivm: print declarations of intrinsics with GALLIVM_DEBUG=irRoland Scheidegger2016-05-101-0/+5
* gallivm: use InternalLinkage instead of PrivateLinkage for texture functionsRoland Scheidegger2016-05-101-1/+1
* gallivm: disable avx512 featuresRoland Scheidegger2016-05-101-0/+12
* Revert "nir: Try to warn when C99 extensions are used in nir headers."Jose Fonseca2016-05-101-22/+1
* i965/fs: fix MOV_INDIRECT exec_size for doublesSamuel Iglesias Gonsálvez2016-05-101-1/+9
* i965/fs: take into account doubles when calculating read_size for MOV_INDIRECTSamuel Iglesias Gonsálvez2016-05-101-2/+3
* i965/fs: demote_pull_constants() did not take into account double typesSamuel Iglesias Gonsálvez2016-05-101-1/+8
* i965/fs: push first double-based uniforms in push constant bufferSamuel Iglesias Gonsálvez2016-05-101-30/+82
* i965/fs: recognize writes with a subreg_offset > 0 as partialIago Toral Quiroga2016-05-101-1/+2
* i965/fs/lower_simd_width: Fix registers written for split instructionsIago Toral Quiroga2016-05-101-2/+2
* i965/fs: rename our lower_d2f pass to lower_d2xIago Toral Quiroga2016-05-104-4/+4
* i965/fs: implement i2d and u2dIago Toral Quiroga2016-05-101-0/+2
* i965/fs: implement d2i and d2uIago Toral Quiroga2016-05-102-1/+5
* i965/fs: implement d2bIago Toral Quiroga2016-05-101-0/+13
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