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* gitlab-ci: Remove limit on kernel loggingTomeu Vizoso2019-11-191-1/+0
| | | | | | | | | We don't seem to fault any more when running dEQP GLES2, and we don't scrape serial output any more anyway so no problems should be caused by that. Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* mesa: fix warning in 32 bits buildPierre-Eric Pelloux-Prayer2019-11-191-1/+1
| | | | | Fixes: febedee4f6c ("mesa: add EXT_dsa glGetVertexArray* 4 functions") Reviewed-by: Marek Olšák <[email protected]>
* mesa: enable EXT_direct_state_accessPierre-Eric Pelloux-Prayer2019-11-193-17/+4
| | | | | | | | | | Always enabled; this doesn't require any driver work, it's just core mesa bits. quick_gl.txt is also updated because previously piglit ext_dsa tests were skipped. Reviewed-by: Marek Olšák <[email protected]>
* mesa: add ARB_sparse_buffer NamedBufferPageCommitmentEXT functionPierre-Eric Pelloux-Prayer2019-11-196-4/+36
| | | | | | | The spec is unclear on how to handle the buffer argument so we reuse the logic from the EXT_direct_state_access spec. Reviewed-by: Marek Olšák <[email protected]>
* mesa: add ARB_vertex_attrib_binding glVertexArray* functionsPierre-Eric Pelloux-Prayer2019-11-195-5/+171
| | | | | | | We can't simply alias ARB_direct_state_access functions because those fail if the vao has never been bound before. Reviewed-by: Marek Olšák <[email protected]>
* mesa: extend vertex_array_attrib_format to support EXT_dsaPierre-Eric Pelloux-Prayer2019-11-191-12/+6
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: implement ARB_texture_storage_multisample + EXT_dsa functionsPierre-Eric Pelloux-Prayer2019-11-196-3/+84
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: add ARB_texture_buffer_range glTextureBufferRangeEXT functionPierre-Eric Pelloux-Prayer2019-11-196-2/+62
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: add ARB_instanced_arrays EXT_dsa functionPierre-Eric Pelloux-Prayer2019-11-196-1/+60
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: add ARB_gpu_shader_fp64 selector-less functionsPierre-Eric Pelloux-Prayer2019-11-192-1/+132
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: add ARB_clear_buffer_object named functionsPierre-Eric Pelloux-Prayer2019-11-196-9/+54
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: add ARB_vertex_attrib_64bit VertexArrayVertexAttribLOffsetEXTPierre-Eric Pelloux-Prayer2019-11-196-2/+52
| | | | Reviewed-by: Marek Olšák <[email protected]>
* mesa: add ARB_framebuffer_no_attachments named functionsPierre-Eric Pelloux-Prayer2019-11-196-4/+102
| | | | | | | | | | | The wording in ARB_framebuffer_no_attachments and EXT_direct_state_access is different. In the former framebuffer names must have been generated using glGenFramebuffers before using the named functions. In the latter framebuffer names have no such constraints, so we can't use the _mesa_lookup_framebuffer_dsa function. Reviewed-by: Marek Olšák <[email protected]>
* mesa: update features.txt to reflect EXT_dsa statusPierre-Eric Pelloux-Prayer2019-11-191-29/+29
| | | | | | | | | | | | | | | | | | All features from the EXT_dsa spec are implemented. Interactions with other specs: - GL_AMD_gpu_shader_int64: not needed, since it's not enabled in compatibility profile. - GL_ARB_bindless_texture is DONE "INVALID_OPERATION is generated when calling various functions to modify the state of a texture object from which handles have been extracted" - GL_ARB_buffer_storage/GL_EXT_buffer_storage is DONE (NamedBufferStorageEXT function) - GL_ARB_texture_storage is DONE (3 TextureStorage*DEXT functions) - GL_ARB_vertex_attrib_binding is DONE (6 VertexArray* functions) - GL_EXT_external_buffer is not supported by Mesa Reviewed-by: Marek Olšák <[email protected]>
* panfrost: Set PIPE_COMPUTE_CAP_ADDRESS_BITS to 64Alyssa Rosenzweig2019-11-191-2/+1
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Disable tiling for GLOBAL resourcesAlyssa Rosenzweig2019-11-191-1/+2
| | | | | | | | It doesn't make sense to have nonlinear layouts for a buffer that can be accessed as direct memory for a compute kernel. Turn that off so things work as expected. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Pass kernel inputs as uniformsAlyssa Rosenzweig2019-11-191-0/+13
| | | | | | | We can take the OpenCL kernel inputs and interpret them as uniforms by simply reusing the Gallium callback. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stub out clover callbacksAlyssa Rosenzweig2019-11-191-1/+27
| | | | | | We don't implement these yet but let's not crash. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* i965: Ensure that all 2101010 image imports can pass framebuffer completeness.Miguel Casas-Sanchez2019-11-191-2/+6
| | | | | | | | | | | Chrome OS would like to import and render to any supported format that has a corresponding display plane format, and this prevents throwing framebuffer incomplete for FBOs using these textures. See: crbug.com/949260 Reviewed-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir/serialize: fix serializing functions with no implementations.Dave Airlie2019-11-191-3/+11
| | | | | | | | | Store a flag stating if there was an implmentation, and use fxn->impl as a temporary flag between deserializsation stages. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Karol Herbst <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir/serialize: pack function has name and entry point into flags.Dave Airlie2019-11-191-5/+7
| | | | | | | | Suggested by Jason. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Karol Herbst <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* iris: Re-enable param compactionJason Ekstrand2019-11-181-1/+1
| | | | | | | | | | In d1c4e64a69e, we added a parameter to tell the back-end compiler to ignore the param array and just push however many constants you ask it to push. I enabled it for iris because this is really what iris wants but it seems to have caused a number of regressions. Revert to the old behavior for now. Fixes: d1c4e64a69e "intel/compiler: Add a flag to avoid compacting..."
* mesa: enable glthread for 7 Days To DieMarek Olšák2019-11-181-0/+8
| | | | Reviewed-by: Timothy Arceri <[email protected]>
* intel/compiler: Don't change hstride if not neededIván Briano2019-11-181-5/+6
| | | | | | | | | | | | Alignment requirements may have changed the horizontal stride already, so don't set it if not required to avoid breaking said requirements. Fixes several tests such as dEQP-VK.subgroups.vote.graphics.subgroupallequal_int8_t Signed-off-by: Iván Briano <[email protected]> Reviewed-by: Paulo Zanoni <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* turnip: add x11 wsiJonathan Marek2019-11-182-0/+114
| | | | | | | Copied from radv Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* turnip: add display wsiJonathan Marek2019-11-184-0/+366
| | | | | | | Copied from radv (minus the fence change) Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* nir: Validate that variables are in the right listsJason Ekstrand2019-11-181-11/+15
| | | | | Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* etnaviv: blt: set TS dirty after clearJonathan Marek2019-11-181-0/+2
| | | | | | | | RS engine does this already, it is missing for BLT engine. This fixes cases where a clear isn't immediately at the start of the frame. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: separate PE and RS formats, use only RS only for tilingJonathan Marek2019-11-188-56/+54
| | | | | | | | | | | There are PE formats not supported by RS, so we can't have a single to translate both. Use RS only for same formats until we have a translate_rs_format and test the possible different format blits. Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* etnaviv: blt: use only for tiling, and add missing formatsJonathan Marek2019-11-181-22/+30
| | | | | | | | | | | | | | | | | | * Removes the incorrect usage of translate_rs_format * Disables use of BLT engine for different src/dst format We only really need the BLT engine for tiling/detiling right now, but it would be nice to support as many blit cases as possible to avoid using PE for that. To deal with different formats we need to: * Have a translate_blt_format which has all supported formats * Fix the swizzle translation from gallium (current version was wrong) * Set the src/dst sRGB bits as needed * Find which type conversions the BLT engine can actually do Signed-off-by: Jonathan Marek <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* Call shmget() with permission 0600 instead of 0777Brian Paul2019-11-183-3/+6
| | | | | | | | | | | | | | A security advisory (TALOS-2019-0857/CVE-2019-5068) found that creating shared memory regions with permission mode 0777 could allow any user to access that memory. Several Mesa drivers use shared- memory XImages to implement back buffers for improved performance. This path changes the shmget() calls to use 0600 (user r/w). Tested with legacy Xlib driver and llvmpipe. Cc: [email protected] Reviewed-by: Kristian H. Kristensen <[email protected]>
* anv: Emit a NULL vertex for zero base_vertex/instanceJason Ekstrand2019-11-181-11/+16
| | | | | | | | | | If both are zero (the common case), we can emit a null vertex buffer rather than emitting a vertex buffer with zeros in it. The packing of the VERTEX_BUFFER_STATE is faster because no relocation is emitted and we can avoid creating the vertex buffer which means one less anv_state_stream_alloc. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Use an anv_state for the next binding tableJason Ekstrand2019-11-182-12/+15
| | | | | | | | | | This is a bit more natural because we're already getting an anv_state most places in the pipeline. The important part here, however, is that we're no longer calling anv_block_pool_map on every alloc_binding_table call. While it's probably pretty cheap, it is potentially a linear walk over the list of BOs and it was showing up in profiles. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: More carefully dirty state in BindPipelineJason Ekstrand2019-11-187-25/+101
| | | | | | | | | | | | | | | Instead of blindly dirtying descriptors and push constants the moment we see a pipeline change, check to see if it actually changes the bind layout or push constant layout. This doubles the runtime performance of one CPU-limited example running with the Dawn WebGPU implementation when running on my laptop. NOTE: This effectively reverts beca63c6c07. While it was a nice optimization, it was based on prog_data and we can't do that anymore once we start allowing the same binding table to be used with multiple different pipelines. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: More carefully dirty state in BindDescriptorSetsJason Ekstrand2019-11-184-22/+51
| | | | | | | | | | | | Instead of dirtying all graphics or all compute based on binding point, we're now much more careful. We first check to see if the actual descriptor set changed and then only dirty the stages used by that descriptor set. For dynamic offsets, we keep a bitfield per-stage of which offsets are actually used in that stage and we only dirty push constants and descriptors if that stage has dynamic offsets AND those offsets actually change. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Use a switch statement for binding table setupJason Ekstrand2019-11-181-117/+127
| | | | | | | | | It theoretically could be more efficient but the real point here is that it's no longer really a matter of dealing with special cases and then the "real" thing. The way we're handling binding tables, it's more of a multi-step process and a switch is more natural. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Rework push constant handlingJason Ekstrand2019-11-1811-228/+176
| | | | | | | | | | | | | | | | | | This substantially reworks both the state setup side of push constant handling and the pipeline compile side. The fundamental change here is that we're no longer respecting the prog_data::param array and instead are just instructing the back-end compiler to leave the array alone. This makes the state setup side substantially simpler because we can now just memcpy the whole block of push constants and don't have to upload one DWORD at a time. This also means that we can compute the full push constant layout up-front and just trust the back-end compiler to not mess with it. Maybe one day we'll decide that the back-end compiler can do useful things there again but for now, this is functionally no different from what we had before this commit and makes the NIR handling cleaner. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Re-arrange push constant data a bitJason Ekstrand2019-11-183-23/+46
| | | | | | | | | | This moves the compute stuff into a anv_push_constants::cs sub-struct. It also moves dynamic offsets into the push constants. This means we have to duplicate the data per-stage but that doesn't seem like the end of the world and one day we may wish to make dynamic offsets per-stage anyway. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/compiler: Add a flag to avoid compacting push constantsJason Ekstrand2019-11-186-145/+170
| | | | | | | In vec4, we can just not run the pass. In fs, things are a bit more deeply intertwined. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Pre-compute push ranges for graphics pipelinesJason Ekstrand2019-11-188-64/+137
| | | | | | | | | It turns off that emitting push constants is one of the hottest paths in the driver and ANY work we do there costs us. By pre-computing things a bit ahead of time, we shave 5% off the runtime of a CPU-limited example running with the Dawn WebGPU implementation. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Stop bounds-checking pushed UBOsJason Ekstrand2019-11-181-28/+10
| | | | | | | | | | | | | | | The bounds checking is actually less safe than just pushing the data. If the bounds checking actually ever kicks in and it's not on the last UBO push range, then the shrinking will cause all subsequent ranges to be pushed to the wrong place in the GRF. One of the behaviors we definitely don't want is for OOB UBO access to result in completely unrelated UBOs returning garbage values. It's safer to just push the UBOs as-requested. If we're really concerned about robustness, we can emit shader code to do bounds checking which should be stupid cheap (a CMP followed by SEL). Cc: [email protected] Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Delete dead shader constant pushing codeJason Ekstrand2019-11-182-13/+7
| | | | | | | | As of 2d78e55a8c5481, nir_intrinsic_load_constant with a constant offset is constant-folded so we should never end up with any that trigger brw_nir_analyze_ubo_ranges. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Flatten descriptor bindings in anv_nir_apply_pipeline_layoutJason Ekstrand2019-11-186-76/+54
| | | | | | | | This lets us stop tracking the pipeline layout. It also means less indirection on a very hot path. As an extra bonus, we can make some of our data structures smaller. No measurable CPU overhead improvement. Reviewed-by: Lionel Landwerlin <[email protected]>
* anv: Input attachments are always single-planeJason Ekstrand2019-11-181-2/+3
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* genxml: Mark everything in genX_pack.h always_inlineJason Ekstrand2019-11-181-8/+8
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* anv/pipeline: Assume layout != NULLJason Ekstrand2019-11-181-21/+19
| | | | | | | | | In the early days of the driver we allowed layout to be VK_NULL_HANDLE and used that for some internal pipelines when we wanted to be lazy. Vulkan doesn't actually allow NULL layouts, however, so there's no reason to have this check. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/compiler: remove old commentItalo Nicola2019-11-181-3/+0
| | | | | | | This comment was correct some time ago, but since commit d3c10ad42729c1fe74a7f7c67465bd2, it isn't true anymore. Reviewed-by: Paulo Zanoni <[email protected]>
* pan/midgard: Use shader stage in mir_op_computes_derivativeAlyssa Rosenzweig2019-11-183-3/+10
| | | | | | | A 'normal' texture op may be emitted in a vertex shader on T720 but it still doesn't take any derivatives. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* i965: Unify CC_STATE and BLEND_STATE atoms on Haswell as a workaroundDanylo Piliaiev2019-11-181-2/+35
| | | | | | | | | | | | | | | | | | | Re-emitting 3DSTATE_CC_STATE_POINTERS after emitting 3DSTATE_BLEND_STATE_POINTERS fixes the shadow flickering in SuperTuxCart and Tropico 6 which was seen only on Haswell. The reason for this is unknown and fix was found empirically. The closest mention in PRM is that it should improve performance. From the HSW PRM, volume 2b, page 823 (3DSTATE_BLEND_STATE_POINTERS): "When the BLEND_STATE pointer changes but not the CC_STATE pointer, driver needs to force a CC_STATE pointer change to improve blend performance in pixel backend." Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1834 Fixes: eca4a654 ("i965: Disable dual source blending when shader doesn't support it on gen8+") Cc: <[email protected]> Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* radv: implement VK_AMD_device_coherent_memorySamuel Pitoiset2019-11-183-15/+101
| | | | | | | | | | | This extension adds the device coherent and device uncached memory types. It's known to be slower than non-device coherent memory but it might be useful for debugging. This is only exposed for chips that support L2 uncached. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>