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* util: mark s as MAYBE_UNUSED in _mesa_half_to_unorm8Kai Wasserbäch2018-08-181-1/+2
* util: add drirc workarounds for RAGETimothy Arceri2018-08-181-0/+8
* util: better handle program names from wineTimothy Arceri2018-08-181-5/+12
* nir: allow more nested loops to be unrolledTimothy Arceri2018-08-181-14/+17
* gallium/winsys/kms: don't unmap what wasn't mappedRay Strode2018-08-171-5/+13
* loader: add dri_driver option to override dri driver to loadQiang Yu2018-08-172-0/+35
* xmlconfig: add kernel_driver device attributeQiang Yu2018-08-1711-14/+23
* loader: abstract loader_get_kernel_driver_name for reuseQiang Yu2018-08-171-16/+23
* driconf: move ${sysconfdir}/drirc to ${datadir}/drirc.d/00-mesa-defaults.confQiang Yu2018-08-173-3/+4
* xmlconfig: read more config files from drirc.d/Qiang Yu2018-08-174-0/+53
* xmlconfig: refine driParseConfigFiles to use parseOneConfigFileEmil Velikov2018-08-171-34/+29
* anv/pipeline: Lower pipeline layouts etc. after linkingJason Ekstrand2018-08-171-30/+28
* anv/pipeline: Set tess IO read/written key fields in compile_*Jason Ekstrand2018-08-171-9/+10
* anv/pipeline: Use more fields from stage in compile_csJason Ekstrand2018-08-171-16/+21
* anv/apply_pipeline_layout: Add to the bind map instead of replacing itJason Ekstrand2018-08-173-59/+21
* anv/lower_ycbcr: Use the binding array size for bounds checksJason Ekstrand2018-08-171-6/+4
* python: Open the template as text, with an explicit encodingMathieu Bridon2018-08-171-3/+2
* python: Help Python 2 print the lineMathieu Bridon2018-08-171-0/+5
* freedreno/a6xx: streamoutRob Clark2018-08-173-45/+62
* freedreno/a6xx: fragz fixesRob Clark2018-08-171-7/+3
* freedreno/a6xx: scissor fixesRob Clark2018-08-172-4/+4
* freedreno: update generated headersRob Clark2018-08-179-27/+32
* freedreno/a6xx: fix srgbRob Clark2018-08-171-7/+13
* freedreno: fix dEQP-GLES3.functional.fence_sync.*Rob Clark2018-08-171-0/+4
* radv/winsys: fix creating the BO list for virtual buffersSamuel Pitoiset2018-08-171-1/+1
* freedreno: Add a6xx backendKristian H. Kristensen2018-08-1640-19/+6370
* freedreno: update generated headersRob Clark2018-08-167-66/+4928
* freedreno: Fix warningsKristian H. Kristensen2018-08-165-15/+9
* scons: Check for mako 0.8.0Dylan Baker2018-08-161-0/+13
* scons: Require python 2.7Dylan Baker2018-08-162-4/+1
* meson: use python3 module to find python3Dylan Baker2018-08-161-1/+1
* meson: Ensure that mako is >= 0.8.0Dylan Baker2018-08-161-2/+8
* svga: simplify Mesa version stringEric Engestrom2018-08-161-1/+1
* bin: always define MESA_GIT_SHA1 to make it directly usable in codeEric Engestrom2018-08-166-27/+7
* git_sha1: simplify logicEric Engestrom2018-08-164-8/+3
* i965: drop unused assignmentEric Engestrom2018-08-161-2/+0
* anv: drop cast-to-void of used variableEric Engestrom2018-08-161-1/+0
* anv: use safer snprintf() to ensure NULL string-terminatorEric Engestrom2018-08-161-1/+1
* intel/batch-decoder: replace local ARRAY_LENGTH() macro with global ARRAY_SIZE()Eric Engestrom2018-08-161-3/+2
* intel: various python cleanupsEric Engestrom2018-08-165-26/+21
* egl: check for buffer overflow *before* corrupting our memoryEric Engestrom2018-08-161-4/+15
* egl/wayland: remove sign from bitfield `formats`Eric Engestrom2018-08-162-6/+6
* mailmap: add various typos of Emil's address from the logEric Engestrom2018-08-161-0/+5
* egl: some spelling fixesEric Engestrom2018-08-161-5/+5
* radv: initialize the DCC predicate correctly when it's compressedSamuel Pitoiset2018-08-161-1/+4
* radv: fix missing initialization of the conditional rendering stateSamuel Pitoiset2018-08-161-0/+1
* bin: split `write_if_different()` outEric Engestrom2018-08-161-7/+14
* bin: whitespace cleanupEric Engestrom2018-08-161-3/+3
* radv: Revert divisor = 0 case for vertex attribute extension.Bas Nieuwenhuizen2018-08-161-1/+1
* radv: Possible on-demand compilation fix.Bas Nieuwenhuizen2018-08-161-0/+8
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