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* winsys/svga: build: cleanup the includesEmil Velikov2014-08-282-6/+1
| | | | | | gallium/drivers is already part fo GALLIUM_WINSYS_CFLAGS. Signed-off-by: Emil Velikov <[email protected]>
* winsys/i915: remove the software winsysEmil Velikov2014-08-288-490/+0
| | | | | | | | | We stopped building it recently as it was unused and not tested. Good bye, it's been nice knowing you :) Cc: Stephane Marchesin <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Acked-by: Stephane Marchesin <[email protected]>
* gallium/ilo: cleanup intel_winsys.hEmil Velikov2014-08-287-8/+13
| | | | | | | | | | | | | | | | Make the header location, inclusion and contents more common with its i915,r* and nouveau counterparts: - Move the header within drivers/ilo. - Separate out intel_winsys_create_for_fd into 'drm_public' header. - Cleanup the compiler includes. v2: Move the header to drivers/ilo. Suggested by Chia-I. v3: Correct intel_winsys.h inclusion. Spotted by Chia-I. Cc: Chia-I Wu <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Chia-I Wu <[email protected]>
* docs: mark GL_MAX_VERTEX_ATTRIB_STRIDE as doneTimothy Arceri2014-08-271-1/+1
| | | | | Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* gallium: add cap for MAX_VERTEX_ATTRIB_STRIDETimothy Arceri2014-08-2716-0/+37
| | | | | Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* mesa: implement GL_MAX_VERTEX_ATTRIB_STRIDETimothy Arceri2014-08-275-0/+32
| | | | | | | | V2: moved test for the VertexAttrib*Pointer() functions to update_array(), and made constant available for drivers to set Signed-off-by: Timothy Arceri <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* st/clover: Fix build against LLVM SVN >= r216583Michel Dänzer2014-08-281-0/+5
| | | | Reviewed-by: Francisco Jerez <[email protected]>
* draw: fix base instance handling in llvm pathRoland Scheidegger2014-08-285-12/+20
| | | | | | | | | | | | | The base instance needs to be passed to the jited function, otherwise the instanced data fetch will only work with the same start instance when the jit function was created (and baking that into the key instead is not a viable option). This fixes piglit arb_base_instance-drawarrays (modulo some unrelated core/compat context trouble I get for the test). And fix the pipe cap bit in llvmpipe for it now that it actually works (it already worked for softpipe). Reviewed-by: Jose Fonseca <[email protected]>
* docs: fix up status of softpipe, llvmpipeRoland Scheidegger2014-08-281-19/+21
| | | | | | | | | | The docs were never really up to date for them, missing just about everything. So mark them off as all done for GL 3.3 (though softpipe is in fact quite broken for some newer things especially wrt texturing, and both don't have compliant, real msaa support). And add the extensions missing too (no guarantee of completeness). Reviewed-by: Dave Airlie <[email protected]>
* glsl: Add strings.h on non-MSC platformsAlexander von Gluck IV2014-08-271-0/+3
| | | | | | | | | | | | * IEEE Std 1003.1-2001 placed strcasecmp() in strings.h. * ISO C99 doesn't mention strcase* in string.h * On all platforms I could find, strcasecmp is in strings.h and string.h as a compatibility layer for software written pre-2001 POSIX * Technically strcasecmp should be only in strings.h and the man pages back this up. * Tested build on CentOS and Haiku Reviewed-by: Kenneth Graunke <[email protected]>
* radeon/uvd: remove comment about RV770Alex Deucher2014-08-271-1/+0
| | | | | | | It doesn't seem to support field based decode after testing. Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/uvd: fix field handling on R6XX style UVDChristian König2014-08-261-2/+5
| | | | | | The first UVD generation can only do frame based output. Signed-off-by: Christian König <[email protected]>
* vl/compositor: set the scissor before clearing the render targetChristian König2014-08-261-1/+1
| | | | | | | | Otherwise we clear areas that shouldn't be cleared. Signed-off-by: Christian König <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* st/vdpau: fix vlVdpOutputSurfaceRender(Output|Bitmap)SurfaceChristian König2014-08-263-15/+71
| | | | | | | | | | Correctly handle that the source_surface is only optional. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80561 Signed-off-by: Christian König <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* ilo: use genhw command opcodesChia-I Wu2014-08-265-134/+184
| | | | | Replace ILO_GPE_MI and ILO_GPE_CMD with magic values by descriptive genhw macros.
* ilo: rename intel_bo_map_unsynchronized()Chia-I Wu2014-08-264-13/+11
| | | | Rename it to intel_bo_map_gtt_async().
* ilo: remove max_batch_sizeChia-I Wu2014-08-265-14/+4
| | | | | It is used to derive an artificial limit on max relocs per bo. We choose not to export it anymore.
* ilo: replace domains by reloc flagsChia-I Wu2014-08-2611-125/+90
| | | | | It is simpler and is supported by the kernel. It cannot be used with libdrm_intel yet though.
* docs: Update who is working on tessellationChris Forbes2014-08-261-1/+1
| | | | Signed-off-by: Chris Forbes <[email protected]>
* glsl: Remove bogus "OUPTUT" tokenChris Forbes2014-08-261-1/+1
| | | | | | | | This is never used. There is another token "OUTPUT" which the lexer can generate, though. This has been around since the dawn of time; is most likely a typo. Signed-off-by: Chris Forbes <[email protected]>
* radeonsi: handle PIPE_BIND_BLENDABLEMarek Olšák2014-08-251-1/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r600g: only set PIPE_BIND_BLENDABLE if colorbuffer rendering is supportedMarek Olšák2014-08-252-20/+10
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* r300g: handle PIPE_BIND_BLENDABLEMarek Olšák2014-08-251-1/+44
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* vc4: Stop doing qpu_inst(add, NOP) or qpu_inst(NOP, mul).Eric Anholt2014-08-241-84/+47
| | | | | Now that the extra WADDR is set, we can knock this off. Saves a lot of typing, and makes this code much more legible.
* vc4: Set the other WADDR in the qpu instruction helpers.Eric Anholt2014-08-241-1/+5
| | | | | Now you don't need to qpu_inst() your instruction with a NOP to get the other waddr set.
* vc4: Merge qpu_a_NOP() and qpu_m_NOP to a single qpu_NOP() helper.Eric Anholt2014-08-243-57/+45
| | | | | | Now that qpu_inst() ignores the WADDR from the other half of the instruction, we can set both the ADD and MUL WADDRs in the NOP helper. Thanks to that, we also no longer need to qpu_inst(NOP, NOP).
* vc4: Ignore WADDRs from the other half of the instruction when merging.Eric Anholt2014-08-241-1/+2
| | | | | | This allows setting the opposite-side WADDR to NOP (a non-zero value) in qpu_* helpers, so that we don't need to qpu_inst() merge them with NOPs all the time just to get the waddr set.
* vc4: Fix LT/GE set-0-or-1 compares.Eric Anholt2014-08-241-1/+1
| | | | | We were using the integer sub, which worked for the common case of EQ and NE. Fixes fs-lessThan-ivec2-ivec2 and other tests.
* u_vbuf: Add a few more format fallbacks.Eric Anholt2014-08-241-0/+32
| | | | | | | | | | Fixes piglit draw-vertices and gl-2.0-vertexattribpointer on vc4, where I'm only advertising R32F to RGBA32F support so far. Note: regresses gl-1.5-normal3b3s-invariance due to introduced flushes and missing depth buffer load/store support in the driver. Reviewed-by: Marek Olšák <[email protected]>
* u_vbuf: Simplify the format fallback translation.Eric Anholt2014-08-243-117/+87
| | | | | | | | | | Individual caps made supporting new fallbacks more complicated than it needed to be. Instead, just make a table of fallbacks at context init time. v2: Fix inverted "do we need to install vbuf?" flagging caught by Marek. Reviewed-by: Marek Olšák <[email protected]> (v2)
* freedreno/a2xx: fix segfaultRob Clark2014-08-241-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: handle first/last level properlyRob Clark2014-08-243-9/+13
| | | | | | Fixes some assumptions about first_level being zero. Signed-off-by: Rob Clark <[email protected]>
* freedreno: implement pipe_flush_resource()Rob Clark2014-08-241-1/+5
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: don't ignore src/dst levelRob Clark2014-08-241-39/+63
| | | | | | Don't ignore src/dst_level in pipe_copy_region. Signed-off-by: Rob Clark <[email protected]>
* vc4: Fix save/restore of the VS/FS in the blitter.Eric Anholt2014-08-231-2/+2
| | | | | | When I made the shader cache take the .fs member and moved the binding point to .bind_fs, I failed to update these. Fixes crashes in copyteximage-related tests.
* vc4: Clear padding of ioctl arguments.Eric Anholt2014-08-231-0/+1
| | | | Fixes valgrind complaints from valgrind being unaware of our ioctls.
* auxilary/os: Add Solaris support in os_get_total_physical_memory.Vinson Lee2014-08-221-2/+2
| | | | | | | | | | The patch fixes the build on Oracle Solaris. CC os/os_misc.lo "os/os_misc.c", line 59: #error: unexpected platform in os_sysinfo.c Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium/targets: Haiku, Fix some improper type warningsAlexander von Gluck IV2014-08-222-2/+2
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* gallium/targets: Clean up Haiku softpipe renderer visualAlexander von Gluck IV2014-08-222-102/+98
| | | | | * Drop creating gl_config first as it's only really used to create the state tracker visual.
* glcpp: Don't use alternation in the lookahead for empty pragmas.Carl Worth2014-08-221-2/+8
| | | | | | | | | | | | | | | | | | | | We've found that there's a buffer overrun bug in flex that's triggered by using alternation in a lookahead pattern. Fortunately, we don't need to match the exact {NEWLINE} expression to detect an empty pragma. It suffices to verify that there are no non-space characters before any newline character. So we can use a simple [\r\n] to get the desired behavior while avoiding the flex bug. Fixes the regression of piglit's 17000-consecutive-chars-identifier test, (which has been crashing since commit 04e40fd337a244ee77ef9553985e9398ff0344af ). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82472 Signed-off-by: Carl Worth <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> CC: <[email protected]>
* i965: Disable try_emit_b2f_of_compare on Gen4-6.Kenneth Graunke2014-08-221-0/+7
| | | | | | | | | | | | | | | | | | | | | The optimization relies on CMP setting the destination to 0, which is equivalent to 0.0f. However, early platforms only set the least significant byte, leaving the other bits undefined. So, we must disable the optimization on those platforms. Oddly, Sandybridge wasn't reported as broken. The PRM states that it only sets the LSB, but the internal documentation says that it follows the IVB behavior. Since it wasn't reported as broken, we believe it really does follow the IVB behavior. v2: Allow the optimization on Sandybridge (requested by Matt). +32 piglits on Ironlake. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?=79963 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965/fs: Preserve CFG in predicated break pass.Matt Turner2014-08-221-4/+25
| | | | | | | | | | | | | | | | | Operating on this code, B0: ... cmp.ne.f0(8) (+f0) if(8) B1: break(8) B2: endif(8) We can delete B2 without attempting to merge any blocks, since the break/continue instruction necessarily ends the previous block. After deleting the if instruction, we attempt to merge blocks B0 and B1. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Rename variable in predicated break pass.Matt Turner2014-08-221-7/+8
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Preserve CFG in the SEL peephole.Matt Turner2014-08-221-6/+9
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Preserve CFG when deleting dead control flow.Matt Turner2014-08-221-9/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This pass deletes an IF/ELSE/ENDIF or IF/ENDIF sequence, or the ELSE in an ELSE/ENDIF sequence. In the typical case (where IF and ENDIF) aren't the only instructions in their basic blocks, we can simply remove the instructions (implicitly deleting the block containing only the ELSE), and attempt to merge blocks B0 and B2 together. B0: ... (+f0) if(8) B1: else(8) B2: endif(8) ... If the IF or ENDIF instructions are the only instructions in their respective basic blocks (which are deleted by the removal of the instructions), we'll want to instead merge the next blocks. Both B0 and B2 are possibly removed by the removal of if & endif. Same situation for if/endif. E.g., in the following example we'd remove blocks B1 and B2, and then attempt to combine B0 and B3. B0: ... B1: (+f0) if(8) B2: endif(8) B3: ... Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Add functions to combine basic blocks.Matt Turner2014-08-222-0/+54
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/cfg: Point to bblock_t containing associated control flowMatt Turner2014-08-223-27/+15
| | | | | | | | | | | | | | | | | | | | | ... rather than pointing directly to the associated instruction. This will let us set the block containing the IF statement's else-pointer to NULL, when we delete a useless ELSE instruction, as in the case (+f0) if(8) ... else(8) endif(8) Also, remove the pointer to the ENDIF, since it's unused, and it was also potentially wrong, in the case of a basic block containing both an ENDIF and an IF instruction: endif(8) cmp.ne.f0(8) ... (+f0) if(8) Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/fs: Preserve CFG in register allocation.Matt Turner2014-08-222-10/+14
| | | | Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Use basic-block aware insertion/removal functions.Matt Turner2014-08-229-40/+50
| | | | | | | | | To avoid invalidating and recreating the control flow graph. Also stop invalidating the CFG in places we didn't add or remove an instruction. cfg calculations: 202951 -> 80307 (-60.43%) Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Add invalidate_cfg parameter to invalidate_live_intervals().Matt Turner2014-08-225-7/+9
| | | | | | | Will let us avoid invalidating the CFG if the optimization pass has removed instructions using the new basic block methods. Reviewed-by: Topi Pohjolainen <[email protected]>
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