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* panfrost: Allocate tiler and scratchpad BOs per-batchBoris Brezillon2019-09-184-41/+68
| | | | | | | | | If we want to execute several batches in parallel they need to have their own tiler and scratchpad BOs. Let move those objects to panfrost_batch and allocate them on a per-batch basis. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Add FBO BOs to batch->bos earlierBoris Brezillon2019-09-184-3/+17
| | | | | | | | | | If we want the batch dependency tracking to work correctly we must make sure all BOs are added to the batch->bos set early enough. Adding FBO BOs when generating the fragment job is clearly to late. Add a panfrost_batch_add_fbo_bos helper and call it in the clear/draw path. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Add the panfrost_batch_create_bo() helperBoris Brezillon2019-09-184-25/+28
| | | | | | | | This helper automates the panfrost_bo_create()+panfrost_batch_add_bo()+ panfrost_bo_unreference() sequence that's done for all per-batch BOs. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Don't return imported/exported BOs to the cacheBoris Brezillon2019-09-182-0/+9
| | | | | | | | We don't know who else is using the BO in that case, and thus shouldn't re-use it for something else. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Add panfrost_bo_{alloc,free}()Boris Brezillon2019-09-181-76/+68
| | | | | | | | | Thanks to that we avoid the recursive call into panfrost_bo_create() and we can get rid of panfrost_bo_release() by inlining the code in panfrost_bo_unreference(). Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stop using panfrost_bo_release() outside of pan_bo.cBoris Brezillon2019-09-184-7/+8
| | | | | | | | | | | | | | | panfrost_bo_unreference() should be used instead. The only difference caused by this change is that the scratchpad, tiler_heap and tiler_dummy BOs are now returned to the cache instead of being freed when a context is destroyed. This is only a problem if we care about context isolation, which apparently is not the case since transient BOs are already returned to the per-FD cache (and all contexts share the same address space anyway, so enforcing context isolation is almost impossible). Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stop passing screen around for BO operationsBoris Brezillon2019-09-187-37/+37
| | | | | | | | Store a screen pointer in panfrost_bo so we don't have to pass a screen object to all functions manipulating the BO. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Don't check if BO is mmaped before calling panfrost_bo_mmap()Boris Brezillon2019-09-181-5/+1
| | | | | | | panfrost_bo_mmap() already takes care of that. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stop exposing panfrost_bo_cache_{fetch,put}()Boris Brezillon2019-09-182-8/+2
| | | | | | | | They are not expected to be called directly, users should use panfrost_bo_{create,release}() instead. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Move the BO API to its own headerBoris Brezillon2019-09-1816-74/+112
| | | | | | | | Right now, the BO API is spread over pan_{allocate,resource,screen}.h. Let's move all BO related definitions to a separate header file. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: s/PAN_ALLOCATE_/PAN_BO_/Boris Brezillon2019-09-187-19/+19
| | | | | | | | Change the prefix for BO allocation flags to make it consistent with the rest of the BO API. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Move panfrost_bo_{reference,unreference}() to pan_bo.cBoris Brezillon2019-09-182-19/+20
| | | | | | | | This way we have all BO related functions placed in the same source file. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Get rid of pan_drm.cBoris Brezillon2019-09-1812-444/+382
| | | | | | | | | | | | | | | | pan_drm.c was only meaningful when we were supporting 2 kernel drivers (mali_kbase, and the drm one). Now that there's now kernel-driver abstraction we're better off moving those functions were they belong: * BO related functions in pan_bo.c * fence related functions + query_gpu_version() in pan_screen.c * submit related functions in pan_job.c While at it, we rename the functions according to the place they're being moved to. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stop passing has_draws to panfrost_drm_submit_vs_fs_batch()Boris Brezillon2019-09-183-5/+4
| | | | | | | | has_draws can be inferred directly from the batch->last_job value, no need to pass it around. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Kill a useless memset(0) in panfrost_create_context()Boris Brezillon2019-09-181-1/+0
| | | | | | | | ctx is allocated with rzalloc() which takes care of zero-ing the memory region. No need to call memset(0) on top. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Add polygon_list to the batch BO set at allocation timeBoris Brezillon2019-09-182-4/+7
| | | | | | | | | That's what we do for other per-batch BOs, and we'll soon add an helper to automate this create_bo()+add_bo()+bo_unreference() sequence, so let's prepare the code to ease this transition. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Add missing panfrost_batch_add_bo() callsBoris Brezillon2019-09-181-1/+4
| | | | | | | | | | Some BOs are used by batches but never explicitly added to the BO set. This is currently not a problem because we wait for the execution of a batch to be finished before releasing a BO, but we will soon relax this rule. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Use the correct type for the bo_handle arrayBoris Brezillon2019-09-181-1/+2
| | | | | | | | The DRM driver expects an array of u32, let's use the correct type, even if using an int works in practice because it's still a 32-bit integer. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Stop exposing internal panfrost_*_batch() functionsBoris Brezillon2019-09-182-14/+3
| | | | | | | | panfrost_{create,free,get}_batch() are only called inside pan_job.c. Let's make them static. Signed-off-by: Boris Brezillon <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* etnaviv: disable ARB_shadowChristian Gmeiner2019-09-181-0/+2
| | | | | | | | | Looks like only HALT2 GPUs have support for it but that is not yet implemented so disable ARB_shadow for now. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Jonathan Marek <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* Revert "gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAP"Christian Gmeiner2019-09-184-2/+9
| | | | | | | | | | There are GPUs that do not support this feature. This reverts commit e871abe452ad40efcccb0bab6b88fc31d0551e29 Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* virgl: Remove wrong EAGAIN handling for drmIoctlLepton Wu2019-09-181-3/+3
| | | | | | | | | | | drmIoctl handles EAGAIN itself and actually it always return -1 on errors. Remove the wrong handling of its return value. Also, print a warning when it fails. v2: - use _debug_printf instead of fprintf (Gurchetan Singh) Signed-off-by: Lepton Wu <[email protected]> Reviewed-by: Eric Anholt <[email protected]> (v1)
* iris: Skip allocating a null surface when there are 0 color regions.Kenneth Graunke2019-09-172-2/+9
| | | | | | | | | | | The compiler now sets the "Null Render Target" bit in the RT write extended message descriptor, causing it to write to an implicit null surface without us needing to set one up in the binding table. Together with the last patch, this improves performance in Car Chase on an Icelake 8x8 (locked to 700Mhz) by 0.0445526% +/- 0.0132736% (n=832). Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* intel/compiler: Set "Null Render Target" ex_desc bit on Gen11Kenneth Graunke2019-09-171-0/+3
| | | | | | | | | | | | | | | | When there are no color regions (i.e. a depth only pass), we can set the "Null Render Target" bit in the Gen11 RT write extended message descriptor to indicate that it should behave as if it's writing to a null render target, without the need for a binding table entry. This lets drivers avoid setting up that null RT binding table entry, but more importantly means the HW doesn't actually have to bother looking up the surface state. Together with the next patch, this improves performance in Car Chase on an Icelake 8x8 (locked to 700Mhz) by 0.0445526% +/- 0.0132736% (n=832). Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* docs/relnotes: add support for VK_KHR_shader_float_controls on IntelSamuel Iglesias Gonsálvez2019-09-171-1/+1
| | | | | | | | | | | | v2: - Move to 19.2.0 release notes (Andres). v3: - Move to 19.3.0 release notes (Andres). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* anv: enable VK_KHR_shader_float_controls and SPV_KHR_float_controlsSamuel Iglesias Gonsálvez2019-09-173-0/+33
| | | | | | | | | | | | | | This adds support for VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_FLOAT_CONTROLS_PROPERTIES_KHR and enables de Vulkan and SPIR-V extensions. Also, notice that this includes the updates applied to the VkPhysicalDeviceFloatControlsPropertiesKHR structure in the extension VK_KHR_shader_float_controls v4 and Vulkan 1.1.116. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965/fs: add support for shader float control to remove_extra_rounding_modes()Samuel Iglesias Gonsálvez2019-09-171-1/+14
| | | | | | | | | | | | | | | | | | | | | The remove_extra_rounding_modes() optimization will remove duplicated rounding mode changes. v2: - Fix bug in the rounding mode change (Alejandro). v3: - Fix rounding modes. v4: - Updated to renamed shader info member and enum values (Andres). v5: - Simplify flags logic operations (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965/fs: set rounding mode when emitting nir_op_f2f32 or nir_op_f2f16Samuel Iglesias Gonsálvez2019-09-171-5/+27
| | | | | | | | | v2: - Consider nir_op_f2f16 case too (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965/fs: set rounding mode when emitting fadd, fmul and ffma instructionsSamuel Iglesias Gonsálvez2019-09-171-1/+34
| | | | | | | | | v2: - Updated to renamed shader info member (Andres). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965/fs: add emit_shader_float_controls_execution_mode() and aux functionsSamuel Iglesias Gonsálvez2019-09-173-0/+61
| | | | | | | | | | | | | | | | | | | | We need this function to emit code that setups the control register later with the defined execution mode for the shader. Therefore, we emit it as the first instruction. v2: - Fix bug in setting the default mode mask in brw_rnd_mode_from_nir(). - Fix support for rounding modes in brw_rnd_mode_from_nir(). v3: - Updated to renamed shader info member and enum values (Andres). v4: - Add actual emission as first instruction of emit_nir_code (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965/fs/generator: add new opcode to set float controls modes in control ↵Samuel Iglesias Gonsálvez2019-09-173-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | register Before this commit, we had only FPRoundingMode decoration (the per instruction one) that is applied during the SPIR-V handling. In vtn_alu we find out the rounding mode, and generate the code accordingly that later will be used to look for the respective nir_op_f2f16_{rtz,rtne}. Per-instruction gets prioritized because we make them explicit conversions (with RTZ or RTNE nir opcodes) and they will override the default execution mode defined with float controls. However, we need to come back to the mode defined by float controls after the execution of the FP Rounding instruction. Therefore, the new SHADER_OPCODE_FLOAT_CONTROL_MODE opcode will be used to set the default rounding mode and denorms treatment in the whole shader while the pre-existent SHADER_OPCODE_RND_MODE, will be used as prioritized rounding mode in a per-instruction basis. v2: - Fix bug in defining BRW_CR0_FP_MODE_MASK. v3: - Update comment (Caio). v4: - Split the patch into the helper and the new opcode (this one) (Caio). v5: - Add an explanation on the actual purpose and priority of the newly introduced opcode in the commit log (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965/fs/generator: refactor rounding mode helper in preparation for float ↵Samuel Iglesias Gonsálvez2019-09-173-35/+32
| | | | | | | | | | | | | | | | | controls v2: - Fix bug in defining BRW_CR0_FP_MODE_MASK. v3: - Update comment (Caio). v4: - Split the patch into the helper (this one) and the new opcode (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965/fs/nir: add nir_op_unpack_half_2x16_split_*_flush_to_zeroSamuel Iglesias Gonsálvez2019-09-171-0/+4
| | | | | | | | | | | | | The denorm mode is set in the control register, no need to do something else. v2: - Add an assert to make sure that we realize if this assumption is broken in the future (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* intel/nir: do not apply the fsin and fcos trig workarounds for constsSamuel Iglesias Gonsálvez2019-09-171-2/+2
| | | | | | | | | | | | | | | | | | | If we have fsin or fcos trigonometric operations with constant values as inputs, we will multiply the result by 0.99997 in brw_nir_apply_trig_workarounds, making the result wrong. Adjusting the rules so they do not apply to const values we let a later constant fold to deal with it. v2: - Do not early constant fold but only apply the trig workaround for non constants (Caio). - Add fixes tag to commit log (Caio). Fixes: bfd17c76c12 "i965: Port INTEL_PRECISE_TRIG=1 to NIR." Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* nir: fix fmin/fmax support for doublesSamuel Iglesias Gonsálvez2019-09-171-2/+2
| | | | | | | | Until now, it was using the floating point version of fmin/fmax, instead of the double version. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir: fix denorm flush-to-zero in sqrt's lowering at nir_lower_double_opsSamuel Iglesias Gonsálvez2019-09-171-2/+15
| | | | | | | | | | | | | v2: - Replace hard coded value with DBL_MIN (Connor). v3: - Have into account the FLOAT_CONTROLS_DENORM_PRESERVE_FP64 flag (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v2]
* nir: fix denorms in unpack_half_1x16()Samuel Iglesias Gonsálvez2019-09-174-7/+45
| | | | | | | | | | | | | | | | | | | | | | | | | According to VK_KHR_shader_float_controls: "Denormalized values obtained via unpacking an integer into a vector of values with smaller bit width and interpreting those values as floating-point numbers must: be flushed to zero, unless the entry point is declared with the code:DenormPreserve execution mode." v2: - Add nir_op_unpack_half_2x16_flush_to_zero opcode (Connor). v3: - Adapt to use the new NIR lowering framework (Andres). v4: - Updated to renamed shader info member and enum values (Andres). v5: - Simplify flags logic operations (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v2]
* nir/algebraic: disable inexact optimizations depending on float controls ↵Samuel Iglesias Gonsálvez2019-09-171-0/+5
| | | | | | | | | | | | | | | | | | | | | | | execution mode If FLOAT_CONTROLS_SIGNED_ZERO_INF_NAN_PRESERVE or FLOAT_CONTROLS_DENORM_FLUSH_TO_ZERO are enabled, do not apply the inexact optimizations so the VK_KHR_shader_float_controls execution mode is respected. v2: - Do not apply inexact optimizations if SHADER_DENORM_FLUSH_TO_ZERO is enabled (Andres). v3: - Updated to renamed shader info member (Andres). v4: - Directly access execution mode instead of dragging it by parameter (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v1]
* nir/algebraic: mark float optimizations returning one parameter as inexactAndres Gomez2019-09-171-8/+8
| | | | | | | | | | | | | | | With the arrival of VK_KHR_shader_float_controls algebraic optimizations for float types of the form (('fop', a, b), a) become inexact depending on the execution mode. For example, if we have activated SHADER_DENORM_FLUSH_TO_ZERO, in case of a denorm value for the "a" parameter, we cannot return it still as a denorm, it needs to be flushed to zero. Therefore, we mark now all those operations as inexact. Suggested-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir/constant_expressions: mind rounding mode converting from float to ↵Samuel Iglesias Gonsálvez2019-09-171-2/+10
| | | | | | | | | | | | float16 destinations v2: - Move the op-code specific knowledge to nir_opcodes.py even if it means a rount trip conversion (Connor). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* nir/opcodes: make sure f2f16_rtz and f2f16_rtne behavior is not overriden by ↵Samuel Iglesias Gonsálvez2019-09-171-1/+20
| | | | | | | | | the float controls execution mode Suggested-by: Connor Abbott <[email protected]> Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* nir: mind rounding mode on fadd, fsub, fmul and fma opcodesSamuel Iglesias Gonsálvez2019-09-172-4/+46
| | | | | | | | | | | | | | | | | | | | | | According to Vulkan spec, the new execution modes affect only correctly rounded SPIR-V instructions, which includes fadd, fsub and fmul. v2: - Fix fmul, fsub and fadd round-to-zero definitions, they should use auxiliary functions to calculate the proper value because Mesa uses round-to-nearest-even rounding mode by default (Connor). v3: - Do an actual fused multiply-add at ffma (Connor). v4: - Simplify fadd and fmul for bit sizes < 64 (Connor). - Do not use double ffma for 32 bits float (Connor). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v3]
* nir: add support for round to zero rounding mode to nir_op_f2f32Samuel Iglesias Gonsálvez2019-09-172-0/+11
| | | | | | | | | f2f16's rounding modes are already handled and f2f64 don't need it as there is not a floating point type with higher bit size than 64 for now. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* util: add fp64 -> fp32 conversion support for RTNE and RTZ rounding modesSamuel Iglesias Gonsálvez2019-09-174-0/+95
| | | | | | | | | | | | | | | | | | | | | | In order to be coherent with the pre-existent API for half floats, this new API for double is the one meant to be used when doing double to float conversions. It is no more than a wrapper for the softfloat.h API but we meant to keep that one private. v2: - Fix bug in _mesa_double_to_float_rtz() in the inf/nan detection using the exponent value. v3: - Replace custom f64 -> f32 implementations with the softfloat one (Andres). v4: - Added API usage clarifying comments (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* util: add float to float16 conversions with RTZ and RTNESamuel Iglesias Gonsálvez2019-09-172-0/+22
| | | | | | | | | | | | | | | | | | In order to be coherent with the pre-existent functions, this new API is the one meant to be used when doing half float to float conversions. It is no more than a wrapper for the softfloat.h API but we meant to keep that one private. v2: - Replace custom f32 -> f16 RTZ implementation with the softfloat one (Andres). v3: - Added API usage clarifying comments (Caio). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* util: add softfloat functions to operate with doubles and floatsSamuel Iglesias Gonsálvez2019-09-174-0/+1544
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Implemented fadd, fsub, fmul and ffma for doubles and ffma for floats, rounding to zero, using a modified implementation from Berkely Softfloat 3e Library. Their implementation correctness has been checked with the Berkeley TestFloat Release 3e tool for x86_64. v2: - Reuse util_last_bit64() in _mesa_count_leading_zeros64() implementation (Connor). v3: - Add a specific ffma for floats version (Connor). - Implement the ffma for doubles version (Andres). - Lots of fixes in fadd, fsub and fmul (Andres). - Improved documentation (Andres). v4: - Added f64 -> f32 conversion function (Andres). - Added f32 -> f16 RTZ conversion function (Andres). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Tested-by: Andres Gomez <[email protected]> Acked-by: Caio Marcelo de Oliveira Filho <[email protected]>
* nir: add support for flushing to zero denorm constantsSamuel Iglesias Gonsálvez2019-09-175-41/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: - Refactor conditions and shared function (Connor). - Move code to nir_eval_const_opcode() (Connor). - Don't flush to zero on fquantize2f16 From Vulkan spec, VK_KHR_shader_float_controls section: "3) Do denorm and rounding mode controls apply to OpSpecConstantOp? RESOLVED: Yes, except when the opcode is OpQuantizeToF16." v3: - Fix bit size (Connor). - Fix execution mode on nir_loop_analize (Connor). v4: - Adapt after API changes to nir_eval_const_opcode (Andres). v5: - Simplify constant_denorm_flush_to_zero (Caio). v6: - Adapt after API changes and to use the new constant constructors (Andres). - Replace MAYBE_UNUSED with UNUSED as the first is going away (Andres). v7: - Adapt to newly added calls (Andres). - Simplified the auxiliary to flush denorms to zero (Caio). - Updated to renamed supported capabilities member (Andres). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v4] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* nir: add auxiliary functions to detect if a mode is enabledSamuel Iglesias Gonsálvez2019-09-171-0/+81
| | | | | | | | | | | | | | | | v2: - Added more functions. v3: - Simplify most of the functions (Caio). v4: - Updated to renamed enum values (Andres). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v2] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> [v3]
* spirv/nir: keep track of SPV_KHR_float_controls execution modesSamuel Iglesias Gonsálvez2019-09-173-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: - Add support for rounding modes for each floating point bit size. v3: - Commit e68871f6a44 ("spirv: Handle constants and types before execution modes") changed when the execution modes are handled, which affects the result of the floating point constants when the rounding mode is set in the execution mode. Moved the handling of the rounding modes before we handle the constants. v4: - Rename vtn_decoration "literals" to "operands" (Andres). - Simplify execution mode parsing util function (Caio). - Extend the comment about the timing of the handling of the rounding modes (Caio). v5: - Correct extension name (Caio). - Rename shader info member (Andres). - Rename float controls enum (Andres). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v3] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* spirv: check support for SPV_KHR_float_controls capabilitiesSamuel Iglesias Gonsálvez2019-09-172-0/+8
| | | | | | | | | | v2: - Correct extension name (Caio). - Rename supported capabilities member (Andres). Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Connor Abbott <[email protected]> [v1] Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
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