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* iris: Update fast clear colors on Gen9 with direct immediate writes.Kenneth Graunke2019-08-222-9/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gen11 stores the fast clear color in an "indirect clear buffer", as a packed pixel value. Gen9 hardware stores it as a float or integer value, which is interpreted via the format. We were trying to store that in a buffer, for similarity with Icelake, and MI_COPY_MEM_MEM it from there to the actual SURFACE_STATE bytes where it's stored. This unfortunately doesn't work for blorp_copy(), which does bit-for-bit copies, and overrides the format to a CCS-compatible UINT format. This causes the clear color to be interpreted in the overridden format. Normally, we provide the clear color on the CPU, and blorp_blit.c:2611 converts it to a packed pixel value in the original format, then unpacks it in the overridden format, so the clear color we use expands to the bits we originally desired. However, BLORP doesn't support this pack/unpack with an indirect clear buffer, as it would need to do the math on the GPU. On Gen11+, it isn't necessary, as the hardware does the right thing. This patch changes Gen9 to stop using an indirect clear buffer and simply do PIPE_CONTROLs with post-sync write immediate operations to store the new color over the surface states for regular drawing. BLORP continues streaming out surface states, and handles fast clear colors on the CPU. Fixes: 53c484ba8ac ("iris: blorp using resolve hooks") Reviewed-by: Rafael Antognolli <[email protected]>
* iris: Fix broken aux.possible/sampler_usages bitmask handlingKenneth Graunke2019-08-221-5/+6
| | | | | | | | | | | | | | | | | | | | | | For renderable surfaces, we allocate SURFACE_STATEs for each bit in res->aux.possible_usages. Sampler views use res->aux.sampler_usages. When pinning buffers, we call surf_state_offset_for_aux() to calculate the offset to the desired surface state. surf_state_offset_for_aux() took an aux_modes parameter, which should be one of those two fields. However...it was not using that parameter. It always used the broader res->aux.possible_usages field directly. One of the callers, update_clear_value(), was passing incorrect masks for this parameter. It iterated through the bits in order, using u_bit_scan(), which destructively modifies the mask. So each time we called it, the count of bits before our selected mode was 0, which would cause us to always update the SURFACE_STATE for ISL_AUX_USAGE_NONE, rather than updating each in turn. This was hidden by the earlier bug where surf_state_offset_for_aux() ignored the parameter. Fixes: 7339660e803 ("iris: Add aux.sampler_usages.") Reviewed-by: Rafael Antognolli <[email protected]>
* iris: Replace devinfo->gen with GEN_GENKenneth Graunke2019-08-221-22/+18
| | | | | | | This is genxml, we can compile out this code. Fixes: 26606672847 ("iris/gen8: Re-emit the SURFACE_STATE if the clear color changed.") Reviewed-by: Rafael Antognolli <[email protected]>
* pan/midgard: Fix writeout combiningAlyssa Rosenzweig2019-08-221-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | shader-db regression in the scheduler. Fixes: dff4986b1aa ("pan/midgard: Emit store_output branch just-in-time") total bundles in shared programs: 2055 -> 2019 (-1.75%) bundles in affected programs: 1055 -> 1019 (-3.41%) helped: 36 HURT: 0 helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 helped stats (rel) min: 0.35% max: 20.00% x̄: 6.71% x̃: 5.16% 95% mean confidence interval for bundles value: -1.00 -1.00 95% mean confidence interval for bundles %-change: -8.45% -4.97% Bundles are helped. total quadwords in shared programs: 3444 -> 3408 (-1.05%) quadwords in affected programs: 1897 -> 1861 (-1.90%) helped: 36 HURT: 0 helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1 helped stats (rel) min: 0.19% max: 14.29% x̄: 3.97% x̃: 2.99% 95% mean confidence interval for quadwords value: -1.00 -1.00 95% mean confidence interval for quadwords %-change: -5.08% -2.86% Quadwords are helped. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Implement gl_FragCoord correctlyAlyssa Rosenzweig2019-08-225-25/+32
| | | | | | | | Rather than passing through the transformed gl_Position, we can use the hardware-level varying for this, which will correctly handle gl_FragCoord.w Signed-off-by: Alyssa Rosenzweig <[email protected]>
* panfrost: Remove vertex buffer offset from its sizeAlyssa Rosenzweig2019-08-221-2/+5
| | | | | | | | | | | | | | | | | | | | | The offset is added to the base address, so we need to subtract it from the size to maintain the same end address and thus prevent a buffer overflow: end_address = start_address + size start_address' = start_address + offset size' = size - offset end_address' = start_address' + size' = (start_address + offset) + (size - offset) = (start_address + size) + (offset - offset) = start_address + size = end_address QED. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Handle special varyingsAlyssa Rosenzweig2019-08-221-5/+41
| | | | | | | We need a special path for special varyings so we parse them correctly instead of throwing an error when they inevitably point to bad memory. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Remove size/stride divisibility checkAlyssa Rosenzweig2019-08-221-7/+3
| | | | | | | | | The hardware doesn't care, and a lot of Panfrost code relies on an oversized buffer. The important part is that (stride * padded_num_vertices) is no greater than size, which we'll need to check once we validate instancing. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Decouple attribute/meta printingAlyssa Rosenzweig2019-08-221-4/+8
| | | | | | They are independent fields, so the parser should reflect that. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Print stub for uniformsAlyssa Rosenzweig2019-08-221-1/+11
| | | | | | | We don't need to dump the contents necessary, but having the stub with the address is useful. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Decode actual varying_meta addressAlyssa Rosenzweig2019-08-221-1/+1
| | | | | | | I don't know who thought this mask was a good idea but unfortunately it must have been me. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Downgrade shader property mismatch to warningAlyssa Rosenzweig2019-08-221-1/+2
| | | | | | | If we permit more $whatever through than the shader needs, that's a bit of a waste, but it isn't an error. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Validate, but do not print, index bufferAlyssa Rosenzweig2019-08-222-30/+29
| | | | | | | We don't actually care about the *contents* of the index buffer, but we would rather like to ensure it is present and of the correct size. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Validate mali_shader_meta statsAlyssa Rosenzweig2019-08-221-35/+78
| | | | | | | | | We can infer these stats in many cases from the disassembly, so we should try to sanity check where we can. We may need to be fuzzy about analysis, since analysis gives us a bound but we don't mind if it's not used fully by the shader. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Disassemble before printing shader descriptorAlyssa Rosenzweig2019-08-221-10/+8
| | | | | | This allows the shader descriptor to access the disassembled stats. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Promote <no shader> to an errorAlyssa Rosenzweig2019-08-221-1/+1
| | | | | | | There is no reason this should happen to an in-spec program, as far as I know. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Fix uniform printingAlyssa Rosenzweig2019-08-221-3/+3
| | | | | | Lazypasting from UBOs. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Validate blend shaders don't access I/OAlyssa Rosenzweig2019-08-221-2/+21
| | | | | | | | We could do better by forcing the checks to *equal* zero (right now, an indeterminate answer will pass the checks), but this is a start to guard against some egregious cases. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Validate and simplify FRAGMENT payloadsAlyssa Rosenzweig2019-08-221-12/+38
| | | | | | | | There are a number of conditions we need to test for to statically check for TILE_RANGE_FAULTs, but once these checks are in order, we can print as-is. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Validate MFBD tagsAlyssa Rosenzweig2019-08-223-39/+80
| | | | | | | | | These tags need to match up with what's actually described by the MFBD, so check this. Once this is checked, since the type and contents of the FBD are obvious from printing above, there's no need to explicitly mark off the framebuffer line. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Eliminate non-FBD dumped caseAlyssa Rosenzweig2019-08-221-29/+7
| | | | | | We don't need *more* cases to deal with. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Removing uniform buffer framingAlyssa Rosenzweig2019-08-221-13/+2
| | | | | | | | We can do single line prints: ubuf_0[192] = memory_161f5000 + 896; Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Remove mali_attr(_meta) framingAlyssa Rosenzweig2019-08-221-13/+2
| | | | | | It doesn't give any real added value. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/midgard: Disassemble integer constants in hexAlyssa Rosenzweig2019-08-221-2/+2
| | | | | | It's usually easier to parse mentally. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/midgard: Explain ffmaAlyssa Rosenzweig2019-08-221-0/+3
| | | | Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/midgard: Analyze simple loads/storeAlyssa Rosenzweig2019-08-221-5/+50
| | | | | | | | | | | | | | For shaders using exclusively direct attribute/varyings, we can work this out statically. For shaders with indirect access, we just set an upper bound of 16 (the max attributes/varyings we support) and the actual count will be reported regardless. We proceed similarly for textures/samplers, as well as for UBOs. While UBOs can be *indexed* indirectly, the *UBO itself* -- which is what we count in the shader descriptor (rather than the UBO descriptors) -- is statically determinable. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/midgard: Compute work_count via writesAlyssa Rosenzweig2019-08-221-1/+25
| | | | | | This is exact. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/midgard: Sketch static analysis to uniform countAlyssa Rosenzweig2019-08-221-0/+27
| | | | | | | | | | | | | | | This one is a little tricky, but the idea is that: r16-r23 are always uniforms r8-r15 are sometimes work, sometimes uniforms... ...but as work, they are always written before use ...and as uniforms, they are never written before use So we use that heuristic to determine the count to feed the machine. We'll record work register use in the next commit. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* pan/decode: Hoist shader-db stats to shared decodeAlyssa Rosenzweig2019-08-224-38/+70
| | | | | | We'll want all this information to validate the shader descriptor. Signed-off-by: Alyssa Rosenzweig <[email protected]>
* nir: Remove nir_const_load_to_arrAlyssa Rosenzweig2019-08-221-5/+0
| | | | | | | There are no remaining users in-tree. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* pan/midgard,bifrost: Expand nir_const_load_to_arrAlyssa Rosenzweig2019-08-222-2/+2
| | | | | | | | Panfrost is the only user of the macro; we are better off expanding than having random stuff in nir.h. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* glx: Make __glXGetDrawableAttribute return true sometimesAdam Jackson2019-08-221-1/+1
| | | | | | | | | | | | | | | | | | | Right now it always returns zero, but as of: commit a48a6b8a400e6e92961cf7b7b4c287e8e9875f39 Author: Adam Jackson <[email protected]> Date: Tue Nov 14 15:13:05 2017 -0500 glx: Prepare driFetchDrawable for no-config contexts We were hoping it would return true if the drawable could actually be looked up. It wasn't, so that didn't go very well. With the most recent update to <GL/glxext.h> glXQueryGLXPbufferSGIX (correctly) returns void, so there's no longer anything else besides driFetchDrawable that depends on the return value from __glXGetDrawableAttribute. Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glx: Sync <GL/glxext.h> with KhronosAdam Jackson2019-08-228-26/+29
| | | | | | | | Minor fixups required to keep the prototypes matching and to remove mention of retired enums. Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glx: Whitespace cleanupsAdam Jackson2019-08-221-2/+2
| | | | | Acked-by: Eric Engestrom <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* swr: use LLVM version string instead of re-computing itEric Engestrom2019-08-221-2/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* llvmpipe: use LLVM version string instead of re-computing itEric Engestrom2019-08-221-2/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* scons: define MESA_LLVM_VERSION_STRING like the other build systems doEric Engestrom2019-08-221-0/+1
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Disable NGG for geometry shaders.Bas Nieuwenhuizen2019-08-221-0/+20
| | | | | | | | A bunch of remaining issues including some that affect users. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111248 Fixes: ee21bd7440c "radv/gfx10: implement NGG support (VS only)" Reviewed-by: Samuel Pitoiset <[email protected]>
* util/timespec: use unsigned 64 bit integers for nsec valuesLionel Landwerlin2019-08-222-35/+18
| | | | | | | | | | | | | | | We added this utility for vulkan where all timeouts are given as uint64_t values. We can switch from signed to unsigned as this is the only user and if we ever deal with signed integers somewhere else we'll have to be careful to use the corresponding timespec_(add|sub)_msec and always pass absolute values. v2: Forgot to drop the test calling add_nsec() with a negative number Signed-off-by: Lionel Landwerlin <[email protected]> Reported-by: Juan A. Suarez Romero <[email protected]> Fixes: d2d70c3bb5 ("util: add a timespec helper") Acked-by: Daniel Stone <[email protected]>
* iris/android: fix build and link with libmesa_intel_perfTapani Pälli2019-08-222-0/+2
| | | | | | Fixes: 0fd4359733e "iris/perf: implement routines to return counter info" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* ac: fix exclusive scans on GFX8-GFX9Samuel Pitoiset2019-08-221-4/+3
| | | | | | | | | | | | This fixes a regression introduced with scan&reduce operations on GFX10. Note that some subgroups CTS still fail on GFX10 but I assume it's a different issue. This fixes dEQP-VK.subgroups.arithmetic.*.subgroupexclusive*. Fixes: 227c29a80de "amd/common/gfx10: implement scan & reduce operations" Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* util: fix os_create_anonymous_file on androidTapani Pälli2019-08-221-4/+5
| | | | | | | | Commit fixes current crashes with Vulkan applications on Android. Fixes: c0376a123418 "util: add anon_file.h for all memfd/temp file usage" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* i965: honor scanout requirement from DRILionel Landwerlin2019-08-211-1/+3
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* gallium/noop: Implement resource_get_paramKenneth Graunke2019-08-211-0/+23
| | | | | | | v2: Pass through to oscreen rather than faking it (review from Marek). Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Marek Olšák <[email protected]>
* gallium/rbug: Wrap resource_get_param if availableKenneth Graunke2019-08-211-0/+17
| | | | | | Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/trace: Wrap resource_get_param if availableKenneth Graunke2019-08-211-0/+16
| | | | | | Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/ddebug: Wrap resource_get_param if availableKenneth Graunke2019-08-211-0/+13
| | | | | | Fixes: 0346b700833 ("gallium/screen: Add pipe_screen::resource_get_param") Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa: recover target_check before get_current_tex_objectsJose Maria Casanova Crespo2019-08-211-7/+7
| | | | | | | | | | | | | | | | | At compressed_tex_sub_image we only can obtain the tex_object after compressed_subtexture_target_check is validated for TEX_MODE_CURRENT. So if the target is wrong the error is raised to the user. This completes the fix for the regression introduced on "mesa: refactor compressed_tex_sub_image function" of the pending failing tests: dEQP-GLES3.functional.negative_api.texture.compressedtexsubimage3d dEQP-GLES31.functional.debug.negative_coverage.get_error.texture.compressedtexsubimage3d v2: Fix warning that texObj might be used uninitialized (Gert Wollny) Fixes: 7df233d68dc ("mesa: refactor compressed_tex_sub_image function") Reviewed-By: Gert Wollny <[email protected]>
* gallium: Add buffer and configs handling or fp16 formatsKevin Strasser2019-08-215-0/+51
| | | | | | | | | | | | | | | Expose configs when allow_fp16_configs has been enabled and DRI_LOADER_CAP_FP16 is set in the loader. Also, make kms_swrast_dri respect format bpp, to allow for allocating buffers wider than 32 bpp. Make fp16 opt-in for gallium. Signed-off-by: Kevin Strasser <[email protected]> Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* i965: Add handling for fp16 configsKevin Strasser2019-08-212-1/+29
| | | | | | | | | | | | Expose configs when allow_fp16_configs has been enabled and DRI_LOADER_CAP_FP16 is set in the loader. Also, define a new dri configuration option so users can disable exposure of fp16 formats. Make fp16 opt-in for i965. Signed-off-by: Kevin Strasser <[email protected]> Reviewed-by: Adam Jackson <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
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