summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* amd/common/gfx9: workaround DCC corruption more conservativelyNicolai Hähnle2017-10-231-7/+25
* docs/release-calendar: update - 17.3.0-rc1 is outEmil Velikov2017-10-231-7/+1
* glsl: fix derived cs variablesIlia Mirkin2017-10-239-118/+244
* docs: add 17.4.0-devel release notes templateEmil Velikov2017-10-231-0/+64
* mesa: bump version to 17.4.0-develEmil Velikov2017-10-231-1/+1
* radv: automake: include radv_extensions.py in the tarball17.3-branchpointJuan A. Suarez Romero2017-10-231-0/+1
* ac/nir: Only clamp shadow reference on radeonsi.Bas Nieuwenhuizen2017-10-234-2/+9
* radv: Disallow indirect outputs for GS on GFX9 as well.Bas Nieuwenhuizen2017-10-231-3/+1
* ac/nir: Fix nir_texop_lod on GFX for 1D arrays.Bas Nieuwenhuizen2017-10-231-1/+3
* radv/ac/nir: only emit tess factors to storage if tes reads themDave Airlie2017-10-233-2/+4
* radv: Don't use vgpr indexing for outputs on GFX9.Bas Nieuwenhuizen2017-10-221-0/+5
* ac/nir: Account for compact array index in GS input load from LDS.Bas Nieuwenhuizen2017-10-211-1/+1
* radv: Don't compile shaders when they are cached already.Bas Nieuwenhuizen2017-10-211-19/+23
* radv: Don't check for max GL GS invocations.Bas Nieuwenhuizen2017-10-211-2/+0
* radv: Don't explicitly reference vertex shader for draw_id.Bas Nieuwenhuizen2017-10-211-1/+1
* radv: Don't reset cmd_buffer->state.dirty.Bas Nieuwenhuizen2017-10-211-2/+0
* radv: Correctly detect changed shaders for vertex descriptors.Bas Nieuwenhuizen2017-10-211-6/+6
* ac/nir: Set larged wrokgroup size for GS on GFX9.Bas Nieuwenhuizen2017-10-211-1/+1
* ac/nir: Take the max workgroup size of all provided shaders.Bas Nieuwenhuizen2017-10-211-1/+6
* radv: Fix pipeline cache locking issuesAlex Smith2017-10-211-7/+23
* anv: don't assert on device init on CannonlakeLionel Landwerlin2017-10-211-2/+4
* anv: disable stencil pma fix on Gen > 9Lionel Landwerlin2017-10-211-0/+2
* blorp: enable R32G32B32X32 blorp ccs copiesLionel Landwerlin2017-10-211-0/+1
* meson: Fix vc5 deps on the XML-generated headers.Eric Anholt2017-10-202-2/+2
* broadcom/vc5: Propagate vc4 aliasing fix to vc5.Eric Anholt2017-10-201-1/+1
* broadcom/vc4: Fix aliasing issueStefan Schake2017-10-201-1/+1
* meson: Add support for EGL glvndDylan Baker2017-10-201-2/+44
* meson: build libEGLDylan Baker2017-10-209-35/+304
* meson: move wayland_drm_protocol generation to wayland-drmDylan Baker2017-10-202-15/+13
* meson: Don't allow glx to be built without platform_x11Dylan Baker2017-10-201-2/+6
* meson: bump libdrm_amdgpu requirement to 2.4.85Dylan Baker2017-10-201-1/+1
* nir: Print the components referenced for split or packed shader in/outs.Eric Anholt2017-10-201-1/+25
* nir: Add a safety check that we don't remove dead I/O vars after lowering.Eric Anholt2017-10-201-4/+14
* radv: disable implicit sync for radv allocated bos v3Andres Rodriguez2017-10-214-1/+8
* radv: factor out radv_alloc_memoryAndres Rodriguez2017-10-212-5/+25
* radv: Expose VK_EXT_global_priorityAndres Rodriguez2017-10-214-0/+5
* radv: don't skip PS/VS partial flushAndres Rodriguez2017-10-211-8/+6
* radv: Implement VK_EXT_global_priorityAndres Rodriguez2017-10-214-8/+62
* radeonsi: hardcode shader WAVE_LIMIT to the maximum valueAndres Rodriguez2017-10-211-7/+14
* radv: hardcode shader WAVE_LIMIT to the maximum valueAndres Rodriguez2017-10-211-9/+18
* vulkan: update headers & registry to VK 1.0.63Andres Rodriguez2017-10-212-86/+213
* configure.ac: Bump libdrm_amdgpu version to 2.4.85.Bas Nieuwenhuizen2017-10-211-1/+1
* broadcom/vc5: Use SETMSF to handle discards.Eric Anholt2017-10-202-25/+12
* broadcom/vc5: Set the snorm/unorm packing functions to be lowered.Eric Anholt2017-10-201-0/+4
* broadcom/vc5: Fix pasteo that broke vertex texturing.Eric Anholt2017-10-201-1/+1
* broadcom/vc5: Move default attribute value setup to the CSO and fix them.Eric Anholt2017-10-203-29/+23
* broadcom/vc5: Move most of the shader state attribute record to the CSO.Eric Anholt2017-10-204-65/+90
* broadcom/vc5: Fix build failure frm nir_shader::stage removal.Eric Anholt2017-10-201-4/+4
* i965/fs: Use align1 mode on ternary instructions on Gen10+Matt Turner2017-10-201-4/+8
* i965: Add align1 ternary instruction emission supportMatt Turner2017-10-201-55/+160
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 01:55:19 +0000