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* vc4: Move the utile load/store functions to a header for reuse by v3d.Eric Anholt2018-12-194-202/+234
| | | | | These implementations of whole-utile load/stores would be the same for v3d, though the layouts of blocks of utiles has changed.
* v3d: Implement texture_subdata to reduce teximage upload copies.Eric Anholt2018-12-191-29/+85
| | | | | | | This lets us store the non-PBO glTexImage data directly into the tiled image without making an extra untiled memcpy for the gallium transfer. Improves 1024x1024 TexImage perf by ~19%, mostly from not thrashing around in the kernel mapping and unmapping the transfer's temporary area.
* v3d: Remove dead prototypes for load/store utile functions.Eric Anholt2018-12-191-2/+0
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* v3d: Don't try to create shadow tiled temporaries for 1D textures.Eric Anholt2018-12-191-1/+2
| | | | | | | They're raster order anyway, so we'd assertion fail along with wasting bandwidth. Fixes: 6ad9e8690d14 ("v3d: Add support for texturing from linear.")
* v3d: Fix check for TFU job completion in the simulator.Eric Anholt2018-12-191-1/+1
| | | | | | | | | | We're waiting for the jobs-completed count to increment (with wrapping), not to reach its starting state. This mostly ended up working out because the next v3d_hw_tick() for a submit CL would end up doing the TFU operation first, but it did fail when a blit was used for glReadPixels() at the end of a test. Fixes: ee0549ff9ab3 ("v3d: Add the V3D TFU submit interface to the simulator.")
* v3d: Put the dst bo first in the list of BOs for TFU calls.Eric Anholt2018-12-191-2/+2
| | | | | | | | | | | | In the UAPI, the first BO is the destination, and the one the kernel should do an exclusive reservation on. Currently we only do exclusive reservations, anyway. However, in the simulator path I was only copying back the "destination" BO (actually src in this case), and this caused regressions once I fixed the simulator to actually complete TFU before returning (since otherwise, the TFU op would happen at the start of the next CL submit and the draw would get the right contents). Fixes: 976ea90bdca2 ("v3d: Add support for using the TFU to do some blits.")
* nir: properly find the entry to keep in copy_prop_varsCaio Marcelo de Oliveira Filho2018-12-191-3/+16
| | | | | | | | | | | | | | | | | | | When copy propagation handles a store/copy, it iterates the current copy entries to remove aliases, but keeps the "equal" entry (if exists) to be updated. The removal step may swap the entries around (to ensure there are no holes), invalidating previous iteration pointers. The bug was saving such pointer to use later. Change the code to first perform the removals and then find the remaining right entry. This was causing updates to be lost since they were being made to an entry that was not part of the current copies. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108624 Fixes: b3c61469255 "nir: Copy propagation between blocks" Cc: [email protected] Reviewed-by: Jason Ekstrand <[email protected]>
* winsys/amdgpu: Pull in LLVM CFLAGSMichel Dänzer2018-12-192-1/+2
| | | | | | | | | Fixes build failure if the LLVM headers aren't in a standard include directory. Fixes: ec22dd34c88f "radeonsi: move SI_FORCE_FAMILY functionality to winsys" Reviewed-by: Nicolai Hähnle <[email protected]>
* nir: properly clear the entry sources in copy_prop_varsCaio Marcelo de Oliveira Filho2018-12-191-0/+3
| | | | | | | | | | | | | | When updating a copy entry source value from a "non-SSA" (the data come from a copy instruction) to a "SSA" (the data or parts of it come from SSA values), it was possible to hold invalid data in ssa[0] depending on the writemask. Because the union, ssa[0] could contain a pointer to a nir_deref_instr left-over from previous non-SSA usage. Change code to clean up the array before use to avoid invalid data around. Fixes: 62332d139c8 "nir: Add a local variable-based copy propagation pass" Reviewed-by: Jason Ekstrand <[email protected]>
* docs: format code blocks a bit nicelyEric Engestrom2018-12-191-0/+3
| | | | Signed-off-by: Eric Engestrom <[email protected]>
* docs: add meson cross compilation instructionsEric Engestrom2018-12-191-0/+83
| | | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* virgl: move resource creation / import / destruction to common codeGurchetan Singh2018-12-194-114/+89
| | | | | | We can remove some duplicated code. Reviewed-by: Elie Tournier <[email protected]>
* virgl: move resource metadata into base resourceGurchetan Singh2018-12-194-91/+71
| | | | | | A resource is just a buffer with some metadata. Reviewed-by: Elie Tournier <[email protected]>
* virgl: modify how we handle GL_MAP_FLUSH_EXPLICIT_BITGurchetan Singh2018-12-194-69/+25
| | | | | | | | | | | | | | | | | | Previously, we ignored the the glUnmap(..) operation and flushed before we flush the cbuf. Now, let's just flush the data when we unmap. Neither method is optimal, for example: glMapBufferRange(.., 0, 100, GL_MAP_FLUSH_EXPLICIT_BIT) glFlushMappedBufferRange(.., 25, 30) glFlushMappedBufferRange(.., 65, 70) We'll end up flushing 25 --> 70. Maybe we can fix this later. v2: Add fixme comment in the code (Elie) Reviewed-by: Elie Tournier <[email protected]>
* virgl: make virgl_buffers use resource helpersGurchetan Singh2018-12-192-20/+11
| | | | | | We can reuse the helpers we created. Reviewed-by: Elie Tournier <[email protected]>
* virgl: make transfer code with PIPE_BUFFER targetsGurchetan Singh2018-12-191-2/+4
| | | | | | | util_format_get_blocksize returns 1 for R8 formats (all PIPE_BUFFERs are R8). Reviewed-by: Elie Tournier <[email protected]>
* virgl: consolidate transfer codeGurchetan Singh2018-12-195-59/+73
| | | | | | | | We could allocate and destroy transfers in one place. v2: Keep l_stride around. Reviewed-by: Elie Tournier <[email protected]>
* virgl: store layer_stride in metadataGurchetan Singh2018-12-192-6/+6
| | | | Reviewed-by: Elie Tournier <[email protected]>
* virgl: move vrend_get_tex_image_offset to common codeGurchetan Singh2018-12-193-26/+28
| | | | | | Will be reused. Reviewed-by: Elie Tournier <[email protected]>
* virgl: move virgl_resource_layout to common codeGurchetan Singh2018-12-193-42/+51
| | | | | | Will be reused. Reviewed-by: Elie Tournier <[email protected]>
* virgl: move texture metadata to common codeGurchetan Singh2018-12-192-12/+18
| | | | | | Will be reused. Reviewed-by: Elie Tournier <[email protected]>
* virgl: remove unnessecary codeGurchetan Singh2018-12-191-3/+0
| | | | | | | | | With commit 89b479, we moved to tracking buffer cleanliness when binding. TEST=dEQP-GLES31.functional.image_load_store.buffer.load_store.r32ui Reviewed-by: Elie Tournier <[email protected]>
* virgl: texture_transfer_pool --> transfer_poolGurchetan Singh2018-12-196-11/+11
| | | | | | It's used for all types of resources. Reviewed-by: Elie Tournier <[email protected]>
* radeonsi: const-ify the si_query_opsNicolai Hähnle2018-12-193-5/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: split perfcounter queries from si_query_hwNicolai Hähnle2018-12-191-50/+93
| | | | | | | Remove a level of indirection to make the code more explicit -- should make it easier to follow what's going on. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: factor si_query_buffer logic out of si_query_hwNicolai Hähnle2018-12-194-110/+99
| | | | | | | | | | | This is a move towards using composition instead of inheritance for different query types. This change weakens out-of-memory error reporting somewhat, though this should be acceptable since we didn't consistently report such errors in the first place. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move query suspend logic into the top-level si_query structNicolai Hähnle2018-12-193-44/+62
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move remaining perfcounter code into si_perfcounter.cNicolai Hähnle2018-12-197-766/+643
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: track constant buffer bind history in si_pipe_set_constant_bufferNicolai Hähnle2018-12-191-2/+3
| | | | | | Other callers of si_set_constant_buffer don't need it. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use si_set_rw_shader_buffer for setting streamout buffersNicolai Hähnle2018-12-191-50/+11
| | | | | | Reduce the number of places that encode buffer descriptors. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add an si_set_rw_shader_buffer convenience functionNicolai Hähnle2018-12-192-45/+64
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: avoid using hard-coded SI_NUM_RW_BUFFERSNicolai Hähnle2018-12-191-1/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: show the fixed function TCS in debug dumpsNicolai Hähnle2018-12-191-2/+8
| | | | | | This is rather important for merged VS/TCS as LSHS shaders... Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: const-ify si_set_tesseval_regsNicolai Hähnle2018-12-191-2/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: rename SI_RESOURCE_FLAG_FORCE_TILING to clarify its purposeNicolai Hähnle2018-12-193-4/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: don't set RAW_WAIT for CP DMA clearsNicolai Hähnle2018-12-191-1/+2
| | | | | | There is never a read-after-write hazard because the command doesn't read. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/gfx9: use SET_UCONFIG_REG_INDEX packets when availableNicolai Hähnle2018-12-194-5/+18
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: add si_init_draw_functions and make some functions staticNicolai Hähnle2018-12-194-22/+22
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: extract declare_vs_blit_inputsNicolai Hähnle2018-12-191-18/+25
| | | | | | Prepare for some later refactoring. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move SI_FORCE_FAMILY functionality to winsysNicolai Hähnle2018-12-192-34/+36
| | | | | | | This helps some debugging cases by initializing addrlib with slightly more appropriate settings. Reviewed-by: Marek Olšák <[email protected]>
* ac/surface: 3D and cube surfaces are never displayableNicolai Hähnle2018-12-191-3/+5
| | | | Reviewed-by: Marek Olšák <[email protected]>
* amd/common: add i1 special case to ac_build_{inclusive,exclusive}_scanNicolai Hähnle2018-12-191-2/+25
| | | | | | | Allow for a unified but efficient treatment of adding a bitmask over a wave or an entire threadgroup. Reviewed-by: Marek Olšák <[email protected]>
* amd/common: scan/reduce across waves of a workgroupNicolai Hähnle2018-12-192-4/+227
| | | | | | | Order-aware scan/reduce can trade-off LDS traffic for external atomics memory traffic in producer/consumer compute shaders. Reviewed-by: Marek Olšák <[email protected]>
* amd/common: add ac_build_ifccNicolai Hähnle2018-12-192-4/+4
| | | | Reviewed-by: Marek Olšák <[email protected]>
* amd/common: whitespace fixesNicolai Hähnle2018-12-191-10/+8
| | | | Reviewed-by: Marek Olšák <[email protected]>
* amd/sid_tables: add additional python3 compatibility importsNicolai Hähnle2018-12-191-1/+1
| | | | | | This happened to bite me while doing some experiments. Reviewed-by: Marek Olšák <[email protected]>
* r600: remove redundant semicolonNicolai Hähnle2018-12-191-1/+1
| | | | | Reviewed-By: Gert Wollny <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ddebug: always flush when requested, even when hang detection is disabledNicolai Hähnle2018-12-191-0/+2
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ddebug: simplify watchdog loop and fix crash in the no-timeout caseNicolai Hähnle2018-12-193-73/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | The following race condition could occur in the no-timeout case: API thread Gallium thread Watchdog ---------- -------------- -------- dd_before_draw u_threaded_context draw dd_after_draw add to dctx->records signal watchdog dump & destroy record execute draw dd_after_draw_async use-after-free! Alternatively, the same scenario would assert in a debug build when destroying the record because record->driver_finished has not signaled. Fix this and simplify the logic at the same time by - handing the record pointers off to the watchdog thread *before* each draw call and - waiting on the driver_finished fence in the watchdog thread Reviewed-by: Marek Olšák <[email protected]>
* anv/android: turn on VK_ANDROID_external_memory_android_hardware_bufferTapani Pälli2018-12-191-0/+1
| | | | | Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
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