mesa.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	broadcom/vc5: Fix build failure frm nir_shader::stage removal.	Eric Anholt	2017-10-20	1	-4/+4
*	i965/fs: Use align1 mode on ternary instructions on Gen10+	Matt Turner	2017-10-20	1	-4/+8
*	i965: Add align1 ternary instruction emission support	Matt Turner	2017-10-20	1	-55/+160
*	i965: Add align1 ternary instruction disassembler support	Matt Turner	2017-10-20	2	-75/+288
*	i965: Add align1 ternary instruction-word support	Matt Turner	2017-10-20	1	-0/+108
*	i965: Add align1 ternary instruction support to conversion functions	Matt Turner	2017-10-20	4	-34/+101
*	i965: Add align1 ternary instruction field encodings	Matt Turner	2017-10-20	1	-0/+35
*	i965: Add functions to abstract access to 3src register types	Matt Turner	2017-10-20	2	-20/+23
*	i965: Rename brw_inst's functions that access the 3src register type	Matt Turner	2017-10-20	3	-18/+18
*	i965: Rename brw_inst 3src functions in preparation for align1	Matt Turner	2017-10-20	4	-86/+92
*	i965: Print subreg in units of type-size on ternary instructions	Matt Turner	2017-10-20	1	-5/+26
*	i965: Add functions for brw_reg_type <-> hw 3src type	Matt Turner	2017-10-20	2	-0/+58
*	i965: Move brw_reg_type_is_floating_point to brw_reg_type.h	Matt Turner	2017-10-20	2	-13/+15
*	nir: Get rid of nir_shader::stage	Jason Ekstrand	2017-10-20	50	-187/+193
*	radv: use optimal packet order for draws	Samuel Pitoiset	2017-10-20	1	-17/+79
*	radv: add radv_emit_shaders_prefetch()	Samuel Pitoiset	2017-10-20	1	-12/+19
*	radv: add radv_emit_shader_prefetch()	Samuel Pitoiset	2017-10-20	1	-25/+23
*	st/mesa: correct a u_vbuf comment	Marek Olšák	2017-10-20	1	-3/+5
*	etnaviv: fix implicit conversion warning	Christian Gmeiner	2017-10-20	2	-2/+2
*	etnaviv: enable occlusion query if GPU supports it	Christian Gmeiner	2017-10-20	1	-1/+2
*	etnaviv: add support for occlusion queries	Christian Gmeiner	2017-10-20	1	-0/+78
*	etnaviv: add basic infrastructure for hw queries	Christian Gmeiner	2017-10-20	6	-0/+292
*	etnaviv: update headers from rnndb	Christian Gmeiner	2017-10-20	5	-89/+622
*	relnotes/17.3: EGL_IMG_context_priority is now implemented	Chris Wilson	2017-10-20	1	-0/+1
*	i965: Report supported context priorities to EGL/DRI	Chris Wilson	2017-10-20	1	-0/+13
*	i965: Pass the EGL/DRI context priority through to the kernel	Chris Wilson	2017-10-20	3	-0/+46
*	i965: Record the presence of the kernel scheduler	Chris Wilson	2017-10-20	1	-0/+11
*	i965: Sync i915_drm.h from kernel for IMG_context_priority	Chris Wilson	2017-10-20	1	-3/+24
*	egl,dri: Propagate context priority hint to driver->CreateContext	Chris Wilson	2017-10-20	16	-30/+77
*	egl: Support IMG_context_priority	Chris Wilson	2017-10-20	6	-0/+79
*	radv: don't flush the VS when srcStageMask == TOP_OF_PIPE_BIT	Fredrik Höglund	2017-10-20	1	-2/+1
*	radv: mark total_count as MAYBE_UNUSED in CmdSet{Viewport,Scissor}	Samuel Pitoiset	2017-10-20	1	-2/+2
*	radv: rename radv_cmd_buffer_flush_state() to radv_draw()	Samuel Pitoiset	2017-10-20	1	-59/+51
*	radv: emit primitive restart from radv_emit_draw_registers()	Samuel Pitoiset	2017-10-20	1	-29/+30
*	radv: add radv_emit_draw_registers()	Samuel Pitoiset	2017-10-20	1	-12/+34
*	radv: refactor indirect draws (+count buffer) with radv_draw_info	Samuel Pitoiset	2017-10-20	1	-103/+48
*	radv: refactor indirect draws with radv_draw_info	Samuel Pitoiset	2017-10-20	1	-75/+133
*	radv: refactor simple and indexed draws with radv_draw_info	Samuel Pitoiset	2017-10-20	1	-68/+118
*	radv: re-emit VGT_INDEX_TYPE because non-indexed draws overwrite it	Samuel Pitoiset	2017-10-20	1	-2/+11
*	radv: clear the dirty flags in the corresponding emit helpers	Samuel Pitoiset	2017-10-20	1	-2/+8
*	radv: rename RADV_CMD_DIRTY_RENDER_TARGETS to RADV_CMD_DIRTY_FRAMEBUFFER	Samuel Pitoiset	2017-10-20	2	-3/+3
*	radv: move DB_COUNT_CONTROL initialization to si_emit_config()	Samuel Pitoiset	2017-10-20	2	-1/+5
*	i965/vec4: remove setting default LOD in the backend	Samuel Iglesias Gonsálvez	2017-10-20	2	-21/+0
*	i965/fs: remove setting default LOD in the backend	Samuel Iglesias Gonsálvez	2017-10-20	1	-9/+0
*	nir: set default lod to texture opcodes that needed it but don't provide it	Samuel Iglesias Gonsálvez	2017-10-20	1	-0/+13
*	radv: enable GS on GFX9	Bas Nieuwenhuizen	2017-10-20	1	-3/+1
*	radv: calculate and emit GFX9 GS registers to pipeline state.	Bas Nieuwenhuizen	2017-10-20	4	-7/+158
*	ac/nir: Fix up GS input vgprs.	Bas Nieuwenhuizen	2017-10-20	1	-0/+15
*	ac/nir: Add loading from LDS for merged GS.	Bas Nieuwenhuizen	2017-10-20	1	-15/+21
*	ac/nir: Add ES output to LDS for GFX9.	Bas Nieuwenhuizen	2017-10-20	1	-8/+49