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* nir: Optimize out stores of undefs.Kenneth Graunke2016-05-051-0/+30
* nir: Replace vecN(undef, undef, ...) with a single undef.Kenneth Graunke2016-05-051-0/+33
* nir: Rename opt_undef_alu to opt_undef_csel; update comments.Kenneth Graunke2016-05-051-12/+13
* i965: Rework passthrough TCS checks.Kenneth Graunke2016-05-054-2/+5
* swr: [rasterizer core] Faster modulo operator in ProcessVertsTim Rowley2016-05-051-1/+4
* swr: [rasterizer] Small warning cleanupTim Rowley2016-05-052-8/+4
* swr: [rasterizer] Add SWR_ASSUME / SWR_ASSUME_ASSERT macrosTim Rowley2016-05-052-14/+52
* swr: [rasterizer] Miscellaneous backend changesTim Rowley2016-05-053-22/+31
* swr: [rasterizer] Add support for X24_TYPELESS_G8_UINT formatTim Rowley2016-05-053-7/+41
* swr: [rasterizer jitter] Fix printing bugs for tracing.Tim Rowley2016-05-051-81/+24
* swr: [rasterizer memory] Add missing store tiles functionTim Rowley2016-05-051-1/+4
* swr: [rasterizer jitter] Add asserts for supported formats in fetch shaderTim Rowley2016-05-051-0/+2
* swr: [rasterizer core] Fix thread allocationTim Rowley2016-05-051-17/+47
* swr: [rasterizer core] Fix threadviz support in bucketsTim Rowley2016-05-053-12/+14
* swr: [rasterizer] Whitespace cleanup and misc changesTim Rowley2016-05-055-5/+2
* radeonsi: mark descriptor loads as using dynamically uniform indicesNicolai Hähnle2016-05-051-5/+17
* i965/fs: Don't follow pow with an instruction with two dest regs.Matt Turner2016-05-051-0/+18
* swr: Remove stall waiting for core query counters.Bruce Cherniak2016-05-054-124/+81
* mesa/ubo: add missing compute cases for ubo/atomic buffersDave Airlie2016-05-051-0/+6
* mesa/compute: drop pointless casts.Dave Airlie2016-05-051-3/+3
* mesa: remove null check before freeThomas Hindoe Paaboel Andersen2016-05-052-4/+2
* freedreno: remove null check before freeThomas Hindoe Paaboel Andersen2016-05-051-2/+1
* nir: fix assert for wildcard pairsThomas Hindoe Paaboel Andersen2016-05-051-1/+1
* glapi: fix parameter type for GetSamplerParameterIuivEXT() in es_EXT.xmlBrian Paul2016-05-041-2/+2
* mesa: include texture format in glGenerateMipmap error messageBrian Paul2016-05-041-1/+2
* main: uses casts to silence some _mesa_debug() format warningsBrian Paul2016-05-041-4/+6
* docs: Mark GL_ARB_query_buffer_object as done for i965/hsw+Jordan Justen2016-05-042-1/+2
* i965: Implement ARB_query_buffer_object for HSW+Jordan Justen2016-05-048-3/+501
* i965/gen6+: Add load register immediate helper functionsJordan Justen2016-05-042-0/+36
* i965/hsw+: Add support for copying a registerJordan Justen2016-05-043-0/+18
* i965/gen6+: Add support for storing immediate data into a bufferJordan Justen2016-05-043-0/+50
* i965: Add MI_MATH reg defs for HSW+Jordan Justen2016-05-041-0/+38
* i965: Add brw_store_register_mem32Jordan Justen2016-05-042-0/+28
* i965: Use offset instead of index in brw_store_register_mem64Jordan Justen2016-05-045-54/+52
* r600,compute: create vtx buffer for text + rodataJan Vesely2016-05-041-2/+10
* freedreno: allow ctx->draw_vbo to failRob Clark2016-05-045-30/+37
* freedreno: move shader-stage dirty bits to global dirty flagRob Clark2016-05-048-59/+41
* freedreno/a4xx: fix bogus offset for f32x24s8 stencil restoreRob Clark2016-05-041-4/+5
* freedreno: add some debug_asserts() to catch insane offsetsRob Clark2016-05-041-0/+2
* freedreno/a4xx: deal with VS which do not write positionRob Clark2016-05-041-0/+7
* freedreno/ir3: remove a couple redundant is_flow()sRob Clark2016-05-042-2/+2
* freedreno/ir3: cp small negative integers tooRob Clark2016-05-041-1/+2
* freedreno/ir3: fix # of registersRob Clark2016-05-041-1/+1
* freedreno/ir3: lower immeds to constRob Clark2016-05-043-4/+80
* freedreno/ir3: add ir3_cp_ctxRob Clark2016-05-043-12/+22
* add REVIEWERS and get_reviewer.pl scriptRob Clark2016-05-042-0/+2407
* nouveau/video: properly detect the decoder class for availability checksIlia Mirkin2016-05-041-8/+17
* i965: Delete stale perf_debug().Kenneth Graunke2016-05-041-2/+0
* i965: Silence unused variable warningKenneth Graunke2016-05-041-2/+0
* mesa/main: handle double uniform matrices properlyJuan A. Suarez Romero2016-05-041-1/+1
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