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* i965/fs: Implement nir_op_imul/umul_high in terms of MULH.Francisco Jerez2015-08-061-31/+2
* i965/fs: Lower the MULH virtual instruction.Francisco Jerez2015-08-061-0/+55
* i965/fs: Indent the implementation of 32x32-bit MUL lowering by one level.Francisco Jerez2015-08-061-130/+134
* i965/fs: Lower 32x32 bit multiplication on BXT.Francisco Jerez2015-08-061-2/+2
* i965: Define virtual instruction to calculate the high 32 bits of a multiply.Francisco Jerez2015-08-066-0/+13
* glsl: Initialize patch member of glsl_struct_fieldMichel Dänzer2015-08-061-0/+2
* nir: add missing type to type_size_vec4()Timothy Arceri2015-08-051-0/+2
* mesa: Add missing check of format and type in glTexSubImageXD on GLES 3.0Eduardo Lima Mitev2015-08-051-47/+69
* mesa: Fix error returned by glCopyTexImage2D() upon an invalid internal formatEduardo Lima Mitev2015-08-051-9/+9
* mesa: Validate target before resolving tex obj in glTex(ture)SubImageXDEduardo Lima Mitev2015-08-051-15/+14
* mesa: Fix errors values returned by glShaderBinary()Eduardo Lima Mitev2015-08-051-3/+14
* mesa: do not modify args when errors with GetProgramResourceNameTapani Pälli2015-08-051-6/+0
* glsl: add variable mode check to build_stagerefTapani Pälli2015-08-051-4/+13
* dri: set the __DRI_API_OPENGL bit based on max gl compat versionFrank Binns2015-08-041-1/+3
* egl: Add eglQuerySurface surface type check for EGL_LARGEST_PBUFFER attribFrank Binns2015-08-041-1/+2
* egl/dri: Add error info needed for EGL_EXT_image_dma_buf_import extensionFrank Binns2015-08-042-2/+10
* vc4: Use nir_lower_load_const_to_scalar().Eric Anholt2015-08-041-0/+1
* nir: Add a nir_lower_load_const_to_scalar() pass.Eric Anholt2015-08-043-0/+105
* vc4: Don't bother de-SSAing values that aren't part of phi webs.Eric Anholt2015-08-041-15/+44
* nir: Add algebraic opt for no-op iand.Eric Anholt2015-08-041-0/+1
* vc4: Don't bother saturating the dst color for blending.Eric Anholt2015-08-041-8/+2
* vc4: Make r4-writes implicitly move to a temp, and allocate temps to r4.Eric Anholt2015-08-048-107/+106
* vc4: Drop a dead prototype.Eric Anholt2015-08-041-8/+0
* Revert "nir: Use a single bit for the dual-source blend index"Eric Anholt2015-08-041-6/+2
* freedreno/a4xx: add independent blend function supportRob Clark2015-08-042-8/+10
* freedreno/a4xx: MRT supportRob Clark2015-08-0412-132/+212
* freedreno: move the half-precision logic into coreRob Clark2015-08-044-31/+38
* freedreno: simplify/cleanup resource status trackingRob Clark2015-08-044-48/+71
* freedreno: fix stream-out caps vec4->componentsRob Clark2015-08-041-2/+2
* freedreno: small bit of cleanup about max rendertargetsRob Clark2015-08-0413-17/+40
* glx: Use _mesa_lroundevenf() in glPixelStoref().Matt Turner2015-08-041-12/+13
* util: Use SSE intrinsics in _mesa_lroundeven{f,}.Matt Turner2015-08-041-0/+22
* mesa: Use _mesa_lroundevenf() in some more places.Matt Turner2015-08-042-12/+6
* vl/mpeg12: Silence GCC unused-variable warning.Vinson Lee2015-08-031-0/+1
* glsl: replace old hash table with new and faster oneAlejandro Seguí2015-08-041-7/+11
* glsl: Add constuctors for the common cases of glsl_struct_fieldIan Romanick2015-08-034-56/+53
* i965: Make gen7_upload_ps_state staticIan Romanick2015-08-032-10/+1
* i965: Remove extern declaration for nonexistent state atomIan Romanick2015-08-031-1/+0
* i965: Trivial formatting changes in gen7_vs_state.cIan Romanick2015-08-031-5/+5
* i965: Trivial formatting changes in gen6_multisample_state.cIan Romanick2015-08-031-5/+2
* i965: Trivial formatting changes in brw_misc_state.cIan Romanick2015-08-031-26/+23
* i965: Trivial formatting changes in brw_draw_upload.cIan Romanick2015-08-031-3/+6
* i965: Trivial formatting changes in brw_draw.cIan Romanick2015-08-031-51/+51
* i965: Trivial formatting changes in brw_wm.cIan Romanick2015-08-031-43/+41
* i965/nir: Do not scalarize phis in non-scalar setupsIago Toral Quiroga2015-08-031-2/+6
* i965/vec4: Handle uniform and GRF array access on vertex programs (NIR)Antia Puentes2015-08-031-1/+1
* i965/nir/vec4: Handle uniforms on vertex programsAntia Puentes2015-08-031-2/+32
* i965/vec4: Enable NIR-vec4 pass on ARB_vertex_programsAntia Puentes2015-08-031-23/+24
* i965/nir/gs: Implement support for gl_InvocationID system valueIago Toral Quiroga2015-08-032-0/+29
* i965/gs/gen6: Refactor ir_emit_vertex and ir_end_primitive for gen6Samuel Iglesias Gonsalvez2015-08-032-1/+14
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