| Commit message (Collapse) | Author | Age | Files | Lines |
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This new function takes separate Z24 depth and S8 stencil sources,
and packs them into a single combined Z24S8 buffer.
Reviewed-by: Eric Anholt <[email protected]>
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This will be used by u_transfer_helper.c shortly, in order to split
packed depth-stencil into separate resources.
Reviewed-by: Eric Anholt <[email protected]>
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This is needed for nir_gather_info to actually count the textures,
since it operates solely on variables.
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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This is needed for nir_gather_info to actually count the new textures,
since it operates solely on variables.
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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This corresponds to commit 801cca8104245c07e8cc532 on GitHub.
Acked-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Acked-by: Jason Ekstrand <[email protected]>
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sb/sb_bc_parser.cpp:620:27: warning: use of logical '&&' with constant operand [-Wconstant-logical-operand]
if (cf->bc.op_ptr->flags && FF_GDS)
^ ~~~~~~
sb/sb_bc_parser.cpp:620:27: note: use '&' for a bitwise operation
if (cf->bc.op_ptr->flags && FF_GDS)
^~
&
sb/sb_bc_parser.cpp:620:27: note: remove constant to silence this warning
if (cf->bc.op_ptr->flags && FF_GDS)
~^~~~~~~~~
Fixes: da977ad90747 ("r600/sb: start adding GDS support")
Signed-off-by: Vinson Lee <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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ISL_AUX_USAGE_NONE happens to be the same as "false", but let's do the
right thing and use the enum.
v2: fix intel_miptree_finish_depth too (Caio)
Reviewed-by: Dylan Baker <[email protected]>
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108113
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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SCons MSVC support relies on vcvarsall.bat to extract the PATH, CPP
includes, library paths, etc.
And SCons also has an build env var named MSVC_USE_SCRIPT which one can
use to point to alternative vcvarsall.bat script.
This change exposes this MSVC_USE_SCRIPT build env variable as a SCons
command line variable. This will enable using MSVC outside Program
Files (e.g, network shares, etc.)
This change also links advapi32 library, necessary for the Windows
Registry API used by WGL state tracker, avoiding missing symbols.
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Roland Scheidegger <[email protected]>
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This fixes some new memory model tests:
dEQP-VK.memory_model.message_passing.core11.u32.coherent.fence_fence.atomicwrite.device.*
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108112
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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v2: - change how the access qualifiers are accumulated
v3: - duplicate members in struct_member_decoration_cb()
- handle access qualifiers on variables
- remove access qualifiers handling in _vtn_variable_load_store()
- fix setting access qualifiers on type->array_element
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]
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Fixes: e4538b9 "anv: Implement VK_KHR_driver_properties"
Signed-off-by: Tapani Pälli <[email protected]>
Acked-by: Eric Engestrom <[email protected]>
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This is basically a port of commit,
3ade766684933ac84e41634429fb693f85353c11
("i965: Disable 3DSTATE_WM_HZ_OP fields.")
The BDW+ docs describe how to use the 3DSTATE_WM_HZ_OP instruction in
the section titled, "Optimized Depth Buffer Clear and/or Stencil Buffer
Clear." It mentions that the packet overrides GPU state for the clear
operation and needs to be reset to 0s to clear the overrides. Depending
on the kernel, we may not get a context with the GPU state for this
packet zeroed. Do it ourselves just in case.
Prevents a number of GPU hangs when running crucible on ICL. I tried to
get the exact number of hangs that occurs without this patch, but was
unsuccessful. The test machine became unresponsive before completing the
full run.
Reviewed-by: Kenneth Graunke <[email protected]>
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Ref: 263b584d5e4 "i965/skl: Emit extra zeros in STATE_BASE_ADDRESS on Skylake."
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Rafael Antognolli <[email protected]>
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Ref: 263b584d5e4 "i965/skl: Emit extra zeros in STATE_BASE_ADDRESS on Skylake."
Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Rafael Antognolli <[email protected]>
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The b2f and b2i conversions always produce zero or one which are both
representable in every type and size. Since b2i and b2f support all bit
sizes, we can just get rid of the conversion opcode.
total instructions in shared programs: 15089335 -> 15084368 (-0.03%)
instructions in affected programs: 212564 -> 207597 (-2.34%)
helped: 896
HURT: 0
total cycles in shared programs: 369831123 -> 369826267 (<.01%)
cycles in affected programs: 2008647 -> 2003791 (-0.24%)
helped: 693
HURT: 216
Reviewed-by: Ian Romanick <[email protected]>
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This is valid NIR but you can't actually hit this case today. GLSL IR
doesn't have a bool to double opcode; it does f2d(b2f(x)). In SPIR-V we
don't have any to/from bool conversion opcodes at all. However, the
next commit will make us start generating it so we should be ready.
Reviewed-by: Ian Romanick <[email protected]>
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Several of the Atom GPUs have additional restrictions on alignment when
moving < 64-bit source to a 64-bit destination. All of the nir_op_*2*64
code generation paths respected this, but nir_op_b2[fi] did not.
Previous to commit a68dd47b911 it was not possible to generate such an
instruction from the GLSL path. It may have been possible from SPIR-V,
but it's not clear. The aforementioned patch converts a 64-bit
nir_op_fsign into a sequence of operations including a nir_op_b2f with a
64-bit result. This "just works" everywhere except these Atom parts.
This problem was not detected during normal CI testing because the Atom
parts are not included in developer builds.
v2 (idr): Make the patch compile, and make some cosmetic changes. Add a
commit message.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108319
Fixes: a68dd47b911 "nir/algebraic: Simplify fsat of fsign"
Reviewed-by: Ian Romanick <[email protected]>
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Signed-off-by: Vinson Lee <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
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Fixed pack_uint_Z_FLOAT32 by casting row data to float instead uint.
Remove code duplicate function pack_uint_Z_FLOAT32_X24S8.
Edited case in "_mesa_get_pack_uint_z_func".
Now it looks like "_mesa_get_pack_float_z_func".
Remove _mesa_problem call, which was added for debuging this issue.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=91433
Signed-off-by: Illia Iorin <[email protected]>
Reviewed-by: Nanley Chery <[email protected]>
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Whiskey Lake uses the same gen graphics as Coffe Lake, including some
ids that were previously marked as reserved on Coffe Lake, but that
now are moved to WHL page.
This follows the ids and approach used on kernel's commit
b9be78531d27 ("drm/i915/whl: Introducing Whiskey Lake platform")
and commit c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs")
v2: Lionel noticed that GT{1,2,3} on kernel wasn't following
spec when looking to number of EUs, so kernel has been updated.
Cc: Lionel Landwerlin <[email protected]>
Cc: José Roberto de Souza <[email protected]>
Cc: Anuj Phogat <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
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vlVaGetImage should respect the width, height, and coordinates x and y that
passed in. Therefore, pipe_box should be created with the passed in values
instead of surface width/height.
v2: add input size check, return error when size out of bounds
v3: fix the size check for vaimage
v4: add size adjustment for x and y coordinates
Signed-off-by: Boyuan Zhang <[email protected]>
Cc: "18.2" <[email protected]>
Reviewed-by: Leo Liu <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Acked-by: Christian König <[email protected]>
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This fixes crashes for some CTS:
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.color.*.linear_*_*
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.color.*.*_linear_*
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108113
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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R32G32B32 are weird formats and we are only going to support
some basic operations for now.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Otherwise, Yakuza and The Evil Within hang the GPU with DXVK.
This apparently only works on Polaris.
Suggested by Marek.
Cc: [email protected]
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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The es check is already covered by the is_version() check.
Reviewed-by: Ian Romanick <[email protected]>
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Found by coverity
Reviewed-by: Marek Olšák <[email protected]>
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Found by coverity
Reviewed-by: Alejandro Piñeiro <[email protected]>
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The value is always >= 0 here.
Found by coverity
Reviewed-by: Samuel Pitoiset <[email protected]>
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We have never opened master_Fd at this point, so remove code to
close it.
Found by coverity.
Reviewed-by: Samuel Pitoiset <[email protected]>
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Coverity pointed out we were copying 168 bytes here unnecessarily.
Reviewed-by: Samuel Pitoiset <[email protected]>
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Not going to matter, but be consistent.
Found by coverity
Reviewed-by: Lionel Landwerlin <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Fixes: caf41c78c (anv/allocator: Support softpin in the BO cache)
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This fixes a bug uncovered by my NIR integer division by constant
optimization series.
Fixes: 19f9cb72c8b "i965/fs: Add pass to propagate conditional..."
Fixes: 627f94b72e0 "i965/vec4: adding vec4_cmod_propagation..."
Reviewed-by: Ian Romanick <[email protected]>
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While I generally trust rediculousfish to have done his homework, we've
made some adjustments to suit the needs of mesa and it'd be good to
test those. Also, there's no better place than unit tests to clearly
document the different edge cases of the different methods.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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There's nothing inherently fixed-width in the code. All that's required
to generalize it is to make everything internally 64-bit and pass
UINT_BITS in as a parameter to util_compute_fast_[us]div_info. With
that, it can now handle 8, 16, 32, and 64-bit integer division by a
constant.
We also add support for division by 1 and by other powers of 2. This is
useful if you want to divide by a uniform value in a shader where you
have the opportunity to adjust the uniform on the CPU before passing it
in.
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Jason Ekstrand <[email protected]>
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Compilers can use this to generate optimal code for integer division
by a constant.
Additionally, an unsigned division by a uniform that is constant but not
known at compile time can still be optimized by passing 2-4 division
factors to the shader as uniforms and executing one of the fast_udiv*
variants. The signed division algorithm doesn't have this capability.
Reviewed-by: Jason Ekstrand <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Reviewed-by: Ian Romanick <[email protected]>
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Currently mesa only supports EGL on Unix like systems, cygwin, and
haiku. Meson should actually enforce this. This fixes the default build
on MacOS.
v2: - invert the condition, mark darwin and windows as not supported
instead of trying to mark what is supported.
v3: - add missing )
v3: - Update comment to reflect condition change in v2
CC: 18.2 <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
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The Nvidia/AMD binary drivers allow this, as does GCC.
This fixes shader compilation issues in the latest update of
No Mans Sky.
Reviewed-by: Ian Romanick <[email protected]>
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No shader-db or CI changes on any Intel platform.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Thomas Helland <[email protected]>
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These allows us to not support fsign.sat in the Intel compiler backend,
and that will simplify some later changes.
No shader-db changes on any Intel platform.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Thomas Helland <[email protected]>
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shader-db results:
All Gen7+ platforms had similar results. (Skylake shown)
total instructions in shared programs: 15106023 -> 15105981 (<.01%)
instructions in affected programs: 300 -> 258 (-14.00%)
helped: 6
HURT: 0
helped stats (abs) min: 7 max: 7 x̄: 7.00 x̃: 7
helped stats (rel) min: 14.00% max: 14.00% x̄: 14.00% x̃: 14.00%
95% mean confidence interval for instructions value: -7.00 -7.00
95% mean confidence interval for instructions %-change: -14.00% -14.00%
Instructions are helped.
total cycles in shared programs: 566050327 -> 566050075 (<.01%)
cycles in affected programs: 2826 -> 2574 (-8.92%)
helped: 6
HURT: 0
helped stats (abs) min: 40 max: 44 x̄: 42.00 x̃: 42
helped stats (rel) min: 8.89% max: 8.94% x̄: 8.92% x̃: 8.92%
95% mean confidence interval for cycles value: -44.30 -39.70
95% mean confidence interval for cycles %-change: -8.95% -8.88%
Cycles are helped.
No changes on Gen6 or earlier.
Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Thomas Helland <[email protected]>
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Signed-off-by: Ian Romanick <[email protected]>
Reviewed-by: Thomas Helland <[email protected]>
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svga_destroy_shader_variant() itself flushes and retries the command
if there's a failure. So no need for the callers to do it. Other
callers of the function were already ignoring the return value.
This also fixes a corner-case double-free reported by Coverity
(and reported by Dave Airlie).
Tested with various OpenGL apps.
Reviewed-by: Charmaine Lee <[email protected]>
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Since there are no other users of the glsl compiler.
Reviewed-by: Eric Engestrom <[email protected]>
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This has always been a requirement, it's just somehow been missed in the
meson build.
Reviewed-by: Eric Engestrom <[email protected]>
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Otherwise building just vulkan (among other things) will build these
tests, pull in a bunch of stuff they shouldn't, and potentially fail to
compile.
Reviewed-by: Eric Engestrom <[email protected]>
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