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* radv: emit correct last export when Z/stencil export is enabledDave Airlie2016-11-091-3/+5
| | | | | | | | | | | | | | | I was getting a random GPU hang in the renderpass simple tests, it turns out sometimes radv emitted the wrong thing "last". This fixes the logic to emit Z/stencil last if they occur, and not mark a color output as last. Also this relies on the Z/STENCIL being the first two fragment outputs, which they are so yay. Fixes: dEQP-VK.renderpass.simple.color_depth (random hangs) Cc: "13.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* tgsi/scan: turn a huge if-else-if.. chain into a switch statementMarek Olšák2016-11-081-14/+30
| | | | | Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi/scan: fix images_buffers regressionMarek Olšák2016-11-081-3/+2
| | | | | | | | | The first IF statement disabled the second one. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98599 Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* anv: Document cmd_buffer_alloc_binding_tableJason Ekstrand2016-11-081-0/+71
| | | | | | | | Some of the details of this function are very confusing and have a long history. We should document that history and this seems like the best place to do it. Signed-off-by: Jason Ekstrand <[email protected]>
* intel/blorp: Emit all the binding tablesJason Ekstrand2016-11-081-0/+5
| | | | | | | | | | | | | At least on Sky Lake, after emitting 3DSTATE_CONSTANT_*, you are required to re-emit the 3DSTATE_BINDING_TABLE_POINTERS packet for the corresponding stage. If you don't, double-buffering may fail and you may get the wrong constants. It turns out that you need to do this even if you have no push constants to speak of or else the next 3DSTATE_CONSTANT packet you emit for that stage may not work correctly. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Cc: "13.0" <[email protected]>
* i965/gen9: Allow sampling with hiz when supportedJordan Justen2016-11-081-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | For gen9+ this will indicate when we should allow hiz based sampling during rendering. Improves performance in : - Synmark's OglDeferred by 2.2% (n=20) - Synmark's OglShMapPcf by 0.44% (n=20) v2 by Ben: Add spec reference, and make it fix with some of the changes made on the previous patches Change the check from mt->aux_buf to mt->num_samples. The presence of an aux_buf isn't enough to determine there isn't a HiZ buffer to use. v3: It seems all depth surface end up with num_samples = 0 by default, so allow sampling from depth HiZ if num_samples <= 1. (Lionel) Allow sampling from HiZ only if all LOD are available from the HiZ buffer. (Lionel) Signed-off-by: Jordan Justen <[email protected]> (v1) Signed-off-by: Ben Widawsky <[email protected]> (v2) Signed-off-by: Lionel Landwerlin <[email protected]> (v3) Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/gen9: Add HiZ auxiliary buffer supportBen Widawsky2016-11-081-6/+14
| | | | | | | | | | | | | | | | | | The original functionality this patch introduces was authored by a patch from Ken (the commit subject was the same). Since I ended up changing so many patches in the code before this one, I had some non-trivial decisions to make, and I didn't feel it was appropriate to keeps Ken's name as author (mostly because he might not like what I've done). Ken's original patch was like 2 LOC :-) In either case, some credit needs to go to Ken, and to Jordan for a few small other changes in that original patch. v2: Back to a smaller diff now that ISL handles most of the actual programming (Lionel) Signed-off-by: Ben Widawsky <[email protected]> (v1) Signed-off-by: Lionel Landwerlin <[email protected]> (v2) Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Add function to indicate when sampling with hiz is supportedJordan Justen2016-11-083-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently it indicates that this is never supported, but soon it will be supported for gen8+^w gen9+ v2 by Ben: - Explicitly disable aux_hiz for gen < 9 (with comment) - squashed in next patch to avoid unused and useless functions i965: Support sampling with hiz during rendering For gen8, we can sample from depth while using the hiz buffer. This allows us to sample depth without resolving from hiz to the depth texture. To do this we must resolve to hiz before drawing so we can use the hiz buffer to sample while rendering. Hopefully the hiz buffer will already be resolved in most cases because it was previously rendered, meaning the hiz resolve is a no-op. Note that this is still controlled by the intel_miptree_sample_with_hiz function, and we will enable hiz sampling for gen8 in a separate patch. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Signed-off-by: Jordan Justen <[email protected]> (v1) Signed-off-by: Ben Widawsky <[email protected]> (v2) Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Create a hiz mcs typeBen Widawsky2016-11-085-41/+49
| | | | | | | | | | | | | | | | | | | | This seems counter to the goal of consolidating hiz, mcs, and later ccs buffers. Unfortunately, hiz on gen6 is a thing the code supports, and this wart will be helpful to achieve that. Overall, I believe it does help unify AUX buffers on gen7+. I updated the size field which I introduced in the previous patch, even though we have no use for it. XXX: As I mentioned in the last patch, the height given to the MCS buffer allocation in intel_miptree_alloc_mcs() looks wrong, but I don't claim to fully understand how the MCS buffer is laid out. v2: rebase on master (Lionel) Signed-off-by: Ben Widawsky <[email protected]> (v1) Signed-off-by: Lionel Landwerlin <[email protected]> (v2) Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Drop the aux mt when not usedBen Widawsky2016-11-084-16/+46
| | | | | | | | | | | | | | | | | This patch will preserve the BO & offset, and not the miptree for the aux_mcs buffer. Eventually it might make sense to pull put the sizing function in miptree creation, but for now this should be sufficient and not too hideous. v2: Save BO's offset too (Lionel) v3: Squash previous patch storing the size of the allocated aux buffer (Lionel) Fix memory leak with mcs_buf->bo (Lionel) Signed-off-by: Ben Widawsky <[email protected]> (v1) Signed-off-by: Lionel Landwerlin <[email protected]> (v2) Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Directly gtt map the mcs bufferBen Widawsky2016-11-081-2/+9
| | | | | | | | | | | | | | | | | | | | | The next patch will change the map type, and this will make sure there are no regressions as a result of the other stuff. Since the miptree is newly created, I believe it is always safe to just map. It is possible to CPU map this buffer on LLC platforms (it additionally requires rounding up to tile size). I did experiment with that patch, and found no performance gains to be had. I've added in error handling while here. Generally GTT mapping is an operation which is highly unlikely to fail, but we may as well handle it when it does. v2: rebase on master (Lionel) v3: print out error if gtt mapping fails (Topi) Signed-off-by: Ben Widawsky <[email protected]> (v1) Signed-off-by: Lionel Landwerlin <[email protected]> (v2) Reviewed-by: Topi Pohjolainen <[email protected]>
* i965: Wrap MCS miptree in intel_miptree_aux_bufferJordan Justen2016-11-084-59/+86
| | | | | | | | | | | | | | | | | | This will allow us to treat HiZ and MCS the same when using as an auxiliary surface buffer. v2: (Ben) Minor rebase conflict resolution. Rename mcs_buf to aux_buf to address upcoming change for hiz specific buffers. That second thing is essentially a squash of: i965/gen8: Use intel_miptree_aux_buffer for auxiliary buffer - which didn't need to be separate in my opinion. v3: rebase on master (Lionel) Signed-off-by: Jordan Justen <[email protected]> (v1) Signed-off-by: Ben Widawsky <[email protected]>a (v2) Signed-off-by: Lionel Landwerlin <[email protected]> (v3) Reviewed-by: Topi Pohjolainen <[email protected]>
* gallivm: fix [IU]MUL_HI regressionNicolai Hähnle2016-11-083-28/+90
| | | | | | | | | | | | | | | | This patch does two things: 1. It separates the host-CPU code generation from the generic code generation. This guards against accidently breaking things for radeonsi in the future. 2. It makes sure we actually use both arguments and don't just compute a square :-p Fixes a regression introduced by commit 29279f44b3172ef3b84d470e70fc7684695ced4b Cc: Roland Scheidegger <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* draw: use vectorized calculations for fetchRoland Scheidegger2016-11-082-159/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of doing all the math with scalars, use vectors. This means the overflow math needs to be done manually, albeit that's only really problematic for the stride/index mul, the rest has been pretty much moved outside the shader loop (albeit the mul could actually be optimized away too), where things are still scalar. Because llvm is complete fail with the zero-extend widening mul, roll our own even... To eliminate control flow in the main shader loop fetch, provide fake buffers (so index 0 is always valid to fetch). Still uses aos fetch though in the end - mostly because some more code would be needed to handle unaligned fetches in that path, and because for most formats it won't make a difference anyway (we generate some truly horrendous code for things like R16G16_something for instance). Instanced fetch however stays roughly the same as before, except that no longer the same element is fetched multiple times (I've seen a reduction of ~3 times in main shader loop size due to apparently llvm not being able to deduce it's really all the same with a couple instanced elements). Also, for elts gathering, use vectorized code as well - provide a fake elt buffer if there's no valid one bound. The generated shaders are smaller and faster to compile (not entirely sure about execution speed, but generally unless there's just single vertices to handle I would expect it to be faster - there's more opportunities for future improvements by using soa fetch). No piglit change. Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: introduce 32x32->64bit lp_build_mul_32_lohi functionRoland Scheidegger2016-11-083-38/+172
| | | | | | | | | | | | This is used by shader umul_hi/imul_hi functions (and soon by draw). It's actually useful separating this out on its own, however the real reason for doing it is because we're using an optimized sse2 version, since the code llvm generates is atrocious (since there's no widening mul in llvm, and it does not recognize the widening mul pattern, so it generates code for real 64x64->64bit mul, which the cpu can't do natively, in contrast to 32x32->64bit mul which it could do). Reviewed-by: Jose Fonseca <[email protected]>
* i965: Add space before parenAnuj Phogat2016-11-071-1/+1
| | | | Signed-off-by: Anuj Phogat <[email protected]>
* i965: Remove unnecessary white spaceAnuj Phogat2016-11-071-1/+1
| | | | Signed-off-by: Anuj Phogat <[email protected]>
* i965: Fix alpha-to-coverage and alpha test enabled checksAnuj Phogat2016-11-074-12/+16
| | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* mesa: Add helper function _mesa_is_alpha_to_coverage_enabled()Anuj Phogat2016-11-072-0/+16
| | | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* mesa: Add helper function _mesa_is_alpha_test_enabled()Anuj Phogat2016-11-072-0/+14
| | | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* mesa: Use separate line for function return typeAnuj Phogat2016-11-071-1/+2
| | | | | | Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
* nvc0: simplify draw parameters upload for vertex shadersSamuel Pitoiset2016-11-071-8/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium/hud: protect against and initialization raceSteven Toth2016-11-074-8/+41
| | | | | | | | | In the event that multiple threads attempt to install a graph concurrently, protect the shared list. Signed-off-by: Steven Toth <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/hud: close a previously opened handleSteven Toth2016-11-073-1/+6
| | | | | | | | We're missing the closedir() to the matching opendir(). Signed-off-by: Steven Toth <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/hud: fix a problem where objects are free'd while in use.Steven Toth2016-11-074-55/+0
| | | | | | | | | | | | | | Instead of trying to maintain a reference counted list of valid HUD objects, and freeing them accordingly, creating race conditions between unanticipated multiple threads, simply accept they're allocated once and never released until the process terminates. They're a shared resource between multiple threads, so accept they're always available for use. Signed-off-by: Steven Toth <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: drop current draw/read buffer when ctx is releasedRob Clark2016-11-071-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a problem seen with gallium drivers vs android wallpaper. Basically, what happens is: EGLSurface tmpSurface = mEgl.eglCreatePbufferSurface(mEglDisplay, mEglConfig, attribs); mEgl.eglMakeCurrent(mEglDisplay, tmpSurface, tmpSurface, mEglContext); int[] maxSize = new int[1]; Rect frame = surfaceHolder.getSurfaceFrame(); glGetIntegerv(GL_MAX_TEXTURE_SIZE, maxSize, 0); mEgl.eglMakeCurrent(mEglDisplay, EGL_NO_SURFACE, EGL_NO_SURFACE, EGL_NO_CONTEXT); mEgl.eglDestroySurface(mEglDisplay, tmpSurface); ... check maxSize vs frame size and bail if needed ... mEglSurface = mEgl.eglCreateWindowSurface(mEglDisplay, mEglConfig, surfaceHolder, null); ... error checking ... mEgl.eglMakeCurrent(mEglDisplay, mEglSurface, mEglSurface, mEglContext); When the window-surface is created, it ends up with the same ptr address as the recently freed tmpSurface pbuffer surface. Which after many levels of indirection, results in st_framebuffer_validate() ending up with the same/old framebuffer object, and in the end never calling the DRIimageLoaderExtension::getBuffers(). Then in droid_swap_buffers(), the dri2_surf is still the old pbuffer surface (with dri2_surf->buffer being NULL, obviously, so when wallpaper app calls eglSwapBuffers() nothing gets enqueued to the compositor). Resulting in a black/blank background layer. Note that at the EGL layer, when the context is unbound, EGL drops it's references to the draw and read buffer as well. Signed-off-by: Rob Clark <[email protected]> Tested-by: Robert Foss <[email protected]> Acked-by: Tapani Pälli <[email protected]>
* clover: Add CL_PROGRAM_BINARY_TYPE support (CL1.2).Serge Martin2016-11-0610-11/+35
| | | | | | | | | | | | v3 [Francisco Jerez]: Loosely based on Serge's v1 of this patch in order to avoid CL-specific enums in the clover module binary format. In addition to other changes made in v2: Represent the CL program binary type as the section type instead of adding a CL API-specific enum, check that the binary types of the input objects are valid during clLinkProgram(), pass section type as argument to build_module_library() instead of using separate function. Reviewed-by: Francisco Jerez <[email protected]>
* clover: add missing clGetDeviceInfo CL1.2 queriesSerge Martin2016-11-063-0/+35
| | | | | | Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Vedran Miletić <[email protected]>
* nvc0: get rid of NVE4_COMPUTE_MP_PM_{A,B}_SIGSEL_XXXSamuel Pitoiset2016-11-051-56/+56
| | | | | | | Instead, hardcode group sigsel because there are a bunch of unknown groups, especially on SM50/SM52. Signed-off-by: Samuel Pitoiset <[email protected]>
* gm107/ir: emit RED instead of ATOM when no dstSamuel Pitoiset2016-11-051-1/+28
| | | | | | | | | | | | | This is similar to NVC0 and GK110 emitters where we emit reduction operations instead of atomic operations when the destination is not used. Found after writing some tests which check if performance counters return the expected value. In that case, gred_count returned 0 on gm107 while at least gk106 returned the correct value. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* st/mesa: initialize members of glsl_to_tgsi_instruction in emit_asm()Brian Paul2016-11-051-0/+4
| | | | | | | | | | | | | | This fixes random crashes with MSVC release builds. It seems the members are implicitly initialized to zero with gcc, but not MSVC. In particular, the tex_offset_num_offset field was non-zero causing a loop over the NULL tex_offsets array to crash. Zero-init those fields and a few others to be safe. The regression began with acc23b04cfd64e "ralloc: remove memset from ralloc_size". Reviewed-by: Marek Olšák <[email protected]>
* android: amd/common: add support for libmesa_amd_commonMauro Rossi2016-11-054-1/+60
| | | | | | | | | | | | | | | Fixes the following building error introduced with commit 7115e56 and related amd/common dependencies: external/mesa/src/gallium/drivers/radeonsi/si_shader.c:6861: error: undefined reference to 'ac_is_sgpr_param' external/mesa/src/gallium/drivers/radeonsi/si_shader.c:6951: error: undefined reference to 'ac_is_sgpr_param' clang++: error: linker command failed with exit code 1 (use -v to see invocation) ninja: build stopped: subcommand failed. build/core/ninja.mk:148: recipe for target 'ninja_wrapper' failed make: *** [ninja_wrapper] Error 1 Signed-off-by: Marek Olšák <[email protected]>
* winsys/radeon: don't call surface_best for FMASKMarek Olšák2016-11-051-1/+1
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98518 Acked-by: Edward O'Callaghan <[email protected]>
* mesa: Add linear ETC2/EAC to the compressed format list with ES3 compat.Kenneth Graunke2016-11-041-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | GL_ARB_ES3_compatibility brings ETC2/EAC formats to desktop GL. The meaning of the GL compressed format list is pretty vague - it's supposed to return formats for "general-purpose usage". (GL 4.2 deprecates the list because of this.) Basically everyone interprets this as "linear RGB/RGBA". ETC2/EAC meets that criteria, so while we shouldn't be required to add it to the list, there's also little harm in doing so, at least on platforms with native support. I doubt anyone is using this list for much anyway, so even on platforms without native support, it's probably not a big deal. Makes the following GL45-CTS.gtf43 tests pass: * GL3Tests.eac_compression_r11.gl_compressed_r11_eac * GL3Tests.eac_compression_rg11.gl_compressed_rg11_eac * GL3Tests.eac_compression_signed_r11.gl_compressed_signed_r11_eac * GL3Tests.eac_compression_signed_rg11.gl_compressed_signed_rg11_eac * GL3Tests.etc2_compression_rgb8.gl_compressed_rgb8_etc2 * GL3Tests.etc2_compression_rgb8_pt_alpha1.gl_compressed_rgb8_pt_alpha1_etc2 * GL3Tests.etc2_compression_rgba8.gl_compressed_rgba8_etc2 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]>
* vc4: Use Newton-Raphson on the 1/W write to fix glmark2 terrain.Eric Anholt2016-11-041-1/+1
| | | | | | | The 1/W was apparently not accurate enough, and we were getting sparklies in the distance. The closed driver also did a N-R step here. Cc: <[email protected]>
* vc4: Make sure that vertex shader texture2D() calls use LOD 0.Eric Anholt2016-11-041-0/+10
| | | | | I noticed this while trying to debug glmark2 terrain (which does vertex shader texturing, but no mipmaps on its textures sampled from the VS).
* radeonsi: fix vertex fetches for 2_10_10_10 formatsNicolai Hähnle2016-11-045-6/+78
| | | | | | | | | | | The hardware always treats the alpha channel as unsigned, so add a shader workaround. This is rare enough that we'll just build a monolithic vertex shader. The SINT case cannot actually happen in OpenGL, but I've included it for completeness since it's just a mix of the other cases. Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: fix the layer of VDPAU surface samplersNicolai Hähnle2016-11-043-17/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A (latent) bug in VDPAU interop was exposed by commit e5cc84dd43be066c1dd418e32f5ad258e31a150a. Before that commit, the st_vdpau code created samplers with first_layer == last_layer == 1 that the general texture handling code would immediately delete and re-create, because the layer does not match the information in the GL texture object. This was correct behavior at least in the DMABUF case, because the imported resource is supposed to have the correct offset already applied. In the non-DMABUF case, this was just plain wrong but apparently nobody noticed. After that commit, the state tracker assumes that an existing sampler is correct at all times. Existing samplers are supposed to be deleted when they may become invalid, and they will be created on-demand. This meant that the sampler with first_layer == last_layer == 1 stuck around, leading to rendering artefacts (on radeonsi), command stream failures (on r600), and assertions (in debug builds everywhere). This patch fixes the problem by simply not creating a sampler at all in st_vdpau_map_surface. We rely on the generic texture code to do the right thing, adding the layer_override to make the non-DMABUF case work. v2: add the layer_override Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98512 Cc: 13.0 <[email protected]> Cc: Christian König <[email protected]> Cc: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (v1) Reviewed-by: Christian König <[email protected]>
* Revert "st/vdpau: use linear layout for output surfaces"Dave Airlie2016-11-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit d180de35320eafa3df3d76f0e82b332656530126. This is a radeon specific hack that causes problems on nouveau when combined with the SHARED flag later. If radeonsi needs a fix for this, please fix it in the driver. [chk] Using linear surfaces for this makes sense because tilling isn't beneficial and the surfaces can potentially be shared with other GPUs using the VDPAU OpenGL interop. [airlied] I think we need a flag that isn't SHARED/LINEAR that is more SHARED_OTHER_GPU. [mareko] Does radeonsi need PIPE_BIND_VIDEO_DECODE_OUTPUT that it would translate into linear ? [mareko] My only concern is decoding performance. If the decoder works in 64x1 blocks, tiling will hurt. That's the theory. I don't know how the decoder works. Cc: 12.0 13.0 <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Dave Airlie <[email protected]> Tested-by: Ilia Mirkin <[email protected]> Tested-by: Nayan Deshmukh <[email protected]> (I+A)
* radeonsi: fix an assertion failure in si_decompress_sampler_color_texturesMarek Olšák2016-11-041-1/+3
| | | | | | | | | This fixes a crash in Deus Ex: Mankind Divided. Release builds were unaffected, so it's not too serious. Cc: 11.2 12.0 13.0 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* glx: make interop ABI visible againMarek Olšák2016-11-041-2/+2
| | | | | | | | | This was broken when the GLAPI use was removed from mesa_glinterop.h. Cc: 12.0 13.0 <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl: make interop ABI visible againMarek Olšák2016-11-041-2/+2
| | | | | | | | | This was broken when the GLAPI use was removed from mesa_glinterop.h. Cc: 12.0 13.0 <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* egl: use util/macros.hMarek Olšák2016-11-042-5/+2
| | | | | | | | | I need the definition of PUBLIC. Cc: 12.0 13.0 <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radeonsi: enable GLSL 4.50Nicolai Hähnle2016-11-041-1/+1
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/glsl_to_tgsi: fix dvec[34] loads from SSBONicolai Hähnle2016-11-041-6/+4
| | | | | | | | | | When splitting up loads, we have to add 16 bytes to the offset for the high components, just like already happens for stores. Fixes arb_gpu_shader_fp64@shader_storage@layout-std140-fp64-shader. Cc: 13.0 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* glsl/cache: correct asprintf error handlingNicolai Hähnle2016-11-041-3/+3
| | | | | | | | | | | From the manpage of asprintf: "If memory allocation wasn't possible, or some other error occurs, these functions will return -1, and the contents of strp are undefined." Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* gallium/radeon: Multiply bpe by nsamples in surf_winsys_to_drmMichel Dänzer2016-11-041-2/+5
| | | | | | | For symmetry with surf_drm_to_winsys. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: Use flags parameter in radeon_winsys_surface_initMichel Dänzer2016-11-041-1/+1
| | | | | | | Fixes valgrind warnings about surf_ws->flags being uninitialized while starting X. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: Only convert stencil info if RADEON_SURF_SBUFFER is setMichel Dänzer2016-11-041-10/+21
| | | | | | | Fixes valgrind warnings about using uninitialized memory when starting X. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: Only loop up to last_level for drm<->winsys conversionMichel Dänzer2016-11-041-2/+2
| | | | | | | | | Fixes spurious assertion failure in surf_level_drm_to_winsys when starting X, due to processing a miplevel which was never initialized. Fixes: e9c76eeeaa67 ("gallium/radeon: remove radeon_surf_level::pitch_bytes") Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
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