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* freedreno/ir3: Track whether shader needs derivativesKristian H. Kristensen2019-03-256-6/+12
| | | | | | | | | | | | | In 1088b788 ("freedreno/ir3: find # of samplers from uniform vars") we started counting number of samplers based on the uniform vars instead of number of cat5 instructions. We used the number of samplers to determine whether to enable derivatives, but when we only use derivatives and no samplers, that now breaks. Track whether we need derivatives explicitly and use that to enable the state. Fixes: 1088b788 ("freedreno/ir3: find # of samplers from uniform vars") Signed-off-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* st/nine: enable csmt per default on irisAndre Heider2019-03-251-3/+5
| | | | | | | | iris is thread safe, enable csmt for a ~5% performace boost. Signed-off-by: Andre Heider <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Axel Davy <[email protected]>
* spirv: Handle the NonUniformEXT decorationJason Ekstrand2019-03-252-0/+28
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* nir: Add access flags to deref and SSBO atomicsJason Ekstrand2019-03-252-28/+34
| | | | | | | We will need them for a new ACCESS_NON_UNIFORM flag that's about to be added in the next commit. Reviewed-by: Lionel Landwerlin <[email protected]>
* nir: Add texture sources and intrinsics for bindlessJason Ekstrand2019-03-254-10/+29
| | | | | | | | | On Intel, we have both bindless and bindful and we'd like to use them at the same time if we can so we need to be able to distinguish at the NIR level between the two. This also fixes nir_lower_tex to properly handle bindless in its tex_texture_size and get_texture_lod helpers. Reviewed-by: Lionel Landwerlin <[email protected]>
* intel/fs: Make alpha test work with MRT and sample maskDanylo Piliaiev2019-03-251-18/+17
| | | | | | | | | | | | | | | | Fix the order of src0_alpha and sample mask in fb payload. From SKL PRM Volume 7, "Data Payload Register Order for Render Target Write Messages": Type S0A oM sZ oS M2 M3 M4 SIMD8 1 1 0 0 s0A oM R SIMD16 1 1 0 0 1/0s0A 3/2s0A oM It also fixes working of alpha to coverage with sample mask on GEN6 since now they are in correct order. Signed-off-by: Danylo Piliaiev <[email protected]> Signed-off-by: Francisco Jerez <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* i965,iris,anv: Make alpha to coverage work with sample maskDanylo Piliaiev2019-03-257-14/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From "Alpha Coverage" section of SKL PRM Volume 7: "If Pixel Shader outputs oMask, AlphaToCoverage is disabled in hardware, regardless of the state setting for this feature." From OpenGL spec 4.6, "15.2 Shader Execution": "The built-in integer array gl_SampleMask can be used to change the sample coverage for a fragment from within the shader." From OpenGL spec 4.6, "17.3.1 Alpha To Coverage": "If SAMPLE_ALPHA_TO_COVERAGE is enabled, a temporary coverage value is generated where each bit is determined by the alpha value at the corresponding sample location. The temporary coverage value is then ANDed with the fragment coverage value to generate a new fragment coverage value." Similar wording could be found in Vulkan spec 1.1.100 "25.6. Multisample Coverage" Thus we need to compute alpha to coverage dithering manually in shader and replace sample mask store with the bitwise-AND of sample mask and alpha to coverage dithering. The following formula is used to compute final sample mask: m = int(16.0 * clamp(src0_alpha, 0.0, 1.0)) dither_mask = 0x1111 * ((0xfea80 >> (m & ~3)) & 0xf) | 0x0808 * (m & 2) | 0x0100 * (m & 1) sample_mask = sample_mask & dither_mask Credits to Francisco Jerez <[email protected]> for creating it. It gives a number of ones proportional to the alpha for 2, 4, 8 or 16 least significant bits of the result. GEN6 hardware does not have issue with simultaneous usage of sample mask and alpha to coverage however due to the wrong sending order of oMask and src0_alpha it is still affected by it. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109743 Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
* nir: Add a lowering pass for non-uniform resource accessJason Ekstrand2019-03-255-0/+286
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir/lower_io: Add a bounds-checked 64-bit global address formatJason Ekstrand2019-03-252-6/+93
| | | | Reviewed-by: Lionel Landwerlin <[email protected]>
* draw/gs: fix point size outputs from geometry shader.Dave Airlie2019-03-261-8/+1
| | | | | | | | | | If the geom shader emits a point size we failed to find it here, use the correct API to look it up. Fixes: tests/spec/glsl-1.50/execution/geometry/point-size-out.shader_test Reviewed-by: Brian Paul <[email protected]>
* draw: bail instead of assert on instance count (v2)Dave Airlie2019-03-261-1/+3
| | | | | | | | | | | | With indirect rendering it's fine to set the instance count parameter to 0, and expect the rendering to be ignored. Fixes assert in KHR-GLES31.core.compute_shader.pipeline-gen-draw-commands on softpipe v2: return earlier before changing fpstate Reviewed-by: Brian Paul <[email protected]>
* vl/dri3: remove the wait before getting back bufferLeo Liu2019-03-251-15/+3
| | | | | | | | | | The wait here is unnecessary since we got a pool of back buffers, and the wait for swap buffer will happen before the present pixmap, at the same time the previous back buffer will be put back to pool for reuse after the check for PresentIdleNotify event Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* compiler/nir: add lowering for 16-bit ldexpIago Toral Quiroga2019-03-251-2/+7
| | | | | | | | | v2 (Topi): - Make bit-size handling order be 16-bit, 32-bit, 64-bit - Clamp lower exponent range at -28 instead of -30. Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* compiler/nir: add lowering for 16-bit flrpIago Toral Quiroga2019-03-253-0/+3
| | | | | | | | | And enable it on Intel. v2: - Squash the change to enable it on Intel (Jason) Reviewed-by: Jason Ekstrand <[email protected]>
* compiler/nir: add lowering option for 16-bit fmodIago Toral Quiroga2019-03-253-0/+3
| | | | | | | | | And enable it on Intel. v2: - Squash the change to enable this lowering on Intel (Jason) Reviewed-by: Jason Ekstrand <[email protected]>
* st/mesa: fix texture deletion context mix-up issues (v2)Brian Paul2019-03-251-12/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | When we destroy a context, we need to temporarily make that context the current one for the thread. That's because during context tear-down we make many calls to _mesa_reference_texobj(&texObj, NULL). Note there's no context parameter. If the texture's refcount goes to zero and we need to delete it, we use the thread's current context. But if that context isn't the context we're tearing down, we get into trouble when deallocating sampler views. See patch 593e36f956 ("st/mesa: implement "zombie" sampler views (v2)") for background information. Also, we need to release any sampler views attached to the fallback textures. Fixes a crash on exit with a glretrace of the Nobel Clinician application. v2: at end of st_destroy_context(), check if save_ctx == ctx and unbind the context if so. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Neha Bhende <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* nir: fix a few signed/unsigned comparison warningsBrian Paul2019-03-251-2/+2
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* android: static link with libexpat with Android O+Kishore Kadiyala2019-03-255-4/+45
| | | | | | | | | | | | | In Android O, MESA needs to statically link libexpat so that it's in same VNDK namespace. v2: apply change also to anv driver (Tapani) v3: use += in anv change (Eric Engestrom) Change-Id: I82b0be5c817c21e734dfdf5bfb6a9aa1d414ab33 Signed-off-by: Kishore Kadiyala <[email protected]> Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* radv: write availability status vkGetQueryPoolResults() when the data is not ↵Samuel Iglesias Gonsálvez2019-03-251-15/+4
| | | | | | | | | | | | | | | | | | | | | available If VK_QUERY_RESULT_WITH_AVAILABILY_BIT is set and VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not set, we need return to VK_NOT_READY only and set the availability status field for each query. From Vulkan spec: "If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not set then no result values are written to pData for queries that are in the unavailable state at the time of the call, and vkGetQueryPoolResults returns VK_NOT_READY. However, availability state is still written to pData for those queries if VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set." Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: don't overwrite results in VkGetQueryPoolResults() when queries are ↵Samuel Iglesias Gonsálvez2019-03-251-16/+32
| | | | | | | | | | | | | | | | | | | | | | | not available If the query is not available and VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not set, the spec doesn't allow to modify its result. From Vulkan spec: "If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not set then no result values are written to pData for queries that are in the unavailable state at the time of the call, and vkGetQueryPoolResults returns VK_NOT_READY. However, availability state is still written to pData for those queries if VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set." v2: - Move VK_NOT_READY change to next patch (Samuel Pitoiset) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* st/mesa: fix warnings about implicit conversion on enumeration typeTapani Pälli2019-03-252-2/+2
| | | | | | | | These enums match but compiler warns about implicit conversion. Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* st/mesa: fix compilation warning on storage_flags_to_buffer_flagsTapani Pälli2019-03-251-1/+1
| | | | | | | | (warning: 'const' type qualifier on return type has no effect) Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* nir/split_vars: fixup some more explicit_stride related issues.Dave Airlie2019-03-251-2/+1
| | | | | | | | | | | | | | | | With vkpipelinedb Samuel discovered a regression since we stopped stripping types at the spir-v level. This adds a check to the var splitting for the case where it asserts the type hasn't changed, when it has just created a bare type, and it's different than the original type which has an explicit stride. This also removes a pointless assert that also triggers. Fixes: 3b3653c4cf (nir/spirv: don't use bare types, remove assert in split vars for testing) Acked-by: Jason Ekstrand <[email protected]>
* spirv: Use interface type for block and buffer blockCaio Marcelo de Oliveira Filho2019-03-232-4/+36
| | | | | | | | Also handle GLSL_TYPE_INTERFACE the same way we do GLSL_TYPE_STRUCT in various places. Motivated by ARB_gl_spirv work, that will take advantage of the interface types when handling NIR coming from SPIR-V. Reviewed-by: Jason Ekstrand <[email protected]>
* intel/compiler: handle GLSL_TYPE_INTERFACE as GLSL_TYPE_STRUCTCaio Marcelo de Oliveira Filho2019-03-233-3/+3
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Add an execution environment to the optionsCaio Marcelo de Oliveira Filho2019-03-232-0/+9
| | | | | | | | | | Also updates gl_spirv to pick the right one. At the moment nothing uses it, but upcoming functionality part of ARB_gl_spirv will use it, and we also later can be more assertful when handling certain features for each of the execution environments. Reviewed-by: Alejandro Piñeiro <[email protected]> Acked-by: Karol Herbst <[email protected]>
* egl: Add a 565 pbuffer-only EGL config under X11.Eric Anholt2019-03-221-0/+47
| | | | | | | | | | | | | | The CTS requires a 565-no-depth-no-stencil (meaning d/s not-required, not not-present) config for ES 3.0, but at depth 24 of X11 we wouldn't do so. We can satisfy that bad requirement using a pbuffer-only visual with whatever other buffers the driver happens to have given us. I've tried to raise this as an absurd requirement with Khronos and made no progress. v2: Make sure it's single sample, no depth, no stencil. Comment typo fix Reviewed-by: Adam Jackson <[email protected]>
* nir: Handle array-deref-of-vector case in loop analysisCaio Marcelo de Oliveira Filho2019-03-221-3/+6
| | | | | | | SPIR-V can produce those for SSBO and UBO access. Found when testing the ARB_gl_spirv series. Reviewed-by: Timothy Arceri <[email protected]>
* docs: update freedreno statusRob Clark2019-03-221-17/+17
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: add ESSL capRob Clark2019-03-221-0/+7
| | | | | | | | | Report 320 for a6xx, which isn't *quite* true (no geom/tess, in particular), but other caps keep the reported GL and GLSL versions correct (3.1 / 3.10 es). But reporting 320 will switch on EXT_gpu_shader5, which is the goal. Signed-off-by: Rob Clark <[email protected]>
* mesa/st: use ESSL cap top enable gpu_shader5Rob Clark2019-03-221-3/+14
| | | | | | | | | | | | | For GLES2+ contexts, enable EXT_gpu_shader5 if the driver exposes a sufficiently high ESSL feature level, even if the GLSL feature level isn't high enough. This allows drivers to support EXT_gpu_shader5 in GLES contexts before they support all the additional features of ARB_gpu_shader5 in GL contexts. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gallium: add PIPE_CAP_ESSL_FEATURE_LEVELRob Clark2019-03-223-0/+14
| | | | | | | | | | | | | Adds a new cap to allow drivers to expose higher shading language versions in GLES contexts, to avoid having to report an artificially low version for the benefit of GL contexts. The motivation is to expose EXT_gpu_shader5 even though a driver may not support all the features needed for the corresponding GL extension (ARB_gpu_shader5). Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* swr: Fix build with llvm-9.0.Vinson Lee2019-03-222-0/+24
| | | | | | | | | | | | | | | | | Fix build error after llvm-9.0svn r352827 ("[opaque pointer types] Add a FunctionCallee wrapper type, and use it."). In file included from ./rasterizer/jitter/builder.h:158:0, from swr_shader.cpp:35: ./rasterizer/jitter/gen_builder_meta.hpp: In member function ‘llvm::Value* SwrJit::Builder::VGATHERPD(llvm::Value*, llvm::Value*, llvm::Value*, llvm::Value*, llvm::Value*, const llvm: :Twine&)’: ./rasterizer/jitter/gen_builder_meta.hpp:51:117: error: no matching function for call to ‘cast(llvm::FunctionCallee)’ Function* pFunc = cast<Function>(JM()->mpCurrentModule->getOrInsertFunction("meta.intrinsic.VGATHERPD", pFuncTy)); ^ Suggested-by: Philip Meulengracht <[email protected]> Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Alok Hota <[email protected]>
* bin/install_megadrivers.py: Fix regression for set DESTDIRDylan Baker2019-03-221-1/+5
| | | | | | | | | | | | The previous patch tried to address a bug when DESTDIR is '', however, it introduces a bug when DESTDIR is not '', and fakeroot is used. This patch does fix that, and has been tested with the arch pkg-build to ensure it isn't regressed. Fixes: 093a1ade4e24b7dd701a093d30a71efd669fe9c8 ("bin/install_megadrivers.py: Correctly handle DESTDIR=''") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110221 Reviewed-by: Eric Engestrom <[email protected]>
* spirv,nir: lower frexp_exp/frexp_sig inside a new NIR passSamuel Pitoiset2019-03-229-133/+221
| | | | | | | | | | This lowering isn't needed for RADV because AMDGCN has two instructions. It will be disabled for RADV in an upcoming series. While we are at it, factorize a little bit. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: use generic float types for frexp_exp and frexp_sigSamuel Pitoiset2019-03-221-2/+2
| | | | | | | Only the exponent needs to be 32-bit signed integer. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Fix anonymous union initialization with older GCC.Vinson Lee2019-03-221-4/+6
| | | | | | | | | | | | | | | | | | | | Fix this build error with GCC 4.4.7. CC nir/nir_opt_copy_prop_vars.lo nir/nir_opt_copy_prop_vars.c: In function ‘load_element_from_ssa_entry_value’: nir/nir_opt_copy_prop_vars.c:454: error: unknown field ‘ssa’ specified in initializer nir/nir_opt_copy_prop_vars.c:455: error: unknown field ‘def’ specified in initializer nir/nir_opt_copy_prop_vars.c:456: error: unknown field ‘component’ specified in initializer nir/nir_opt_copy_prop_vars.c:456: error: extra brace group at end of initializer nir/nir_opt_copy_prop_vars.c:456: error: (near initialization for ‘(anonymous).<anonymous>’) nir/nir_opt_copy_prop_vars.c:456: warning: excess elements in union initializer nir/nir_opt_copy_prop_vars.c:456: warning: (near initialization for ‘(anonymous).<anonymous>’) Fixes: 96c32d77763c ("nir/copy_prop_vars: handle load/store of vector elements") Signed-off-by: Vinson Lee <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109810 Reviewed-by: Andres Gomez <[email protected]> Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* iris: Push heavy memchecker code to DEBUGChris Wilson2019-03-222-1/+13
| | | | | | | | | | | | | | | | Invoking VALGRIND_CHECK_MEM_IS_DEFINED pulls in enough code to convince gcc to not inline __gen_uint and results in a lot of packing code ending up out-of-line with lots of stack copying. To ameliorate this, only insert the check inside the packer if DEBUG is defined and instead perform the validation checking before submitting the batch to the kernel. This should give accurate results if --trace-origins=yes is used, and failing that we can recompile in full debug mode to check on insertion. Improve drawoverhead baseline by 25% with a default build with valgrind-dev installed (with effectively no loss of vg coverage). Reviewed-by: Kenneth Graunke <[email protected]>
* iris: Fix batch chaining map_next increment.Kenneth Graunke2019-03-221-1/+1
| | | | Caught by Chris Wilson; split out from his valgrind patch.
* freedreno/ir3: disable early-z for SSBO/image writesRob Clark2019-03-221-0/+12
| | | | | | | | | | | Fixes: dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_depth dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_stencil dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_depth_fbo dEQP-GLES31.functional.image_load_store.early_fragment_tests.no_early_fragment_tests_stencil_fbo Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: rename has_kill to no_earlyzRob Clark2019-03-229-10/+10
| | | | | | | There are other cases where we need to disable early-z, like image writes. So rename to something more generic. Signed-off-by: Rob Clark <[email protected]>
* ac/nir: implement 16-bit pack/unpack opcodesRhys Perry2019-03-221-0/+24
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* vulkan/overlay: improve error reportingLionel Landwerlin2019-03-221-125/+89
| | | | | | | | We can show the actual command & line where the failure happened Signed-off-by: Lionel Landwerlin <[email protected]> Suggested-by: Tapani Pälli <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* vulkan/overlay: check return value of swapchain get imagesLionel Landwerlin2019-03-221-8/+11
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* vulkan/overlay: silence validation layer warningsLionel Landwerlin2019-03-221-5/+5
| | | | | | | v2: Drop call to FreeDescriptorSet Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* vulkan/overlay: properly register layer object with loaderLionel Landwerlin2019-03-221-9/+24
| | | | | | | | This is required by the validation layers if we want to validate the commands inserted by the overlay layer. Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* radv: Fix driverUUIDJózef Kucia2019-03-221-1/+1
| | | | | | Fixes: 14cad8786a8 ("radv: generate the same driver UUID as radeonsi") Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* glsl: Cross validate variable's invariance by explicit invariance onlyDanylo Piliaiev2019-03-217-9/+30
| | | | | | | | | | | | | | | | | | 'invariant' qualifier is propagated on variables which are used to calculate other invariant variables, however when we are matching variable's declarations we should take into account only explicitly declared invariance because invariance propagation is an implementation specific detail. Thus new flag is added to ir_variable_data which indicates 'invariant' qualifier being explicitly set in the shader. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100316 Fixes: 89b60492 ('glsl: Add a pass to propagate the "invariant" and "precise" qualifiers') Signed-off-by: Danylo Piliaiev <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* mesa: Fix GL_NUM_DEVICE_UUIDS_EXTJózef Kucia2019-03-221-0/+3
| | | | | Cc: [email protected] Reviewed-by: Tapani Pälli <[email protected]>
* iris: Skip resolves and flushes altogether if unnecessaryKenneth Graunke2019-03-213-9/+27
| | | | Improves drawoverhead baseline scores by 1.17x.
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