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* anv: Stop linking against libmesa.la and libdri_test_stubs.laJason Ekstrand2016-05-262-4/+3
* i965: Don't link libmesa or libdri_test_stubs into testsJason Ekstrand2016-05-261-3/+3
* i965: Move compiler debug functions to intel_screen.cJason Ekstrand2016-05-262-42/+42
* i965/test: Remove the fragment/vertex_program field from test visitorsJason Ekstrand2016-05-265-23/+0
* i965: Move brw_new_shader to brw_link.cppJason Ekstrand2016-05-262-17/+17
* i965: Move brw_nir_lower_uniforms.cpp to i965_FILESJason Ekstrand2016-05-261-1/+1
* i965: Move brw_create_nir to brw_program.cJason Ekstrand2016-05-264-76/+74
* i965/nir: Move the type_size_*_bytes functions to brw_nir.hJason Ekstrand2016-05-262-12/+13
* ptn: Include nir.hJason Ekstrand2016-05-261-0/+3
* compiler: Move glsl_to_nir to libglsl.laJason Ekstrand2016-05-2610-16/+17
* i965/sklgt4: Implement depth/timestamp write w/aBen Widawsky2016-05-261-4/+12
* i965/bxt: Add 2x6 variantBen Widawsky2016-05-262-0/+24
* radeonsi: Allow TES distribution between shader engines.Bas Nieuwenhuizen2016-05-264-15/+40
* radeonsi: Process multiple patches per threadgroup.Bas Nieuwenhuizen2016-05-261-15/+35
* radeonsi: Add barrier before writing the tess factors.Bas Nieuwenhuizen2016-05-261-0/+6
* radeonsi: Enable dynamic HS.Bas Nieuwenhuizen2016-05-262-5/+16
* radeonsi: Remove LDS layout user SGPR's from TES.Bas Nieuwenhuizen2016-05-263-13/+10
* radeonsi: Use buffer loads and stores for passing data from TCS to TES.Bas Nieuwenhuizen2016-05-261-16/+50
* radeonsi: Store inputs to memory when not using a TCS.Bas Nieuwenhuizen2016-05-263-0/+49
* radeonsi: Add offchip buffer address calculation.Bas Nieuwenhuizen2016-05-261-0/+124
* radeonsi: Add user SGPR for the layout of the offchip buffer.Bas Nieuwenhuizen2016-05-263-4/+20
* radeonsi: Use correct parameter index for LS_OUT_LAYOUT.Bas Nieuwenhuizen2016-05-261-3/+4
* radeonsi: Add buffer load functions.Bas Nieuwenhuizen2016-05-261-0/+114
* radeonsi: Define build_tbuffer_store_dwords earlier to support new users.Bas Nieuwenhuizen2016-05-261-69/+69
* radeonsi: Add offchip tessellation parameters.Bas Nieuwenhuizen2016-05-263-6/+34
* radeonsi: Add buffer for offchip storage between TCS and TES.Bas Nieuwenhuizen2016-05-264-0/+23
* tgsi: fix coverity out-of-bounds warningRob Clark2016-05-261-0/+3
* tgsi: fix out of bounds accessRob Clark2016-05-261-1/+1
* i965: Don't use fast copy blit in case of logical operations other than GL_COPYAnuj Phogat2016-05-261-2/+7
* i965/gen9: Remove the halign/valign field setup code in fast copy blitAnuj Phogat2016-05-261-65/+0
* nvc0: allow to monitor MP perf counters with compute shadersSamuel Pitoiset2016-05-262-19/+55
* mesa: Move robustness code to main/robustness.cKristian Høgsberg Kristensen2016-05-263-136/+166
* docs: Mark GL_KHR_robustness done for GLES3.2 as wellKristian Høgsberg Kristensen2016-05-261-1/+1
* egl: Additional attribute validation for eglCreatePbufferSurfacePlamena Manolova2016-05-261-0/+13
* gallium/radeon: add the kernel version into the renderer stringMarek Olšák2016-05-261-3/+9
* winsys/amdgpu: add back multithreaded command submissionMarek Olšák2016-05-266-131/+341
* gallium/tgsi: use _mesa_roundevenf in micro_rndLars Hamre2016-05-261-4/+5
* .mailmap: use Jakob Bornecrantz's personal emailEmil Velikov2016-05-261-6/+5
* nvc0: add note about where the viewport mask would goIlia Mirkin2016-05-261-0/+1
* nvc0: enable 32 textures on kepler+Ilia Mirkin2016-05-262-3/+3
* glsl: add unit tests data vertex/expected outcome for uninitialized warningAlejandro Piñeiro2016-05-2662-0/+573
* glsl: add warning-testAlejandro Piñeiro2016-05-262-1/+33
* glsl: add just-log option for the standalone compiler.Alejandro Piñeiro2016-05-263-4/+18
* glsl: do not raise uninitialized warning with out function parametersAlejandro Piñeiro2016-05-261-0/+28
* glsl: add a empty set_is_lhs on ast_nodeAlejandro Piñeiro2016-05-262-0/+7
* glsl: handle implicit sized arrays in ssboDave Airlie2016-05-266-89/+66
* glsl: fix error message on uniform block mismatchDave Airlie2016-05-261-1/+1
* glsl/ast: assign explicit_xfb_buffer from correct placeDave Airlie2016-05-261-1/+1
* swr: [rasterizer] Correctly select optimized primitive assembly.Bruce Cherniak2016-05-257-9/+17
* docs: Mention i965/gen8+ supports GL 4.2 in release notes.Kenneth Graunke2016-05-251-1/+1
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