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* radeonsi: rename r600_texture::resource to bufferMarek Olšák2018-04-2710-201/+201
| | | | | | r600_resource could be renamed to si_buffer. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use r600_resource() typecast helperMarek Olšák2018-04-2719-78/+80
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove unused atom parameter from si_atom::emitMarek Olšák2018-04-2710-36/+26
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: inline 2 trivial state structuresMarek Olšák2018-04-275-19/+11
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove function si_init_atomMarek Olšák2018-04-274-27/+14
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove si_atom::idMarek Olšák2018-04-274-28/+15
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: don't use an indirect table for state atomsMarek Olšák2018-04-2714-172/+148
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename r600_atom -> si_atomMarek Olšák2018-04-2710-76/+76
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove r600_pipe_common.hMarek Olšák2018-04-2714-347/+302
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi/gfx9: workaround for INTERP with indirect indexingMarek Olšák2018-04-271-6/+13
| | | | | | | and clean up the conditions. Reviewed-by: Nicolai Hähnle <[email protected]> Cc: 18.0 18.1 <[email protected]>
* radeonsi: rewrite DCC format compatibility checking codeMarek Olšák2018-04-271-56/+42
| | | | | | It might be better to use a slow compressed clear when clearing to 1. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: implement DCC fast clear swizzle constraints more accuratelyMarek Olšák2018-04-273-35/+65
| | | | | | | | | | Reduce swizzle constraints to the ALPHA_IS_ON_MSB constraint and the clear value of 1. This significantly changes the DCC fast clear code, and fixes fast clear for RGB formats without alpha. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename variables and document stuff around DCC fast clearMarek Olšák2018-04-271-41/+42
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fully enable 2x DCC MSAA for array and non-array texturesMarek Olšák2018-04-274-14/+20
| | | | | | | The clear code is exactly the same as for 1 sample buffers - just clear the whole thing. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: enable fast color clear for level 0 of mipmapped textures on <= VIMarek Olšák2018-04-272-9/+24
| | | | | | | GFX9 is more complicated and needs a compute shader that we should just copy from amdvlk. Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/surface: handle DCC subresource fast clear restriction on VIMarek Olšák2018-04-271-1/+20
| | | | | | | v2: require the previous level to be clearable for determining whether the last unaligned level is clearable Reviewed-by: Nicolai Hähnle <[email protected]>
* swr/rast: No need to export GetSimdValidIndicesGfxGeorge Kyriazis2018-04-271-4/+0
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Small editorial changesGeorge Kyriazis2018-04-273-19/+17
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Use new processor detection mechanismGeorge Kyriazis2018-04-272-1/+51
| | | | | | | | Use specific avx512 selection mechanism based on avx512er bit instead of getHostCPUName(). LLVM 6.0.0 has a bug that reports wrong string for KNL (fixed in 6.0.1). Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Output rasterizer dir to console since it's process specificGeorge Kyriazis2018-04-271-1/+4
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add TranslateGfxAddress for shaderGeorge Kyriazis2018-04-273-3/+19
| | | | | | Also add GFX_MEM_CLIENT_SHADER Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: jit PRINT improvements.George Kyriazis2018-04-271-2/+13
| | | | | | | | Sign-extend integer types to 32bit when specifying "%d" and add new %u which zero-extends to 32bit. Improves printing of sub 32bit integer types (i1 specifically). Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix regressions.George Kyriazis2018-04-271-1/+1
| | | | | | Bump jit cache revision number to force recompile. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Cleanup old cruft.George Kyriazis2018-04-271-17/+3
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Package events.proto with core outputGeorge Kyriazis2018-04-272-2/+32
| | | | | | | | However only if the file exists in DEBUG_OUTPUT_DIR. The expectation is that AR rasterizerLauncher will start placing it there when launching a workload (which is in a subsequent checkin) Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix init in EventHandlerWorkerStatsGeorge Kyriazis2018-04-271-1/+4
| | | | | | Make sure we initialize variables. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix return type of VCVTPS2PH.George Kyriazis2018-04-271-1/+1
| | | | | | expecting <8xi16> return. Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: WIP Translation handlingGeorge Kyriazis2018-04-272-18/+26
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Use different handing for stream masksGeorge Kyriazis2018-04-275-6/+11
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Silence warningsGeorge Kyriazis2018-04-273-4/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add support for TexelMask evaluationGeorge Kyriazis2018-04-272-0/+44
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Internal core changeGeorge Kyriazis2018-04-271-0/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix x86 lowering 64-bit float handlingGeorge Kyriazis2018-04-272-6/+56
| | | | | | | | | - 64-bit cvt-to-float needs to be explicitly handled - gathers need the right parameter types to work with doubles Fixes draw-vertices piglit tests Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Add some SIMD_T utility functorsGeorge Kyriazis2018-04-271-0/+66
| | | | | | VecEqual and VecHash Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix wrong type allocationGeorge Kyriazis2018-04-271-1/+1
| | | | | | ALLOCA pointer elements, not pointers. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: touch generated files to update timestampGeorge Kyriazis2018-04-271-0/+11
| | | | | | previous change in generators necessitates this change Reviewed-by: Bruce Cherniak <[email protected]>
* swr/rast: Fix byte offset for non-indexed drawsGeorge Kyriazis2018-04-271-3/+3
| | | | | | for the case when USE_SIMD16_SHADERS == FALSE Reviewed-by: Bruce Cherniak <[email protected]>
* util/u_queue: fix a deadlock in util_queue_finishMarek Olšák2018-04-272-0/+10
| | | | | Cc: 18.0 18.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* meson: fix race condition revealed by using 0.44Dylan Baker2018-04-271-3/+3
| | | | | | | | | | | | | | | | | | Previously there was a special target that blocked for the generation of anv_entrypoints.h, with meson 0.44 we don't need this, we can use a new language feature instead. The problem is that previously that blocking target would hide a race condition for the generation of another header, anv_extensions.h. Now the build sometimes fails when anv_extensions.h is not generated in time. v2: - clarify the race condition in the commit message (Emil) CC: Mark Janes <[email protected]> Fixes: 92550d9b16d2b295bdac087f31b1fd6d0f808e02 ("meson: remove workaround for custom target creating .h and .c files") Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Scott D Phillips <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* bin: force git show to use default pretty settingDylan Baker2018-04-271-2/+2
| | | | | | | | | | | I have pretty default to short, which breaks this script. v2: - Fix both places that don't define a --pretty (Emil) cc: Juan A. Suarez <[email protected]> Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Andres Gomez <[email protected]> (v1) Reviewed-by: Emil Velikov <[email protected]>
* mesa: add TBO support for GL_EXT_texture_norm16Tapani Pälli2018-04-271-3/+3
| | | | | | | | Earlier plumbing missed interaction with texture buffer objects. Fixes: 7f467d4f73 "mesa: GL_EXT_texture_norm16 extension plumbing" Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* ac: fix texture query LOD for 1D textures on GFX9Samuel Pitoiset2018-04-271-0/+8
| | | | | | | | | | | 1D textures are allocated as 2D which means we only need one coordinate for texture query LOD. Fixes: 625dcbbc456 ("amd/common: pass address components individually to ac_build_image_intrinsic") Cc: 18.1 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* etnaviv: remove not needed includesChristian Gmeiner2018-04-271-3/+0
| | | | | Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Philipp Zabel <[email protected]>
* etnaviv: remove redundant includeChristian Gmeiner2018-04-271-2/+0
| | | | | Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Philipp Zabel <[email protected]>
* glsl: replace some asserts with unreachable when processing the astTimothy Arceri2018-04-271-6/+3
| | | | Reviewed-by: Matt Turner <[email protected]>
* mesa: drop the buffer mode param from the DrawBuffer driver functionTimothy Arceri2018-04-278-11/+10
| | | | | | No drivers used it. Reviewed-by: Brian Paul <[email protected]>
* anv/icl: Enable Vulkan on Ice LakeAnuj Phogat2018-04-261-0/+2
| | | | | | | | This patch enables the Vulkan driver on Ice Lake h/w with added warning about preliminary support. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* anv: enable VK_EXT_shader_viewport_index_layerCaio Marcelo de Oliveira Filho2018-04-262-0/+2
| | | | | Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/allocator: Don't shrink either end of the block poolJason Ekstrand2018-04-261-4/+4
| | | | | | | | | | | | | Previously, we only tried to ensure that we didn't shrink either end below what was already handed out. However, due to the way we handle relocations with block pools, we can't shrink the back end at all. It's probably best to not shrink in either direction. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105374 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106147 Tested-by: Eero Tamminen <[email protected]> Reviewed-by: Scott D Phillips <[email protected]> Cc: [email protected]
* broadcom/vc5: Add support for centroid varyings.Eric Anholt2018-04-267-4/+97
| | | | | | | | | It would be nice to share the flags packet emit logic with flat shade flags, but I couldn't come up with a good way while still using our pack macros. We need to refactor this to shader record setup at compile time, anyway. Fixes ext_framebuffer_multisample-interpolation * centroid-*
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