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* glsl: fix cross validation for explicit locations on structs and arraysTimothy Arceri2016-04-221-13/+30
| | | | | | Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* radeonsi: implement TGSI_SEMANTIC_HELPER_INVOCATIONNicolai Hähnle2016-04-212-1/+12
| | | | | | Depends on LLVM support introduced in r267102. Reviewed-by: Marek Olšák <[email protected]>
* swr: ignore generated files in rasterizerIlia Mirkin2016-04-221-0/+7
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* nvc0: fix retrieving query results into buffer for timestampsIlia Mirkin2016-04-221-5/+15
| | | | | | | | | The timestamps are stored in a funny place, and even though they are a 64-bit result, are not stored with is64bit. Account for that when retrieving the query result into a resource. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.2" <[email protected]>
* i965/surface_state: Use libisl functions for image format loweringJason Ekstrand2016-04-213-120/+12
| | | | | | | This lets us delete some redundant code and keep all of the image_load_store format lowering logic in one place: libisl. Reviewed-by: Chad Versace <[email protected]>
* i965/fs_surface_builder: Use isl instead of mesa for format infoJason Ekstrand2016-04-211-66/+52
| | | | Reviewed-by: Chad Versace <[email protected]>
* i965/fs_surface_builder: Add a helper for converting GL to ISL formatsJason Ekstrand2016-04-211-0/+55
| | | | Reviewed-by: Chad Versace <[email protected]>
* i965/fs_surface_builder: Explicitly handle FORMAT_NONE in num_image_coordinatesJason Ekstrand2016-04-211-0/+1
| | | | | | | | | Previously, we were relying on has_matching_typed_format returning true for MESA_FORMAT_NONE which, in turn, relied on _mesa_get_format_bytes returning 1 for MESA_FORMAT_NONE. When we switch to ISL, this behaviour will no longer be something we can rely on. Reviewed-by: Chad Versace <[email protected]>
* i965/fs_surface_builder: Take a GL format enum instead of mesa_formatJason Ekstrand2016-04-213-9/+10
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl/format: Add a get_num_channels helperJason Ekstrand2016-04-212-0/+17
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl/format: Add more isl_format_has_type_channel functionsJason Ekstrand2016-04-212-4/+43
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl/format: Break the guts of has_[us]int_channel into a helperJason Ekstrand2016-04-211-18/+16
| | | | Reviewed-by: Chad Versace <[email protected]>
* anv/image: Use the has_matching_typed_storage_image_format helper from islJason Ekstrand2016-04-211-12/+3
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Add a helper for determining when a typed load/store can be usedJason Ekstrand2016-04-212-0/+20
| | | | Reviewed-by: Chad Versace <[email protected]>
* isl: Take a devinfo in lower_storage_image_format instead of an isl_deviceJason Ekstrand2016-04-214-18/+19
| | | | | | | We want to call this function from the shader compiler and having a full isl_device available at that point isn't practical. Reviewed-by: Chad Versace <[email protected]>
* isl: Don't use designated initializers in the headerJason Ekstrand2016-04-211-13/+24
| | | | | | | C++ doesn't support designated initializers and g++ in particular doesn't handle them when the struct gets complicated, i.e. has a union. Reviewed-by: Chad Versace <[email protected]>
* isl: Include c99_compat.hJason Ekstrand2016-04-211-0/+1
| | | | | | We need the restrict keyword in isl.h Reviewed-by: Chad Versace <[email protected]>
* i965: Add a dependency on libislJason Ekstrand2016-04-214-10/+17
| | | | | | | To avoid build issues, ensure that you're running `make' at the top level and/or you've executed `make clean' beforehand. Reviewed-by: Chad Versace <[email protected]>
* radeon: handle query buffer allocation and mapping failuresNicolai Hähnle2016-04-212-9/+33
| | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94984 Reviewed-by: Marek Olšák <[email protected]>
* radeon: wire end_query return value to sw/hw_endNicolai Hähnle2016-04-212-7/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: check return value of begin/end_queryNicolai Hähnle2016-04-211-22/+33
| | | | | | | | | They can only indicate out of memory conditions, since the other error conditions are caught earlier. v2: fix error message in EndQuery Reviewed-by: Samuel Pitoiset <[email protected]>
* gallium: add bool return to pipe_context::end_queryNicolai Hähnle2016-04-2119-26/+49
| | | | | | | | | Even when begin_query succeeds, there can still be failures in query handling. For example for radeon, additional buffers may have to be allocated when queries span multiple command buffers. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Always use Y-tiled buffers on SKL+Ben Widawsky2016-04-214-8/+30
| | | | | | | | | | | | | | | | Starting with Skylake, the display engine is capable of scanning out from Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency. This also has the added benefit of being able to fast clear the winsys buffer. Note that the buffer allocation done for mipmaps will already never allocate an X-tiled buffer for GEN9. This has an almost universal positive impact on benchmarks, some improving by as much as 20%. Signed-off-by: Ben Widawsky <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* softpipe: fix a warning due to an incorrect enum comparisonMarek Olšák2016-04-221-1/+1
| | | | | | no change in behavior, because both are defined the same Acked-by: Jose Fonseca <[email protected]>
* gallium: remove helpers converting to/from TGSI_PROCESSOR_*Marek Olšák2016-04-224-37/+3
| | | | Acked-by: Jose Fonseca <[email protected]>
* gallium: use PIPE_SHADER_* everywhere, remove TGSI_PROCESSOR_*Marek Olšák2016-04-2248-369/+360
| | | | Acked-by: Jose Fonseca <[email protected]>
* gallium: merge PIPE_SWIZZLE_* and UTIL_FORMAT_SWIZZLE_*Marek Olšák2016-04-2263-499/+489
| | | | | | | | Use PIPE_SWIZZLE_* everywhere. Use X/Y/Z/W/0/1 instead of RED, GREEN, BLUE, ALPHA, ZERO, ONE. The new enum is called pipe_swizzle. Acked-by: Jose Fonseca <[email protected]>
* gallium: use enums in p_shader_tokens.h (v2)Marek Olšák2016-04-221-139/+164
| | | | | | | | Reviewed-by: Edward O'Callaghan <[email protected]> (v1) Reviewed-by: Roland Scheidegger <[email protected]> (v1) Acked-by: Jose Fonseca <[email protected]> (v1) v2: name enums
* gallium: use enums in p_defines.h (v2)Marek Olšák2016-04-221-173/+205
| | | | | | | | | | and remove number assignments which are consecutive Reviewed-by: Edward O'Callaghan <[email protected]> (v1) Reviewed-by: Roland Scheidegger <[email protected]> (v1) Acked-by: Jose Fonseca <[email protected]> (v1) v2: name enums
* radeonsi: remove the shader parameter from si_set_ring_bufferMarek Olšák2016-04-223-15/+11
| | | | | | | | not used anymore this is a follow-up to the RW buffer cleanup. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: decrease GS copy shader user SGPRs to 2Marek Olšák2016-04-222-3/+3
| | | | | | | | const buffers are no longer used since the clip plane const buffer was moved to RW buffers Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: shorten slot masks to 32 bitsMarek Olšák2016-04-224-63/+61
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: clean up shader resource limit definitionsMarek Olšák2016-04-223-23/+12
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move default tess level constant buffer to RW buffersMarek Olšák2016-04-225-10/+35
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move sample positions constant buffer to RW buffersMarek Olšák2016-04-223-4/+5
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move clip plane constant buffer to RW buffersMarek Olšák2016-04-224-14/+12
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rework polygon stippling to use constant buffer instead of textureMarek Olšák2016-04-226-101/+55
| | | | | | | | | add it to the RW_BUFFERS descriptor array now the slot masks don't have to have 64 bits Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: generalize si_set_constant_bufferMarek Olšák2016-04-221-10/+17
| | | | | | | this will be used in the next commit Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: make RW buffer descriptor array global, not per shader stageMarek Olšák2016-04-222-51/+43
| | | | | | | v2: also simplify invalidation of RW buffer bindings (squashed) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename and rearrange RW buffer slotsMarek Olšák2016-04-224-30/+39
| | | | | | | | | - use an enum - use a unique slot number regardless of the shader stage (the per-stage slots will go away for RW buffers) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* gallivm: fix bogus argument order to lp_build_sample_mipmap functionRoland Scheidegger2016-04-211-2/+2
| | | | | | | | | | | | | | | Screwed up since 0753b135f6e83b171d8a1b08aea967374f3542bc. (Only an issue with different min/mag filters, and then only in some cases, which is probably why it went unnoticed for quite a while. The effect should have simply been nearest mip filter instead of linear, iff min was nearest, mag was linear, and all pixels hit the mignifying path.) Fixes a bunch of dEQP failures. Reviewed-by: Jose Fonseca <[email protected]> Cc: "11.1 11.2" <[email protected]>
* i965: Fix clear code for ignoring colormask for XRGB formats on Gen9+.Kenneth Graunke2016-04-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | In commit cda886a4851ab767fba40e8474d6fa8190347e4f, Neil made us stop advertising RGBX formats on Gen9+, as the hardware apparently no longer has working fast clear support for those formats. Instead, we just fall back to RGBA formats, and use SCS to override alpha to 1.0. This is fine, but had one unintended side effect: it made us fall back to slow clears when the color mask disables alpha. Normally, we ignore the color mask for non-existent channels. This includes alpha for XRGB formats as writing garbage to the X channel is harmless. But, now that we use RGBA, we think there's a real alpha channel, and can't do the optimization. To hack around this, check if _BaseFormat is GL_RGB and ignore alpha. Improves WebGL Aquarium performance on Skylake GT3e by about 50% by letting it use repclears instead of slow clears. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ben Widawsky <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/blorp: Improve precission of blitting coordinates when clippingIago Toral Quiroga2016-04-211-61/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | We do this in two steps: first we clip the dst rect and adjust the src rect accordingly. Then we do it the other way around. In both passes the adjustment part involves multiplying by a scale factor that can lead to a small precision loss. This is breaking a few dEQP tests. Specifically, the problem happens when we need to clip the same coordinate twice. For example, if srcX0 and dstX0 need both to be clipped we want to avoid the situation where we clip srcX0 first, then adjust dstX0 accordingly but then we realize that the resulting dstX0 still needs to be clipped, so we clip dstX0 and adjust srcX0 again. Each of these two passes can lead to precission loss. What we want to do here is detect the rect that leads to the largest clip (accounting for the scale factor involved), clip that rect and adjust the other one. With this we ensure that the adjusted coordinate does not need to be clipped again and we can skip a second pass, improving precision. Fixes the following 4 dEQP tests: dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_x_nearest dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_src_x_linear dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_dst_x_nearest dEQP-GLES3.functional.fbo.blit.rect.out_of_bounds_reverse_dst_x_linear Reviewed-by: Kenneth Graunke <[email protected]> Tested-by: Mark Janes <[email protected]>
* radeonsi: Add config parameter to si_shader_apply_scratch_relocs.Bas Nieuwenhuizen2016-04-214-3/+5
| | | | | | | shader->config is not updated for compute kernels. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* glsl: Relax GLSL 1.10 float suffix error to a warning.Matt Turner2016-04-211-2/+2
| | | | | | | | | | | | Float suffixes are allowed in all subsequent GLSL specifications, and it's obvious what the user meant if they specify one. Accept it with a warning to avoid breaking applications, like Planeshift (although it looks like between 0.6.1 and 0.6.3 they might have removed the suffixes from their shaders). Reviewed-by: Lars Hamre <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965/fs: Readd opt_drop_redundant_mov_to_flags().Matt Turner2016-04-212-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit b449366587b5f3f64c6fb45fe22c39e4bc8a4309. I removed the pass thinking that it was now not useful, but that was not true. I believe I ran shader-db on HSW and saw no results, but HSW does not use the unlit centroid workaround code and as a result does not emit redundant MOV_DISPATCH_TO_FLAGS instructions. On IVB, the shader-db results are: total instructions in shared programs: 6650806 -> 6646303 (-0.07%) instructions in affected programs: 106893 -> 102390 (-4.21%) helped: 793 total cycles in shared programs: 56195538 -> 56103720 (-0.16%) cycles in affected programs: 873048 -> 781230 (-10.52%) helped: 553 HURT: 209 On SNB, the shader-db results are: total instructions in shared programs: 7173074 -> 7168541 (-0.06%) instructions in affected programs: 119757 -> 115224 (-3.79%) helped: 799 total cycles in shared programs: 98128032 -> 98072938 (-0.06%) cycles in affected programs: 1437104 -> 1382010 (-3.83%) helped: 454 HURT: 237 Reviewed-by: Iago Toral Quiroga <[email protected]>
* i965/blorp: Do not emit pma stall on gen9+Topi Pohjolainen2016-04-211-1/+3
| | | | | | | This was left out from the original gen8 upload introduction. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* swr: add PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT to get_paramTim Rowley2016-04-211-0/+1
| | | | Reviewed-by: Ilia Mirkin <[email protected]>
* i965: automake: remove gratuitous "+" during variable assignmentEmil Velikov2016-04-211-2/+2
| | | | | | | There is not initial assignment, thus appending to it does not work. Fixes: b27c85c4c08 "i965: add build rule for brw_nir_trig_workarounds.c" Signed-off-by: Emil Velikov <[email protected]>
* gbm: add GBM_FORMAT_XBGR8888 format supportRob Herring2016-04-211-0/+7
| | | | | | | | | Add GBM_FORMAT_XBGR8888/__DRI_IMAGE_FORMAT_XBGR8888 format support which is needed for Android. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
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