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* vulkan/wsi: Add a WSI_FROM_HANDLE macroJason Ekstrand2017-12-041-0/+3
* radv/wsi: drop allocate memory special caseDave Airlie2017-12-042-20/+6
* vulkan/wsi: Do image creation in common codeJason Ekstrand2017-12-047-303/+146
* vulkan/wsi: Implement prime in a completely generic wayJason Ekstrand2017-12-047-180/+475
* radv: Move wsi initialization later in physical_device_initJason Ekstrand2017-12-041-6/+7
* radv/image: Implement the wsi "extension"Jason Ekstrand2017-12-042-2/+12
* anv/image: Implement the wsi "extension"Jason Ekstrand2017-12-042-4/+37
* anv: Require a dedicated allocation for modified imagesJason Ekstrand2017-12-041-4/+49
* anv/image: Add a drm_format_mod fieldJason Ekstrand2017-12-042-0/+7
* radv: Implement VK_EXT_external_memory_dma_bufJason Ekstrand2017-12-043-12/+29
* anv: Implement VK_EXT_external_memory_dma_bufJason Ekstrand2017-12-043-17/+34
* vulkan/wsi: Add a mock image creation extensionJason Ekstrand2017-12-041-0/+18
* vulkan/wsi: Add wsi_swapchain_init/finish functionsJason Ekstrand2017-12-047-4/+83
* vulkan/wsi: Add a wsi_device_init functionJason Ekstrand2017-12-046-2/+60
* vulkan/wsi/x11: Handle the geometry check earlier in create_swapchainJason Ekstrand2017-12-041-9/+10
* vulkan/wsi: Add a wsi_image structureDaniel Stone2017-12-045-93/+65
* vulkan/wsi: use function ptr definitions from the spec.Dave Airlie2017-12-044-6/+8
* i965: Emit CS stall before MEDIA_VFE_STATE.Kenneth Graunke2017-12-041-0/+12
* i965: Move PIPE_CONTROL defines and prototypes to brw_pipe_control.h.Kenneth Graunke2017-12-044-62/+90
* spirv: Replace unreachable with vtn_failJason Ekstrand2017-12-046-111/+118
* spirv: Replace assert with vtn_assertJason Ekstrand2017-12-045-249/+251
* spirv: Add vtn_fail and vtn_assert helpersJason Ekstrand2017-12-042-0/+67
* util: Add a NORETURN macroJason Ekstrand2017-12-043-0/+11
* spirv: Do something useful with OpSourceJason Ekstrand2017-12-041-1/+21
* spirv: Rework loggingJason Ekstrand2017-12-044-18/+119
* spirv: Re-arrange vtn_builder initializationJason Ekstrand2017-12-041-6/+7
* spirv: Parent the nir_shader to the builder while buildingJason Ekstrand2017-12-041-1/+4
* freedreno: mark stencil buffer valid too in case of z32x24s8Rob Clark2017-12-042-2/+4
* freedreno: remove use of u_transferRob Clark2017-12-0411-41/+30
* freedreno: add -Wno-packed-bitfield-compat for meson buildEric Engestrom2017-12-041-2/+12
* glsl: don't run intrastage array validation when the interface type is not an...Samuel Iglesias Gonsálvez2017-12-041-1/+1
* glsl/es: precision qualifier doesn't need to match in UBOsSamuel Iglesias Gonsálvez2017-12-041-1/+1
* nvc0/ir: Properly lower 64-bit shifts when the shift value is >32Pierre Moreau2017-12-041-1/+1
* glsl: Match order of gl_LightSourceParameters elements.Fabian Bieler2017-12-031-2/+2
* glsl: Fix gl_NormalScale.Fabian Bieler2017-12-033-2/+6
* st/glsl_to_nir/radeonsi: enable gs support for nir backendTimothy Arceri2017-12-043-29/+47
* ac: add si_nir_load_input_gs() to the abiTimothy Arceri2017-12-045-14/+64
* ac: move build_varying_gather_values() to ac_llvm_build.h and exposeTimothy Arceri2017-12-043-28/+32
* ac: add basic nir -> llvm type helperTimothy Arceri2017-12-041-0/+22
* radeonsi: create si_llvm_load_input_gs()Timothy Arceri2017-12-042-23/+44
* radeonsi: pass llvm type to lds_load()Timothy Arceri2017-12-041-13/+13
* radeonsi: add llvm_type_is_64bit() helperTimothy Arceri2017-12-041-0/+9
* radeonsi: pass llvm type to si_llvm_emit_fetch_64bit()Timothy Arceri2017-12-043-12/+18
* radeonsi: add nir support for gs epilogueTimothy Arceri2017-12-041-4/+21
* radeonsi: add nir support for es epilogueTimothy Arceri2017-12-041-16/+13
* radeonsi: add nir support for ls epilogueTimothy Arceri2017-12-041-15/+14
* st/glsl_to_nir: add gs support to st_nir_assign_var_locations()Timothy Arceri2017-12-041-6/+17
* st/glsl_to_nir: use nir_lower_io_arrays_to_elements() to lower arraysTimothy Arceri2017-12-041-1/+1
* nir: allow builin arrays to be loweredTimothy Arceri2017-12-041-7/+10
* nir: add array lowering function that assumes there are no indirectsTimothy Arceri2017-12-042-1/+44
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