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* radv: add support for 32-bit pointers in user data SGPRsSamuel Pitoiset2018-05-224-21/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We still use 64-bit GPU pointers for all ring buffers because llvm.amdgcn.implicit.buffer.ptr doesn't seem to support 32-bit GPU pointers for now. This can be improved later anyways. Vega10: Totals from affected shaders: SGPRS: 1008722 -> 1026710 (1.78 %) VGPRS: 706580 -> 707136 (0.08 %) Spilled SGPRs: 22555 -> 22209 (-1.53 %) Spilled VGPRs: 75 -> 75 (0.00 %) Code Size: 34819208 -> 35202140 (1.10 %) bytes Max Waves: 175423 -> 175086 (-0.19 %) Polaris10: Totals from affected shaders: SGPRS: 1029849 -> 1036517 (0.65 %) VGPRS: 709984 -> 708872 (-0.16 %) Spilled SGPRs: 22672 -> 22309 (-1.60 %) Spilled VGPRs: 82 -> 66 (-19.51 %) Scratch size: 76 -> 60 (-21.05 %) dwords per thread Code Size: 34915336 -> 35309752 (1.13 %) bytes Max Waves: 151221 -> 151677 (0.30 %) Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add set_loc_shader_ptr() helperSamuel Pitoiset2018-05-221-7/+13
| | | | | | | This helper will hep for switching to 32-bit GPU pointers. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: allocate descriptor BOs in the 32-bit addr spaceSamuel Pitoiset2018-05-221-1/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: allocate the upload BO in the 32-bit addr spaceSamuel Pitoiset2018-05-221-1/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: set amdgpu-32bit-address-high-bits LLVM attributeSamuel Pitoiset2018-05-223-0/+8
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: allow to allocate BOs in the 32-bit addr spaceSamuel Pitoiset2018-05-222-1/+3
| | | | | | | This introduces a new flag called RADEON_FLAG_32BIT. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: request high addressSamuel Pitoiset2018-05-221-4/+6
| | | | | | | This is needed for 32-bit GPU pointers. Ported from RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* i965/glk: Add l3 banks count for 2x6 configurationAnuj Phogat2018-05-211-1/+1
| | | | | | | | | | | | 2x6 configuration with pci-id 0x3185 has same number of banks (2) as 3x6 configuration (pci-id 0x3184). Reported-by: Clayton Craft <[email protected]> Signed-off-by: Anuj Phogat <[email protected]> Tested-by: Clayton Craft <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> Fixes: eb23be1d97da "i965: Add and initialize l3_banks field for gen7+" Cc: Francisco Jerez <[email protected]>
* v3d: Include v3d_drm.h path.Vinson Lee2018-05-211-0/+1
| | | | | | | | | | | | | | Fix build error. CC v3d_blit.lo In file included from v3d_blit.c:27:0: v3d_context.h:39:10: fatal error: v3d_drm.h: No such file or directory #include "v3d_drm.h" ^~~~~~~~~~~ Fixes: 8a793d42f1cc ("v3d: Switch the vc5 driver to using the finalized V3D UABI.") Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* radv: fix centroid interpolationSamuel Pitoiset2018-05-211-3/+0
| | | | | | | | | | | | | | | It's legal to set the centroid and sample interpolation modes when MSAA disabled. So, we have to initialize the centroid inputs because the hardware doesn't. This fixes rendering issues with DXVK and The Witness, World of Warcraft, Trackmania and probably more games. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106315 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102390 CC: 18.0 18.1 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Cleanup unused prime blit path.Bas Nieuwenhuizen2018-05-212-25/+0
| | | | | | | | Since we have the common WSI code, we use vkCmdCopyImageToBuffer instead. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* radv: Fix SRGB compute copies.Bas Nieuwenhuizen2018-05-212-0/+42
| | | | | | | | | | | | | | | SRGB stores are broken. We had compensation code in the resolve path but none in the copy path. Since we don't want any conversion and it does not matter for DCC, just make everything UNORM instead. This happened to cause wrong colors for the PRIME path, as that uses image->buffer copies which always use the compute path. CC: 18.0 18.1 <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106587 Reviewed-by: Dave Airlie <[email protected]>
* android: enable VK_ANDROID_native_bufferTapani Pälli2018-05-212-3/+1
| | | | | | | | | | | | | | Patch changes entrypoints generator to not skip this extension even though it is set as disabled in the xml. We also need compilation flag VK_USE_PLATFORM_ANDROID_KHR to be enabled. It looks like this extension got disabled in commit 69f447553c. v2: just remove the whole 'supported' attrib check + remove vk_icd.h compilation fix (fix in VulkanHeaders instead) Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* vulkan: update vk_icd.h to current upstreamTapani Pälli2018-05-211-14/+53
| | | | | | | | Import from commit eb0c1fd on branch 'master' of https://github.com/KhronosGroup/Vulkan-Headers.git. Signed-off-by: Tapani Pälli <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* virgl: set texture buffer offset alignment to disable ARB_texture_buffer_range.Dave Airlie2018-05-211-1/+1
| | | | | | | | | | The host side hasn't got support for this feature yet, so don't enable it unless we get the caps from the host. This makes the texture buffer range piglit tests skip now. Fixes: fe0647df5a7 (virgl: add offset alignment values to to v2 caps struct) Reviewed-by: Gurchetan Singh <[email protected]>
* mesa: stop hiding query parameters from OpenGL compatTimothy Arceri2018-05-211-14/+7
| | | | | | | | Just let the extension detection do its job as we will be adding compat profile support in future, also we want these to work with compat profile version overrides. Reviewed-by: Marek Olšák <[email protected]>
* radv: fix VK_EXT_descriptor_indexingChristoph Haag2018-05-201-1/+1
| | | | | | | | GetPhysicalDeviceProperties2KHR() was crashing because features was null Fixes: 0e10790558b "radv: Enable VK_EXT_descriptor_indexing." CC: 18.1 <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/surface: Only align linear power of two fmt textures.Bas Nieuwenhuizen2018-05-201-2/+2
| | | | | | | | We're not sharing 32_32_32 formats between different GPUs, so we do not have to align for vega on pre-vega cards. Fixes: e361970ed73 "radv: Add support for IMG_DATA_FORMAT_32_32_32." Reviewed-by: Marek Olšák <[email protected]>
* amd/addrlib: Use defines in autotools build.Bas Nieuwenhuizen2018-05-201-0/+1
| | | | | | | | Otherwise stuff like NDEBUG would not be passed through. CC: <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106479 Reviewed-by: Marek Olšák <[email protected]>
* r600/compute: Mark several functions as staticAaron Watry2018-05-192-30/+29
| | | | | | | They're not used anywhere else, so keep them private Signed-off-by: Aaron Watry <[email protected]> Reviewed-by: Jan Vesely <[email protected]>
* r600/compute: Remove unused compute_memory_pool functionsAaron Watry2018-05-192-103/+0
| | | | | Signed-off-by: Aaron Watry <[email protected]> Reviewed-by: Jan Vesely <[email protected]>
* draw: get rid of special logic to not emit null trisRoland Scheidegger2018-05-191-38/+0
| | | | | | | | I've confirmed after 77554d220d6d74b4d913dc37ea3a874e9dc550e4 we no longer need this to pass some tests from another api (as we no longer generate the bogus extra null tris in the first place). Reviewed-by: Jose Fonseca <[email protected]>
* docs: Add sha sums for releaseDylan Baker2018-05-181-2/+3
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* docs: Add release notes for 18.1.0Dylan Baker2018-05-182-1/+196
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* nir: Implement optional b2f->iand loweringAlyssa Rosenzweig2018-05-182-1/+7
| | | | | | | | | | | | | | | | | | This pass is required by the Midgard compiler; our instruction set uses NIR-style booleans (~0 for true) but lacks a dedicated b2f instruction. Normally, this lowering pass would be implemented in a backend-specific algebraic pass, but this conflicts with the existing iand->b2f pass in nir_opt_algebraic.py, hanging the compiler. This patch thus makes the existing pass optional (default on -- all other backends should remain unaffected), adding an optional pass for lowering the opposite direction. v2: Defer lowering until late algebraic optimisations to allow optimising the b2f instruction itself. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]>
* travis: Adapt to radeonsi dropping support for LLVM 4Jan Vesely2018-05-181-7/+7
| | | | | | | | meson Vulkan, Clover, and autotools Vulkan need to be switched to llvm 5 Fixes: f9eb1ef870eba9fdacf9a8cbd815ec3bff81db05 Signed-off-by: Jan Vesely <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: skip ES output stores for undefined output componentsMarek Olšák2018-05-181-0/+3
| | | | | Tested-by: Dieter Nützel <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* i965: isl: Move the MCS gen7+ assertion into ISLNanley Chery2018-05-182-2/+2
| | | | | | | This is useful for every user of ISL. Drop the comment along the way to match similar functions in ISL. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Remove format assertion in alloc_auxNanley Chery2018-05-181-5/+0
| | | | | | | | | intel_miptree_supports_{ccs,mcs,hiz} ensures the format is valid for the color or depth miptree before the miptree is assigned an aux_usage. alloc_aux switches on the aux_usage so don't assert that the format is valid. Reviewed-by: Topi Pohjolainen <[email protected]>
* i965/miptree: Simplify the switch in supports_ccsNanley Chery2018-05-181-5/+1
| | | | | Reviewed-by: Topi Pohjolainen <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* i965: Make get_ccs_surf succeed in alloc_auxNanley Chery2018-05-182-10/+11
| | | | | | | | | | Synchronize the requirements listed in isl_surf_get_ccs_surf with intel_miptree_supports_ccs by importing a restriction from ISL. Some implications: * We successfully create every aux_surf in alloc_aux * We only return false from alloc_aux if we run out of memory Reviewed-by: Topi Pohjolainen <[email protected]>
* llvmpipe: fix check for a no-op shaderBrian Paul2018-05-181-2/+4
| | | | | | | | | | The tgsi_info.num_tokens fix broke llvmpipe's detection of no-op shaders. Fix the code to check for num_instructions <= 1 instead. Fixes: 8fde9429c36b75 ("tgsi: fix incorrect tgsi_shader_info::num_tokens computation") Tested-by: Roland Scheidegger <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radv: pass radv_nir_compiler_options directly to create_llvm_function()Samuel Pitoiset2018-05-181-4/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* st/mesa: only define GLSL 1.4 for compat if driver supports itChristian Gmeiner2018-05-181-1/+1
| | | | | | | | | | | | | Currently GLSL 1.4 is defined for all gallium drivers even only GLSL 1.2 is supported as seen on etnaviv. v1 -> v2: - use _min(..) as suggested by Lucas Stach and Michel Dänzer Fixes: 4560aad780b ("mesa: add GLSLVersionCompat constant") Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Lucas Stach <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* vbo: remove MaxVertexAttribStride assert check.Dave Airlie2018-05-181-1/+0
| | | | | | | | Some drivers (virgl) don't support GL4.4 or GLES3.1 yet, so never fill in this const. Reviewed-by: Mathias Fröhlich <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa: drop GL_EXT_polygon_offset supportTimothy Arceri2018-05-189-36/+64
| | | | | | | | glPolygonOffset() has been part of the GL standard since 1.1. Also niether AMD or Nvidia support this in their binary drivers. Reviewed-by: Marek Olšák <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=61761
* tgsi: fix incorrect tgsi_shader_info::num_tokens computationBrian Paul2018-05-171-2/+1
| | | | | | | | | | | | | We were incrementing num_tokens in each loop iteration while parsing the shader. But each call to tgsi_parse_token() can consume more than one token (and often does). Instead, just call the tgsi_num_tokens() function. Luckily, this issue doesn't seem to effect any current users of this field (llvmpipe just checks for <= 1, for example). Reviewed-by: Neha Bhende<[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* radv: add radv_emit_shader_pointer() helperSamuel Pitoiset2018-05-173-13/+18
| | | | | | | For future work (support for 32-bit GPU pointers). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add some helpers for cleaning up radv_get_preamble_cs()Samuel Pitoiset2018-05-171-86/+128
| | | | | | | Because this function looks a bit ugly to me. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd: remove support for LLVM 4.0Marek Olšák2018-05-1713-229/+121
| | | | | | | It doesn't support GFX9. Acked-by: Dave Airlie <[email protected]> Acked-by: Samuel Pitoiset <[email protected]>
* docs: update calendar, add news and link release notes to 18.0.4Juan A. Suarez Romero2018-05-173-7/+8
| | | | Signed-off-by: Juan A. Suarez Romero <[email protected]>
* docs: add sha256 checksums for 18.0.4Juan A. Suarez Romero2018-05-171-1/+2
| | | | | Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit 69ef6e4a75255e60a4c4a2419d03c9352b9eb8f2)
* docs: add release notes for 18.0.4Juan A. Suarez Romero2018-05-171-0/+156
| | | | | Signed-off-by: Juan A. Suarez Romero <[email protected]> (cherry picked from commit 3b49ab6219790c341ffb78a6eeaaa8b1a4b29bcc)
* mesa: The glArrayElement api is independent of the current program.Mathias Fröhlich2018-05-172-2/+2
| | | | | | | | | All the shader program dependent handling is done on the level of the gl_Context::Array._DrawVAO/_DrawVAOEnabledAttribs. So, skip array element invalidation on _NEW_PROGRAM. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Flag _NEW_ARRAY only if we are changing ctx->Array.VAO.Mathias Fröhlich2018-05-171-6/+14
| | | | | | | | | For the VAO internal helper functions that may be called with a non current VAO, flag the _NEW_ARRAY state only if it is the current ctx->Array.VAO. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Remove flush_vertices argument from VAO methods.Mathias Fröhlich2018-05-179-57/+51
| | | | | | | The flush_vertices argument is now unused, remove it. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* mesa: Remove FLUSH_VERTICES from VAO state changes.Mathias Fröhlich2018-05-171-59/+6
| | | | | | | | | Pending draw calls on immediate mode or display list calls do not depend on changes of the VAO state. So, remove calls to FLUSH_VERTICES and flag _NEW_ARRAY as appropriate. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Mathias Fröhlich <[email protected]>
* docs: add 18.0.5 in the release calendarJuan A. Suarez Romero2018-05-171-1/+8
| | | | | | | | | | Mesa 18.1 series has not been released yet, so let's extend 18.0 lifetime. v2: Add missing closing TR tags (Eric Engestrom) CC: Andres Gomez <[email protected]> CC: Emil Velikov <[email protected]> Reviewed-by: Andres Gomez <[email protected]>
* swr/rast: Added FEClipRectangles eventAlok Hota2018-05-172-0/+4
| | | | | | and also added some comments Reviewed-By: George Kyriazis <[email protected]>
* swr/rast: Whitespace and tab-to-spaces changesAlok Hota2018-05-175-17/+18
| | | | Reviewed-By: George Kyriazis <[email protected]>
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