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* intel/blorp: Take a destination swizzle in blorp_blitJason Ekstrand2016-09-123-2/+4
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/blorp: Take an isl_swizzle instead of a SWIZZLEJason Ekstrand2016-09-123-29/+30
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* intel/isl: Add an isl_swizzle structure and use it for isl_view swizzlesJason Ekstrand2016-09-128-64/+48
| | | | | | | | | This should be more compact than the enum isl_channel_select[4] that we were using before. It's also very convenient because we already had such a structure in the Vulkan driver we just needed to pull it over. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* docs: Add OES_tessellation_shader to the release notes.Kenneth Graunke2016-09-121-0/+1
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* docs: Mark OES_tessellation_shader as done.Kenneth Graunke2016-09-121-1/+1
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* st/mesa: fix is_scissor_enabled when X/Y are negativeIlia Mirkin2016-09-121-4/+6
| | | | | | | | | | | | | | Similar to commit 49c24d8a24 ("i965: fix noop_scissor range issue on width/height") - take the X/Y into account to determine whether the scissor covers the whole area or not. Fixes the recently-added gl-1.0-scissor-depth-clear-negative-xy piglit test. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Cc: <[email protected]>
* android: add support for libmesa_amdgpu_addrlibMauro Rossi2016-09-137-6/+84
| | | | | | | | | | | Android porting of the following commits: f1f1ba3 "radeonsi: move sid.h/r600d_common.h to a common place." 69fca64 "amd/addrlib: move addrlib from amdgpu winsys to common code" This patch fixes android building errors Reviewed-by: Dave Airlie <[email protected]>
* u_endian: add android to glibc clauseDave Airlie2016-09-131-1/+1
| | | | Tested-by: Mauro Rossi <[email protected]>
* Revert "i965: Drop the maximum 3D texture size to 512 on Sandy Bridge"Jason Ekstrand2016-09-121-10/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 6ba88bce64b343761aabe3a6c7ee285c6020a959. The commit was erroneous because GL has a separate limit, GL_MAX_FRAMEBUFFER_LAYERS which guards the number of layers you are allowed to render into. The GL 4.5 spec says: "The framebuffer attachment point attachment is said to be framebuffer attachment complete if [...] all of the following conditions are true: [...] If image is a three-dimensional, one- or two-dimensional array, or cube map array texture and the attachment is layered, the depth or layer count of the texture is less than or equal to the value of the implementation-dependent limit MAX_FRAMEBUFFER_LAYERS." and goes on to say that "framebuffer complete" requires all attachments to be "framebuffer attachment complete". On Sandy Bridge, we set GL_MAX_FRAMEBUFFER_LAYERS to 512 so creating a 3D texture bigger than 512 is fine; you just can't render into all of the slices at once. Fixes ES3-CTS.gtf.GL3Tests.npot_textures.npot_tex_image on Sandy Bridge Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* intel/blorp: Handle the 512 layers restriction on Sandy BridgeJason Ekstrand2016-09-122-4/+19
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* intel/isl: Treat 3-D textures as 2-D arrays for renderingJason Ekstrand2016-09-122-4/+13
| | | | | | | | | | In particular, this means that isl_view::base_array_layer and isl_view::array_len get applied to 3-D textures but only when rendering. We were already applying isl_view::base_array_layer for rendering into 3-D textures so this isn't a huge deviation. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* aubinator: Simplify gen_disasm_create()'s devinfo handlingSirisha Gandikota2016-09-121-7/+1
| | | | | | | | | | Copy the whole devinfo structure instead of just few fields (Ken) Earlier, copied only couple of fields which added more code. So, simplify code by copying the whole structure. Signed-off-by: Sirisha Gandikota <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* aubinator: Fix compiler warningSirisha Gandikota2016-09-121-1/+1
| | | | | | | Add 'const' qualifier to gen_field_iterator::p pointer (Ken) Signed-off-by: Sirisha Gandikota <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* st/va: also honors interlaced preference when providing a video formatJulien Isorce2016-09-121-17/+19
| | | | | | | | | | | | | | | This fixes a crash when using the prefered video format with vaapisink on Nvidia hardwares. Also caught by the following assert: nouveau_vp3_video.c:91: Assertion `templat->interlaced' failed. TEST= gst-launch-1.0 videotestsrc ! video/x-raw, format=NV12 ! vaapisink Cc: <[email protected]> Signed-off-by: Julien Isorce <[email protected]> Tested-by: Víctor Manuel Jáquez Leal <[email protected]> Tested-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* tgsi: document semantics for compute shadersSamuel Pitoiset2016-09-121-0/+28
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* mesa: Enable OES/EXT_tessellation_shader for ES 3.1 + ARB_tess drivers.Kenneth Graunke2016-09-121-4/+4
| | | | | | | | | Drivers which support ARB_tessellation_shader and ES 3.1 now will expose OES_tessellation_shader and EXT_tessellation_shader as well. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* radeonsi: don't preload constants at the beginning of shadersMarek Olšák2016-09-121-20/+11
| | | | | | | | | | | | | | | | | | | | | | LLVM can CSE the loads, thus we can always re-load constants before each use. The decrease in SGPR spilling is huge. The best improvements are the dumbest ones. 26011 shaders in 14651 tests Totals: SGPRS: 1453346 -> 1251920 (-13.86 %) VGPRS: 742576 -> 728421 (-1.91 %) Spilled SGPRs: 52298 -> 16644 (-68.17 %) Spilled VGPRs: 397 -> 369 (-7.05 %) Scratch VGPRs: 1372 -> 1344 (-2.04 %) dwords per thread Code Size: 36136488 -> 36001064 (-0.37 %) bytes LDS: 767 -> 767 (0.00 %) blocks Max Waves: 219315 -> 222221 (1.33 %) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* intel/blorp: Add a TODO fileJason Ekstrand2016-09-121-0/+16
| | | | | | | This provides a nice little place to share notes on what still needs to be done and/or would be nice to have in BLORP. Signed-off-by: Jason Ekstrand <[email protected]>
* i965: check for GL_TEXTURE_EXTERNAL_OES at miptree_create_for_teximageAlejandro Piñeiro2016-09-121-0/+1
| | | | | | | | | | | | | | | Forgotten on commit "i965: Fix calculation of the image height at start level". Thanks to Ilia Mirkin for point it. Fixes the following regressions on Haswell and Broadwell: ES2-CTS.gtf.GL2ExtensionTests.egl_image_external.TestSimpleUnassociated (crash back to pass) ES2-CTS.gtf.GL2ExtensionTests.egl_image_external.TestSimple (crash back to fail) ES2-CTS.gtf.GL2ExtensionTests.egl_image_external.TestVertexShader (crash back to fail) https://bugs.freedesktop.org/show_bug.cgi?id=97761 Reviewed-by: Jason Ekstrand <[email protected]>
* gbm: fix potential NULL deref of mapImage/unmapImage.Chuanbo Weng2016-09-121-2/+3
| | | | | | | | | The mapImage/unmapImage functions of DRIimage extension can be NULL, so we should add additional check for them. Cc: <[email protected]> Signed-off-by: Chuanbo Weng <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Remove GL_GLEXT_PROTOTYPES guards from non-ext headers.Emil Velikov2016-09-124-20/+0
| | | | | | | | | | | | | | | | | | | | | | A earlier sync with the Khronos headers added _extension_ prototype guards to all the GLES2/3/31/32 core entry points. Effectively breaking all the applications that aim to be portable and do not set the define. The issue has been reported to Khronos (internal bugzilla #14206) and is being worked on. Until updated/fixed headers are released locally fix the issue. The following report is when building weston. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97773 Cc: Armin Krezović <[email protected]> Cc: Emmanuel Gil Peyrot <[email protected]> Cc: Pekka Paalanen <[email protected]> Fixes: 6a5504de2fb ("Update Khronos-supplied headers to r33100") Cc: Dave Airlie <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Daniel Stone <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* aubinator: rework print_help()Emil Velikov2016-09-121-12/+5
| | | | | | | | | | | | | | | | Rather than using platform specific methods to retrieve the program name pass it explicitly. The function is called directly from main(). Similarly - basename comes in two versions POSIX (can modify string, always pass a copy) and GNU (never modifies the string). Just printout the complete program name, esp. since the program is not meant to be installed. Thus using $basename is unlikely to work, not to mention it is misleading. Reported-by: Timothy Arceri <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jonathan Gray <[email protected]>
* docs: Note MESA_configless_context as supersededAdam Jackson2016-09-121-2/+6
| | | | | | Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* egl: Rename MESA_configless_context bit to KHR_no_config_contextAdam Jackson2016-09-124-6/+8
| | | | | | | | | Keep the old name in the extension string, but refer to the KHR extension internally. Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* egl: QueryContext on a configless context returns zeroAdam Jackson2016-09-121-3/+8
| | | | | | | | | | | | MESA_configless_context does not specify the interaction with QueryContext at all, and the code to generate an error in this case predates the Mesa extension. Since EGL_NO_CONFIG_{KHR,MESA} are numerically identical there's no way to distinguish which one the application asked for, so use the KHR behaviour. Reviewed-by: Kristian Høgsberg <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Adam Jackson <[email protected]>
* st/va: enable vbr rate control for vaapi encodeBoyuan Zhang2016-09-122-2/+2
| | | | | | | | This patch enables variable bit-rate for vaapi encoding. According to va.h, target bit-rate equals to maximum bit-rate multiplies by target_percentage. Signed-off-by: Boyuan Zhang <[email protected]> Reviewed-by: Christian König <[email protected]>
* vl/rbsp: match initial escaped bits with valid in the bufferLeo Liu2016-09-121-2/+4
| | | | | | Otherwise the check for the three byte will not make sense. Signed-off-by: Leo Liu <[email protected]>
* egl: fix gcc warning braces around scalar initializerTimothy Arceri2016-09-121-1/+1
| | | | Reviewed-by: Alejandro Piñeiro <[email protected]>
* winsys/radeon: rename nrelocs, crelocs to max_relocs, num_relocsNicolai Hähnle2016-09-122-27/+27
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: don't pre-allocate the relocations arrayNicolai Hähnle2016-09-121-14/+1
| | | | | | It's really not necessary. Switch to an exponential resizing strategy. Reviewed-by: Marek Olšák <[email protected]>
* winsys/radeon: remove unused radeon_cs_context::priority_usageNicolai Hähnle2016-09-121-1/+0
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: remove amdgpu_cs_lookup_bufferNicolai Hähnle2016-09-122-9/+3
| | | | | | | The radeonsi driver doesn't and shouldn't care about the buffer index. Only the virtual addresses matter. Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: remove unused field domains from amdgpu_cs_bufferNicolai Hähnle2016-09-122-37/+17
| | | | Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: remove initial buffer list allocationNicolai Hähnle2016-09-121-20/+0
| | | | | | It's really not necessary. Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: extract adding a new buffer list entry into its own functionNicolai Hähnle2016-09-121-43/+70
| | | | | | | While at it, try to be a little more robust in the face of memory allocation failure. Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: use only one fence per BONicolai Hähnle2016-09-123-68/+56
| | | | | | | | | | | The fence that is added to the BO during flush is guaranteed to be signaled after all the fences that were in the fences array of the BO before the flush, because those fences are added as dependencies for the submission (and all this happens atomically under the bo_fence_lock). Therefore, keeping only the last fence around is sufficient. Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: add do_winsys_deinit functionNicolai Hähnle2016-09-121-2/+7
| | | | | | | The idea is to have matching init/deinit functions so that deinit can be re-used for cleanup in the error path of amdgpu_winsys_create. Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: clean up error paths in amdgpu_winsys_createNicolai Hähnle2016-09-121-7/+5
| | | | | | | No need to call pb_cache_deinit, because the cache hasn't been initialized at that point. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: page alignment for buffers is unnecessaryNicolai Hähnle2016-09-121-4/+1
| | | | | | In some places (e.g. shader program pointers) we require 256 bytes alignment. Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon/winsyses: remove #includes of pb_bufmgr.hNicolai Hähnle2016-09-123-3/+0
| | | | Reviewed-by: Marek Olšák <[email protected]>
* i965/rbc: Clarify rational given for shader image resolvesTopi Pohjolainen2016-09-121-3/+4
| | | | | | | | | | | | | | | | | | | | | | Original commit added documentation explaining lossless compression case: commit 56f29911ec9da25c78fbd3d4945d499e65ca4b5a Author: Topi Pohjolainen <[email protected]> Date: Tue Feb 2 10:00:41 2016 +0200 i965: Add a flag telling color resolve pass to ignore CCS_E It, however, easily gives the impression that the sole purpose of the intel_miptree_resolve_color() is to address lossless compression. Original intention is to document the lack of INTEL_MIPTREE_IGNORE_CCS_E flag given for the resolve call. This patch fixes this along with a typo found spotted further down. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Use hw generetad primitive copies for layered clearsTopi Pohjolainen2016-09-121-24/+12
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Sanity check all layers before actual clearTopi Pohjolainen2016-09-121-2/+5
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/blorp: Add plumbing for setting color clear layer countTopi Pohjolainen2016-09-123-13/+15
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/blorp: Allow multiple layersTopi Pohjolainen2016-09-121-3/+6
| | | | | Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/blorp: Instruct vertex fetcher to provide prim instance idTopi Pohjolainen2016-09-121-4/+22
| | | | | | | | | | This will indicate target layer (Render Target Array Index) needed for layered clears. v2: Use 3DSTATE_VF_SGVS for gen8+ Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/rbc: Allocate mcs directlyTopi Pohjolainen2016-09-124-63/+26
| | | | | | | | | | | | | | | | such as we do for compressed msaa. In case of non-compressed simgle sampled buffers the allocation of mcs is deferred until there is actually a clear operation that needs the mcs. In case of render buffer compression the mcs buffer always needed and there is no real reason to defer the allocation. By doing it directly allows to drop quite a bit unnecessary complexity. Patch leaves brw_predraw_set_aux_buffers() a no-op. Subsequent patches will re-use it and it seemed cleaner to leave it instead of removing and re-introducing. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* isl/gen8+: Allow 1D and 3D auxiliary surfacesTopi Pohjolainen2016-09-121-1/+2
| | | | | | | | | | | | | Otherwise once mcs buffer gets allocated without delay for lossless compression (same as we do for msaa), assert starts to fire in piglit case: tex3d. The test uses depth of one which is in fact supported even now. v2 (Jason): Allow also 1D case as there is nothing in the specs constraining it either. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Add sanity check for non-compressible texture viewsTopi Pohjolainen2016-09-121-0/+34
| | | | | | | v2: Fix missing inline declaration Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965/rbc: Consult rb settings for texture surface setupTopi Pohjolainen2016-09-121-7/+60
| | | | | | | | | | | | | | | | | | | | | | | | Once mcs buffer gets allocated without delay for lossless compression (same as we do for msaa), one gets regression in: GL45-CTS.texture_barrier_ARB.same-texel-rw Setting the auxiliary surface for both sampling engine and data port seems to fix this. I haven't found any hardware documentation backing this though. v2 (Jason): Prepare also for the case where surface is sampled with non-compressible format forcing also rendering without compression. v3: Split asserts and decision making. v4: Detailed comment provided by Jason explaining the need for using auxiliary buffer for texturing when the same surface is also used as render target. Added check for existence of renderbuffer before considering if underlying miptree matches. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
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