summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
...
* swr/rast: SIMD16 fetch shader jitter cleanupTim Rowley2018-01-101-720/+368
* swr/rast: shuffle header files for msvc pre-compiled header usageTim Rowley2018-01-1010-88/+143
* swr/rast: SIMD16 builder - cleanup naming (simd2 -> simd16)Tim Rowley2018-01-105-233/+239
* glsl/linker: Safely generate mask of possible locationsIan Romanick2018-01-101-4/+5
* glsl/linker: Mark no locations as invalid instead of marking all locationsIan Romanick2018-01-101-1/+1
* glsl: Don't handle visit_stop in several ::accept methodsIan Romanick2018-01-101-3/+6
* glsl: Remove unnecessary assignments to typeIan Romanick2018-01-101-4/+0
* nir: Silence unused parameter warningsIan Romanick2018-01-101-2/+2
* radv: Remove some typos.Bas Nieuwenhuizen2018-01-102-4/+4
* radv: Implement VK_EXT_discard_rectangles.Bas Nieuwenhuizen2018-01-105-6/+110
* radv: Add mapping between dynamic state mask and external enum.Bas Nieuwenhuizen2018-01-103-38/+79
* amd/common: bump the number of available user SGPRS to 32 on GFX9Samuel Pitoiset2018-01-101-1/+3
* radv: remove radv_pipeline_layout::push_constant_stages fieldSamuel Pitoiset2018-01-102-3/+0
* amd/common: do not rely on the pipeline for the push constants logicSamuel Pitoiset2018-01-103-9/+9
* radv/gfx9: calculate the number of ES VGPRs for merged shadersSamuel Pitoiset2018-01-101-3/+10
* radv/gfx9: enable LDS for GS only if the ES type is TESSamuel Pitoiset2018-01-101-1/+2
* amd/common: determine the ES type (VS or TES) for the GS on GFX9Samuel Pitoiset2018-01-102-0/+9
* i965/nir: lower TES PatchVerticesIn to a constant when a TCS is presentIago Toral Quiroga2018-01-101-4/+22
* glsl: remove Lower{TCS,TES}PatchVerticesInIago Toral Quiroga2018-01-104-31/+4
* i965: lower gl_PatchVerticesIn to a uniformIago Toral Quiroga2018-01-101-0/+8
* i965/nir: add a helper to lower gl_PatchVerticesIn to a uniformIago Toral Quiroga2018-01-102-0/+27
* r600: don't emit tes samplers/views when tes isn't activeRoland Scheidegger2018-01-102-0/+19
* r600: increase number of UBOs to 15Roland Scheidegger2018-01-103-22/+37
* r600: use GET_BUFFER_RESINFO vtx fetch on eg instead of setting up constsRoland Scheidegger2018-01-104-58/+50
* r600: increase number of ubos by one to 14Roland Scheidegger2018-01-104-4/+9
* r600: set up constants needed for txq for buffers and cube maps with tesRoland Scheidegger2018-01-101-0/+16
* r600: don't emit reloc for ring buffer out into the blueRoland Scheidegger2018-01-102-8/+6
* r600: hack up num_render_backends on Juniper to 8Roland Scheidegger2018-01-101-2/+19
* winsys/radeon: fix up default enabled_rb_mask for r600Roland Scheidegger2018-01-101-6/+10
* r600: fix enabled_rb_mask on eg/cmRoland Scheidegger2018-01-101-2/+9
* r600: fix sampler indexing with texture buffers samplingRoland Scheidegger2018-01-102-2/+4
* r600: don't use vtx offset for load_sample_positionRoland Scheidegger2018-01-101-1/+1
* r600: drop l2 related queriesDave Airlie2018-01-103-18/+0
* r600/shader: only read back the necessary tess factor components.Dave Airlie2018-01-101-4/+4
* Fix use of alloca() without #include <c99_alloca.h>Jon Turney2018-01-091-0/+1
* genxml: Add missing INSTDONE_1 bits on Gen7.5+.Kenneth Graunke2018-01-094-0/+8
* intel: Apply Geminilake "Barrier Mode" workaround.Kenneth Graunke2018-01-094-0/+49
* docs: update calendar, add news and link release notes for 17.3.2Emil Velikov2018-01-093-6/+8
* docs: add sha256 checksums for 17.3.2Emil Velikov2018-01-091-1/+2
* docs: add release notes for 17.3.2Emil Velikov2018-01-091-0/+108
* st/omx_bellagio: Update default intra matrix per MPEG2 specIndrajit Das2018-01-091-5/+5
* aubinator: add support for aubinating memtrace aubsScott D Phillips2018-01-081-35/+83
* aubinator: extract aubinator_init() out of the header handler functionScott D Phillips2018-01-081-16/+23
* aubinator: honor --color option when printing the headerScott D Phillips2018-01-081-1/+5
* .gitignore: Ignore new generated filesScott D Phillips2018-01-082-0/+2
* Meson: ensure variable definedDylan Baker2018-01-081-0/+1
* meson: Fix typo in clover buildDylan Baker2018-01-081-1/+1
* meson: set opencl flags for r600Dylan Baker2018-01-081-2/+5
* meson: build cloverDylan Baker2018-01-088-6/+336
* meson: Turn on swr for relevant targetsDylan Baker2018-01-084-8/+6