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* i915g: Move debug fields to screenJakob Bornecrantz2011-02-214-4/+7
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* i915g: Use debug get once optionsJakob Bornecrantz2011-02-212-3/+9
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* i915g: Rework texture tiling a bitJakob Bornecrantz2011-02-211-14/+8
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* i915g: Anisotropic filtering worksJakob Bornecrantz2011-02-211-1/+1
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* i915g: TODO about point spritesJakob Bornecrantz2011-02-211-0/+3
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* i915g: TODO about untested code hidden behind capsJakob Bornecrantz2011-02-212-2/+9
| | | | | Should be fairly easy to test and fix since you can look at the code in the classic driver.
* i915g: Reorg capsJakob Bornecrantz2011-02-211-28/+42
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* st/mesa: fix incorrect texture size allocation in st_finalize_texture()Brian Paul2011-02-211-3/+18
| | | | | | | | If finalizing a non-POW mipmapped texture with an odd-sized base texture image we were allocating the wrong size of gallium texture (off by one). Need to be more careful about computing the base texture image size. This fixes https://bugs.freedesktop.org/show_bug.cgi?id=34463
* st/mesa: refactor guess_and_alloc_texture() codeBrian Paul2011-02-211-35/+60
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* st/mesa: fix mipmap generation for non-POW texturesBrian Paul2011-02-211-7/+7
| | | | This is part of the fix for https://bugs.freedesktop.org/show_bug.cgi?id=34463
* mesa: convert macros to inline functionsBrian Paul2011-02-211-22/+22
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* vbo: more commentsBrian Paul2011-02-211-0/+5
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* vbo: make vbo_exec_FlushVertices_internal() staticBrian Paul2011-02-212-22/+20
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* vbo: remove old debug code, add commentsBrian Paul2011-02-211-4/+8
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* vbo: rename, document function paramsBrian Paul2011-02-211-5/+5
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* vbo: commentsBrian Paul2011-02-211-0/+8
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* vbo: replace assert(0) with proper assertionsBrian Paul2011-02-211-5/+2
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* vbo: rename some vars, add new comments, fix formatting, etc.Brian Paul2011-02-212-58/+77
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* vbo: use ctx instead of exec->ctxBrian Paul2011-02-211-3/+3
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* radeon: add default switch case to silence unhandled enum warningBrian Paul2011-02-211-0/+2
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* Use C-style system headers in C++ code to avoid issues with std:: namespaceIan Romanick2011-02-2125-58/+8
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* intel: Fix insufficient integer width for upload buffer offsetChris Wilson2011-02-211-2/+2
| | | | | | | | I was being overly miserly and gave the offset of the buffer into the bo insufficient bits, distracted by the adjacency of the buffer[4096]. Ref: https://bugs.freedesktop.org/show_bug.cgi?id=34541 Signed-off-by: Chris Wilson <[email protected]>
* svga: Remove some remaining fake S3TC rendering support.José Fonseca2011-02-211-4/+0
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* i965: Remove spurious duplicate ADVANCE_BATCHChris Wilson2011-02-211-1/+0
| | | | | | ... a leftover from a bad merge. Signed-off-by: Chris Wilson <[email protected]>
* i915: Emit a single relocation per vboChris Wilson2011-02-215-17/+45
| | | | | | | | | Reducing the number of relocations has lots of nice knock-on effects, not least including reducing batch buffer size, auxilliary array sizes (vmalloced and copied into the kernel), processing of uncached relocations etc. Signed-off-by: Chris Wilson <[email protected]>
* i915: Suppress emission of redundant stencil updatesChris Wilson2011-02-211-45/+55
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: Separate BLEND from general context state.Chris Wilson2011-02-213-22/+40
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: Only flag context changes if the actual state is changedChris Wilson2011-02-211-49/+105
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: suppress repeated sampler state emissionChris Wilson2011-02-212-0/+11
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i915: Eliminate redundant CONSTANTS updatesChris Wilson2011-02-211-25/+26
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i965: Use compiler builtins when availableChris Wilson2011-02-214-20/+25
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i965: Micro-optimise check_stateChris Wilson2011-02-211-7/+5
| | | | | | | Replace the intermediate tests due to the logical or with the bitwise or. Signed-off-by: Chris Wilson <[email protected]>
* intel: use throttle ioctl for throttlingChris Wilson2011-02-213-13/+3
| | | | | | | | | | Rather than waiting on the first batch after the last swapbuffers to be retired, call into the kernel to wait upon the retirement of any request less than 20ms old. This has the twofold advantage of (a) not blocking any other clients from utilizing the device whilst we wait and (b) we attain higher throughput without overloading the system. Signed-off-by: Chris Wilson <[email protected]>
* i965: Remove unused 'next_free_page' memberChris Wilson2011-02-211-5/+0
| | | | Signed-off-by: Chris Wilson <[email protected]>
* intel: Skip the flush before read-pixels via blitChris Wilson2011-02-211-4/+7
| | | | | | | As we will flush when reading the return values of the blit, we can forgo the earlier flush. Signed-off-by: Chris Wilson <[email protected]>
* intel: extend current vertex buffersChris Wilson2011-02-215-23/+73
| | | | | | | | | If the next vertex arrays are a (discontiguous) continuation of the current arrays, such that the new vertices are simply offset from the start of the current vertex buffer definitions we can reuse those defintions and avoid the overhead of relocations and invalidations. Signed-off-by: Chris Wilson <[email protected]>
* intel: Use specified alignment for writes into the upload bufferChris Wilson2011-02-213-30/+57
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i965: Clean up brw_prepare_vertices()Chris Wilson2011-02-211-21/+20
| | | | | | Use a temporary glarray variable to replace the numerous input->glarray. Signed-off-by: Chris Wilson <[email protected]>
* intel: combine short memcpy using a temporary allocated bufferChris Wilson2011-02-213-38/+27
| | | | | | | | Using a temporary buffer for large discontiguous uploads into the common buffer and a single buffered upload is faster than performing the discontiguous copies through a mapping into the GTT. Signed-off-by: Chris Wilson <[email protected]>
* i965: upload normal arrays as interleavedChris Wilson2011-02-211-30/+72
| | | | | | | Upload the non-vbo arrays into a single interleaved buffer object, and so need to just emit a single vertex buffer relocation. Signed-off-by: Chris Wilson <[email protected]>
* i965: interleaved vboChris Wilson2011-02-211-12/+27
| | | | | | | If the user passed in several arrays interleaved in the same vbo, only emit a single vertex buffer and relocation. Signed-off-by: Chris Wilson <[email protected]>
* i965: emit one vb packet per vboChris Wilson2011-02-213-77/+83
| | | | | | | Track reuse of the vertex buffer objects and so minimise the number of vertex buffers used by the hardware (and their relocations). Signed-off-by: Chris Wilson <[email protected]>
* i965: upload transient indices into the same discontiguous bufferChris Wilson2011-02-212-13/+8
| | | | | | | | As we now pack the indices into a common upload buffer, we can reuse a single CMD_INDEX_BUFFER packet and translate each invocation with a start vertex offset. Signed-off-by: Chris Wilson <[email protected]>
* i965: suppress repeat-emission of identical vertex elementsChris Wilson2011-02-211-3/+2
| | | | Signed-off-by: Chris Wilson <[email protected]>
* i965: Move repeat-instruction-suppression to batchbuffer coreChris Wilson2011-02-219-152/+120
| | | | | | | | Move the tracking of the last emitted instructions into the core batchbuffer routines and take advantage of the shadow batch copy to avoid extra memory allocations and copies. Signed-off-by: Chris Wilson <[email protected]>
* intel: use pwrite for batchChris Wilson2011-02-2127-302/+219
| | | | | | | | | | | It's faster. Not only is the memcpy more efficiently performed in the kernel (making up for the system call overhead), but by not using mmap we remove the greater overhead of tracking the vma of every batch. And it means we can read back from the batch buffer without incurring the cost of a uncached read through the GTT. Signed-off-by: Chris Wilson <[email protected]>
* i965: drop state_bo references to batch_boChris Wilson2011-02-219-105/+74
| | | | | | | As we use state relocations and we know that all the state belongs to the same bo, we can drop the multiple references to the same bo. Signed-off-by: Chris Wilson <[email protected]>
* i965: directly write wm state to batchChris Wilson2011-02-211-63/+48
| | | | | | | As we write directly into the batch in system memory, we do not need to write first to the stack (as was to avoid read back through the GTT) Signed-off-by: Chris Wilson <[email protected]>
* i965: write cc straight to batchChris Wilson2011-02-211-48/+46
| | | | | | | As we write directly into the batch in system memory, we do not need to write first to the stack (as was to avoid read back through the GTT) Signed-off-by: Chris Wilson <[email protected]>
* i965: switch gen6 to use its own cc state boChris Wilson2011-02-211-6/+6
| | | | | | | In preparation for a greater change, use the color_calc_state_bo already provisioned for this purpose. Signed-off-by: Chris Wilson <[email protected]>
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