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* intel: compiler: remove dead local variables at optimization passLionel Landwerlin2018-09-031-0/+5
| | | | | | | | | | | | | | | | | | | | We're hitting an assert in gfxbench because one of the local variable is a sampler (according to Jason this isn't valid) : testfw_app: ../src/compiler/nir_types.cpp:551: void glsl_get_natural_size_align_bytes(const glsl_type*, unsigned int*, unsigned int*): Assertion `!"type does not have a natural size"' failed. Since this particular variable isn't used, it can be eliminated by removing unused local variables at the end of the optimization loop. This makes sense also for valid local variables. v2: Move additional local variable removal out of optimization loop, but before large constant removal (Jason/Lionel) v3: Move the removal at the end of brw_nir_optimize() Signed-off-by: Lionel Landwerlin <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107806 Reviewed-by: Jason Ekstrand <[email protected]>
* intel/decoder: fix the possible out of bounds group_iterAndrii Simiklit2018-09-031-1/+4
| | | | | | | | | | | The "gen_group_get_length" function can return a negative value and it can lead to the out of bounds group_iter. v2: printing of "unknown command type" was added v3: just the asserts are added Signed-off-by: Andrii Simiklit <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* radv: Fix CMASK dimensions.Bas Nieuwenhuizen2018-09-031-2/+2
| | | | | | | | | | Mirrors 1e40f694831 "ac/surface: fix CMASK fast clear for NPOT textures with mipmapping on SI/CI/VI" CC: <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Use a lower max offchip buffer count.Bas Nieuwenhuizen2018-09-031-2/+22
| | | | | | | | No clue what gets fixed by this but both radeonsi and amdvlk do it. CC: <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add VEGA20 support.Bas Nieuwenhuizen2018-09-032-0/+2
| | | | | | | | | Just mirror the radeonsi bits. Since this is just adding the extra switch entries for new HW I think this should be fine for stable. CC: <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: don't expose linear depth surfaces on SI/CIK/VI either.Dave Airlie2018-09-031-3/+2
| | | | | | | | | | | ac_surface.c: gfx6_compute_surface says /* DB doesn't support linear layouts. */ Now if we expose linear depth and create a linear depth image and use CmdCopyImage to copy into it, we can't map the underlying memory and read it linearly which I think should work. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* egl/android: do not indent HAVE_DRM_GRALLOC preprocessor directiveMauro Rossi2018-09-021-3/+3
| | | | | | | Fixes: 3f7bca44d9 ("egl/android: #ifdef out flink name support") Fixes: c7bb82136b ("egl/android: Add DRM node probing and filtering") Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Mauro Rossi <[email protected]>
* anv/blorp: Fix a comment as per Nanley's review feedbackJason Ekstrand2018-09-011-2/+2
| | | | This accidentally didn't make it into 62378c5e9e5
* anv/blorp: Do more flushing around HiZ clearsJason Ekstrand2018-09-011-11/+33
| | | | | | | | | | We make the flush after a HiZ clear unconditional and add a flush/stall before the clear as well. Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107760 Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
* i965/vec4: Clamp indirect tes input array reads with 0x0fffffffIan Romanick2018-09-011-1/+11
| | | | | | | | | Page 190 of "Volume 7: 3D Media GPGPU Engine (Haswell)" says the valid range of the offset is [0, 0FFFFFFFh]. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: [email protected]
* i965/vec4: Correctly handle uniform sources in ↵Ian Romanick2018-09-011-1/+14
| | | | | | | | | | | generate_tes_add_indirect_urb_offset Fixes failure in the new piglit test tes-patch-input-array-vec2-index-invalid-rd.shader_test. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Cc: [email protected]
* docs: update calendar to extended the 18.1 cycle by one more releaseAndres Gomez2018-09-011-2/+8
| | | | | | | | | | | | Due to having 2 additional RCs for 18.2. Cc: Dylan Baker <[email protected]> Cc: Juan A. Suarez <[email protected]> Cc: Emil Velikov <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Acked-by: Dylan Baker <[email protected]> Acked-by: Juan A. Suarez <[email protected]> Acked-by: Emil Velikov <[email protected]>
* intel: Introducing Amber Lake platformRodrigo Vivi2018-08-314-2/+5
| | | | | | | | | | | | | | | Amber Lake uses the same gen graphics as Kaby Lake, including a id that were previously marked as reserved on Kaby Lake, but that now is moved to AML page. This follows the ids and approach used on kernel's commit e364672477a1 ("drm/i915/aml: Introducing Amber Lake platform") Reported-by: Timo Aaltonen <[email protected]> Cc: José Roberto de Souza <[email protected]> Cc: Anuj Phogat <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* intel: aubinator: Adding missed platforms to the error message.Rodrigo Vivi2018-08-311-2/+3
| | | | | | | | | | | | | Many new platforms got added to gen_device_name_to_pci_device_id() but the error message inside aubinator didn't reflected those changes. So syncing on the same order to be sure that we are not missing any now. Cc: Anuj Phogat <[email protected]> Cc: Matt Turner <[email protected]> Cc: Jordan Justen <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* i965/gen7_urb: Re-emit PUSH_CONSTANT_ALLOC on some gen9Nanley Chery2018-08-311-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to internal docs, some gen9 platforms have a pixel shader push constant synchronization issue. Although not listed among said platforms, this issue seems to be present on the GeminiLake 2x6's we've tested. We consider the available workarounds to be too detrimental on performance. Instead, we mitigate the issue by applying part of one of the workarounds. Re-emit PUSH_CONSTANT_ALLOC at the top of every batch (as suggested by Ken). Fixes ext_framebuffer_multisample-accuracy piglit test failures with the following options: * 6 depth_draw small depthstencil * 8 stencil_draw small depthstencil * 6 stencil_draw small depthstencil * 8 depth_resolve small * 6 stencil_resolve small depthstencil * 4 stencil_draw small depthstencil * 16 stencil_draw small depthstencil * 16 depth_draw small depthstencil * 2 stencil_resolve small depthstencil * 6 stencil_draw small * all_samples stencil_draw small * 2 depth_draw small depthstencil * all_samples depth_draw small depthstencil * all_samples stencil_resolve small * 4 depth_draw small depthstencil * all_samples depth_draw small * all_samples stencil_draw small depthstencil * 4 stencil_resolve small depthstencil * 4 depth_resolve small depthstencil * all_samples stencil_resolve small depthstencil v2: Include more platforms in WA (Ken). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106865 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93355 Cc: <[email protected]> Tested-by: Mark Janes <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* imx: make use of loader_open_render_node(..) helperChristian Gmeiner2018-08-311-1/+2
| | | | | | | Gets rid of hard-coded gpu device path. Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* tegra: make use loader_open_render_node(..) helperChristian Gmeiner2018-08-311-59/+2
| | | | | Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* loader: add loader_open_render_node(..)Christian Gmeiner2018-08-312-0/+68
| | | | | | | This helper is almost a 1:1 copy of tegra_open_render_node(). Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* tegra: fix memory leakChristian Gmeiner2018-08-311-0/+1
| | | | | | Fixes: 1755f608f52 ("tegra: Initial support") Signed-off-by: Christian Gmeiner <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* st/dri: Don't expose sRGB formats to clientsDaniel Stone2018-08-311-0/+6
| | | | | | | | | | | | | | Though the SARGB8888 format is used internally through its FourCC value, it is not a real format as defined by drm_fourcc.h; it cannot be used with KMS or other interfaces expecting drm_fourcc.h format codes. Ensure we don't advertise it through the dmabuf format/modifier query interfaces, preventing us from tripping over an assert. Signed-off-by: Daniel Stone <[email protected]> Reported-by: Michel Dänzer <[email protected]> Fixes: 8c1b9882b2e0 ("egl/dri2: Guard against invalid fourcc formats") Acked-by: Jason Ekstrand <[email protected]>
* radv: add missing support for protected memory propertiesSamuel Pitoiset2018-08-311-0/+6
| | | | | | | Fixes Vulkan CTS CL#2849. Similar to the ANV driver. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove dead code in scan_shader_output_decl()Samuel Pitoiset2018-08-311-6/+0
| | | | | | | Never used. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: remove radv_shader_context::num_output_{clips,culls}Samuel Pitoiset2018-08-311-7/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: adjust the cull dist mask in scan_shader_output_decl()Samuel Pitoiset2018-08-311-3/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: get length of the clip/cull distances array from usage maskSamuel Pitoiset2018-08-311-9/+40
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: do not recompute the output usage mask for clipdist twiceSamuel Pitoiset2018-08-311-4/+1
| | | | | | | The shader info pass takes care of this now. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: gather the output usage mask for clip/cull distances correctlySamuel Pitoiset2018-08-311-0/+8
| | | | | | | It's a special case because both are combined into a single array. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: add set_output_usage_mask() helperSamuel Pitoiset2018-08-311-17/+26
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: fix passing clip/cull distances from VS to PSSamuel Pitoiset2018-08-314-1/+51
| | | | | | | | | | | | | | | | | CTS doesn't test input clip/cull distances for the fragment shader stage, which explains why this was totally broken. I wrote a simple test locally that works now. This fixes a crash with GTA V and DXVK. Note that we are exporting unused parameters from the vertex shader now, but this can't be optimized easily because we don't keep the fragment shader info... Cc: [email protected] Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107477 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* egl/wayland: do not leak wl_buffer when it is lockedJuan A. Suarez Romero2018-08-312-7/+16
| | | | | | | | | | | | | | If color buffer is locked, do not set its wayland buffer to NULL; otherwise it can not be freed later. Rather, flag it in order to destroy it later on the release event. v2: instruct release event to unlock only or free wl_buffer too (Daniel) This also fixes dEQP-EGL.functional.swap_buffers_with_damage.* tests. CC: Daniel Stone <[email protected]> Reviewed-by: Daniel Stone <[email protected]>
* ac/radeonsi: fix CIK copy max sizeDave Airlie2018-08-311-1/+3
| | | | | | | | | | | | While adding transfer queues to radv, I started writing some tests, the first test I wrote fell over copying a buffer larger than this limit. Checked AMDVLK and found the correct limit. Cc: <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix regression in indirect input swizzles.Dave Airlie2018-08-311-2/+5
| | | | | | | | | This fixes: tests/spec/arb_enhanced_layouts/execution/component-layout/vs-fs-array-dvec3.shader_test since I reworked the 64-bit swizzles. Fixes: bb17ae49ee2 (gallivm: allow to pass two swizzles into fetches.) Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: fix tess/gs fetchs for new swizzle.Dave Airlie2018-08-311-5/+8
| | | | | | | | I have piglit results from my machine, but I must have messed up, and not built mesa in between properly. Fixes: bb17ae49ee2 (gallivm: allow to pass two swizzles into fetches.) Reviewed-by: Marek Olšák <[email protected]>
* mesa: ignore VAO IDs equal to 0 in glDeleteVertexArraysMarek Olšák2018-08-301-0/+4
| | | | | | | | This fixes a firefox crash. Fixes: 781a78914c798dc64005b37c6ca1224ce06803fc Reviewed-by: Ian Romanick <[email protected]>
* Revert "intel/tools/aubwrite: Always use physical addresses for traces."Kenneth Graunke2018-08-302-13/+11
| | | | | | | | This reverts commit f8cfc7766016d0ff7d52953e7a992b1e77c521d0. This appears to break intel_dump_gpu for Gen9 systems - I can load them in the simulator, but nothing happens. Reverting the patch makes the simulator properly execute our commands and shaders again.
* intel/nir: Lowering image loads and stores trashes all metadataJason Ekstrand2018-08-301-2/+2
| | | | | | | | | | | This fixes the GL_ARB_fragment_shader_interlock piglit test on gen8 platforms where the lack of metadata dirtying was causing another pass to accidentally delete a much needed loop. https://bugs.freedesktop.org/show_bug.cgi?id=107745 Fixes: 37f7983bcca1 "intel/compiler: Do image load/store lowering..." Jason Ekstrand <[email protected]> writes: Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
* i965/screen: Allow modifiers on sRGB formatsJason Ekstrand2018-08-301-3/+11
| | | | | | | | | | | | | | | | | | | This effectively reverts a26693493570a9d0f0fba1be617e01ee7bfff4db which was a misguided attempt at protecting intel_query_dma_buf_modifiers from invalid formats. Unfortunately, in some internal EGL cases, we can get an SRGB format validly in this function. Rejecting such formats caused us to not allow CCS in some cases where we should have been allowing it. This regressed the performance of some SynMark tests as well as GfxBench ALU2, Tessellation and Manhattan 3.0 tests There's some question of whether or not we really should be using SRGB "fourcc" formats that aren't actually in drm_foucc.h but there's not much harm in allowing them through here. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107223 Fixes: a26693493570 "i965/screen: Return false for unsupported..." Tested-By: Eero Tamminen <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* egl/dri2: Guard against invalid fourcc formatsJason Ekstrand2018-08-301-0/+15
| | | | | | | | | | | | We already reject attempts to import images with invalid fourcc formats but don't really guard the queries all that well. This makes us error out in any calls to eglQueryDmaBufModifiersEXT if the given format is not a valid fourcc format. We also add an assert to ensure that drivers don't advertise any non-fourcc formats. Cc: [email protected] Tested-By: Eero Tamminen <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* egl/dri2: Add a helper for the number of planes for a FOURCC formatJason Ekstrand2018-08-301-11/+21
| | | | | | | | | This also serves as a convenient "is this a fourcc format" check as well which we'll take advantage of in the next commit. Cc: [email protected] Tested-By: Eero Tamminen <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* radv/meta: Set num_components on image_store intrinsicsJason Ekstrand2018-08-303-0/+6
| | | | | | | | | | | | Now that image load/store intrinsics are variable-width, we need to set num_components accordingly. In 15d39f474b890, both glsl_to_nir and spirv_to_nir were updated to properly set num_components but radv meta was left behind. Fixes: 15d39f474b890 "nir: Make image load/store intrinsics..." Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Bas Nieuwenhuizen <[email protected]>
* gallivm: Detect VSX separately from AltivecVicki Pfau2018-08-303-19/+17
| | | | | | | | | | Previously gallivm would attempt to use VSX instructions on all systems where it detected that Altivec is supported; however, VSX was added to POWER long after Altivec, causing lots of crashes on older POWER/PPC hardware, e.g. PPC Macs. By detecting VSX separately from Altivec we can automatically disable it on hardware that supports Altivec but not VSX Signed-off-by: Vicki Pfau <[email protected]>
* nv50: bump compat glsl level to same as coreIlia Mirkin2018-08-291-1/+1
| | | | | | | Passes the compat piglits. I'm sure that there will be odd issues that aren't caught by them, but at least it should basically work. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: bump compat GLSL version to match coreIlia Mirkin2018-08-291-1/+1
| | | | | | This passes the handful of tests in piglit. Signed-off-by: Ilia Mirkin <[email protected]>
* glsl: avoid lowering texcoord array except in simple casesIlia Mirkin2018-08-291-0/+6
| | | | | | | | | With compat creeping up to geometry and tess shaders, lowering texcoord accesses/writes becomes more complicated. Since it's an optimization anyways, just avoid the complication for now. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* docs: update calendar 18.2.0-rc5 is out, extend to 18.2.0-rc6Andres Gomez2018-08-301-2/+2
| | | | Signed-off-by: Andres Gomez <[email protected]>
* st/mesa, gallium: add a workaround for No Mans SkyTimothy Arceri2018-08-306-0/+13
| | | | | | | | The spec seems clear this is not allowed but the Nvidia binary forces apps to add layout qualifiers so this works around the issue for No Mans Sky until the CTS can be sorted out. Reviewed-by: Marek Olšák <[email protected]>
* glsl: add a mechanism to allow layout qualifiers on function paramsTimothy Arceri2018-08-304-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spec is quite clear this is not allowed: From Section 4.4. (Layout Qualifiers) of the GLSL 4.60 spec: "Layout qualifiers can appear in several forms of declaration. They can appear as part of an interface block definition or block member, as shown in the grammar in the previous section. They can also appear with just an interface-qualifier to establish layouts of other declarations made with that qualifier: layout-qualifier interface-qualifier ; Or, they can appear with an individual variable declared with an interface qualifier: layout-qualifier interface-qualifier declaration ;" From Section 4.10 (Memory Qualifiers) of the GLSL 4.60 spec: "Layout qualifiers cannot be used on formal function parameters, and layout qualification is not included in parameter matching." However on the Nvidia binary driver they actually fail to compile if image function params don't have a layout qualifier. This results in applications such as No Mans Sky using layout qualifiers on params. I've submitted a CTS test to expose this problem in the Nvidia driver but until that is resolved this patch will help Mesa drivers work around the issue. Reviewed-by: Marek Olšák <[email protected]>
* glsl: skip stringification in preprocessor if in unreachable branchTimothy Arceri2018-08-301-2/+4
| | | | | | | This fixes compilation of some "No Mans Sky" shaders where the stringification happens in branches intended for DX12. Reviewed-by: Ian Romanick <[email protected]>
* radv: Add missing checks in radv_get_image_format_properties.Bas Nieuwenhuizen2018-08-301-0/+19
| | | | | CC: <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* gallivm: allow to pass two swizzles into fetches.Dave Airlie2018-08-304-41/+79
| | | | | | | | | | | | This hijacks the top 16-bits of swizzle, to pass in the swizzle for the second channel. This fixes handling .yx swizzles of 64-bit values. This should fixup radeonsi and llvmpipe. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107524 Reviewed-by: Marek Olšák <[email protected]>
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