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* meta: Refactor configuration of renderbuffer samplingTopi Pohjolainen2014-05-122-13/+30
* meta: Refactor binding of renderbuffer as texture imageTopi Pohjolainen2014-05-122-30/+47
* meta: Merge compiling and linking of blit programTopi Pohjolainen2014-05-123-31/+39
* i965/blorp: Expose coordinate scissoring and mirroringTopi Pohjolainen2014-05-124-118/+213
* i965/gen8: Use helper variables for surface parametersTopi Pohjolainen2014-05-121-4/+8
* nv50,nvc0: fix blit 3d path for 1d array texturesIlia Mirkin2014-05-111-0/+6
* nv50,nvc0: leave queries on during blit, turn them on for 2d engineIlia Mirkin2014-05-116-6/+35
* mesa/st: leave current query enabled during glBlitFramebufferIlia Mirkin2014-05-113-0/+4
* gallium: add bit to pipe_blit_info to leave current query enabledIlia Mirkin2014-05-111-0/+3
* nv50: fix setting of texture ms info to be per-stageIlia Mirkin2014-05-113-6/+10
* nv50/ir: make sure to reverse cond codes on all the OP_SET variantsIlia Mirkin2014-05-111-1/+2
* freedreno/a2xx: fix compiler warningRob Clark2014-05-111-1/+1
* radeonsi: prepare depth export registers at compile timeMarek Olšák2014-05-103-14/+14
* radeonsi: simplify depth/stencil export codeMarek Olšák2014-05-101-11/+5
* radeon/llvm: add support for non-scalar system valuesMarek Olšák2014-05-101-0/+6
* radeonsi: add and use a helper function for loading constantsMarek Olšák2014-05-101-19/+19
* radeonsi: only count CS space for state atoms if we're going to drawMarek Olšák2014-05-101-5/+5
* radeonsi: remove unused variable exports_ps in si_pipe_shader_psMarek Olšák2014-05-101-12/+1
* radeonsi: use DRAW_PREAMBLE on CIKMarek Olšák2014-05-102-5/+10
* r600g: simplify framebuffer state size computationMarek Olšák2014-05-101-26/+4
* Revert "i965: Fix depth (array slices) computation for 1D_ARRAY render targets."Kenneth Graunke2014-05-092-5/+0
* egl_dri2: cleanup memory leak in dri2_create_context()Emil Velikov2014-05-101-2/+3
* ilo: destroy the mutex, if winsys creation failsEmil Velikov2014-05-101-0/+1
* glx/tests: Partially revert commit 51e3569573a7b3f8da0df093836761003fcdc414Emil Velikov2014-05-101-3/+3
* configure: error out if building GBM without driEmil Velikov2014-05-101-0/+7
* mesa: propagate FragDepthLayout to gl_programChia-I Wu2014-05-091-0/+5
* glsl: Rename linker's is_varying_varChris Forbes2014-05-101-3/+3
* i965: Fix GPU hangs on Broadwell in shaders with some control flow.Kenneth Graunke2014-05-091-7/+7
* radeonsi: Enable geometry shaders with LLVM 3.4.1Tom Stellard2014-05-094-9/+13
* configure.ac: Add LLVM_VERSION_PATCH to DEFINESTom Stellard2014-05-091-1/+7
* docs: Import 10.1.3 release notes, andd news item.Carl Worth2014-05-092-0/+10
* st/xa: Fix performance regression introduced by commit "Cache render target s...Thomas Hellstrom2014-05-091-1/+1
* clover: Destory pipe_screen when device does not support compute v2Tom Stellard2014-05-091-1/+4
* pipe-loader: Don't destroy the winsys in the sw loaderTom Stellard2014-05-091-3/+0
* i965/Gen8: Set up layer constraints properly for depth buffersChris Forbes2014-05-091-9/+6
* i965/Gen7: Set up layer constraints properly for depth buffersChris Forbes2014-05-091-9/+6
* i965/Gen8: Set up layer constraints properly for renderbuffersChris Forbes2014-05-091-10/+5
* i965/Gen7: Set up layer constraints properly for renderbuffersChris Forbes2014-05-091-10/+7
* i965: Fix typo in assert messageChris Forbes2014-05-091-1/+1
* radeonsi: Don't use anonymous struct trick in atom trackingAdam Jackson2014-05-086-10/+10
* llvmpipe: change LP_MAX_SHADER_INSTRUCTIONS limit definition.Roland Scheidegger2014-05-081-1/+3
* draw: do not use draw_get_option_use_llvm() inside draw execution pathsRoland Scheidegger2014-05-085-12/+12
* i965: Fix depth (array slices) computation for 1D_ARRAY render targets.Kenneth Graunke2014-05-072-0/+5
* mesa: Fix MaxNumLayers for 1D array textures.Kenneth Graunke2014-05-071-0/+2
* i965: Enable GL_ARB_texture_view on Broadwell.Kenneth Graunke2014-05-072-12/+21
* mesa: pass target through to driver when choosing texture formatIlia Mirkin2014-05-071-1/+1
* nv50/ir/gk110: fix set with f32 destIlia Mirkin2014-05-071-0/+3
* nv50/ir: allow load propagation when flags are definedIlia Mirkin2014-05-071-3/+4
* mesa/st: pass 4-offset TG4 without lowering if supportedIlia Mirkin2014-05-071-14/+41
* gallium: add a cap for supporting 4-offset TG4 opcodesIlia Mirkin2014-05-0714-6/+21
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