summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* radeonsi: move PA_SU_POLY_OFFSET_DB_FMT_CNTL to poly offset statesAxel Davy2016-06-251-23/+8
| | | | | | | | | Emit PA_SU_POLY_OFFSET_DB_FMT_CNTL with rasterizer poly_offset states. This will be useful to implement PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium: Add a cap for offset_units_unscaledAxel Davy2016-06-2519-0/+31
| | | | | | | | | | | | | | D3D9 has a different behaviour for depth bias. For OGL/D3D1X, the depth bias unit is the minimal resolvable value for the depth buffer, which depends on the format (and has different behaviour for float depth buffers). For D3D9, the depth bias unit is 1.0f. Signed-off-by: Axel Davy <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* i965: Skip update_texture_surface when the plane doesn't existJordan Justen2016-06-243-29/+26
| | | | | | | | | Reported-by: Grazvydas Ignotas <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96607 Signed-off-by: Jordan Justen <[email protected]> Cc: Kristian Høgsberg <[email protected]> Cc: "12.0" <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* i965: Validate a few SEND-from-GRF requirements.Kenneth Graunke2016-06-241-0/+18
| | | | | | | | | We recently had a mistake where we emitted SEND instructions with EOT set, but from g107 rather than g112-g127. Adding validation code should prevent these sorts of problems from slipping back in. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Delete send-from-GRF only opcodes from implied_mrf_writes().Kenneth Graunke2016-06-241-19/+0
| | | | | | | | | These only exist post-Sandybridge, and always use send-from-GRF. So inst->base_mrf will be -1, and we will have already returned 0. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Drop unnecessary inst->base_mrf = -1 assignments.Kenneth Graunke2016-06-242-16/+0
| | | | | | | | These are now unnecessary, as base_mrf is -1 by default. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Set fs_inst::base_mrf = -1 by default.Kenneth Graunke2016-06-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | On MRF platforms, we need to set base_mrf to the first MRF value we'd like to use for the message. On send-from-GRF platforms, we set it to -1 to indicate that the operation doesn't use MRFs. As MRF platforms are becoming increasingly a thing of the past, we've forgotten to bother with this. It makes more sense to set it to -1 by default, so we don't have to think about it for new code. I searched the code for every instance of 'mlen =' in brw_fs*cpp, and it appears that all MRF-based messages correctly program a base_mrf. Forgetting to set base_mrf = -1 can confuse the register allocator, causing it to think we have a large fake-MRF region. This ends up moving the send-with-EOT registers earlier, sometimes even out of the g112-g127 range, which is illegal. For example, this fixes illegal sends in Piglit's arb_gpu_shader_fp64-layout-std430-fp64-shader, which had SSBO messages with mlen > 0 but base_mrf == 0. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Francisco Jerez <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Drop unused return value from intel_finalize_mipmap_tree().Kenneth Graunke2016-06-242-7/+5
| | | | | | | | | | | | The old return type of GLuint was wonky - it should have been bool. But nothing actually uses the return value anyway, so we can just drop that and make it a void function. In theory, it might make sense to ask whether the texture validated successfully, but just checking intel_obj->mt != NULL works for that. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Move contents of brw_tex.c into intel_tex_validate.c.Kenneth Graunke2016-06-244-58/+20
| | | | | | | | | | | brw_tex.c is a tiny file containing a single function. It's closely tied to the validation logic in intel_tex_validate.c, so it makes sense to put both in the same file. While we're at it, update the function to our modern style. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* radeonsi: fix fractional odd tessellation spacing for PolarisMarek Olšák2016-06-244-1/+23
| | | | | | | ported from Vulkan (and no source explains why this is needed) Cc: 12.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set some VGT context registers on SI-CIMarek Olšák2016-06-241-0/+3
| | | | | | the kernel sets them, but other UMDs can change them Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: optimize rendering to linear color buffersMarek Olšák2016-06-242-1/+12
| | | | | | loosely ported from Vulkan Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set almost optimal settings in SC_MODE_CNTL_1Marek Olšák2016-06-241-1/+10
| | | | | | ported from Vulkan Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: let drivers specify SC_MODE_CNTL_1 fieldsMarek Olšák2016-06-244-10/+18
| | | | | | radeonsi will set more fields Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/radeon: disable complicated point clipping against user clip planesMarek Olšák2016-06-243-3/+0
| | | | | | Nothing in the GL spec says that we should expand points to triangles. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix a compute shader hang with big threadgroups on SI & CIMarek Olšák2016-06-241-0/+18
| | | | | | | ported from Vulkan Cc: 12.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* nvc0: when mapping directly, provide accurate xfer info + startIlia Mirkin2016-06-241-5/+12
| | | | | | | | | | We were ignoring the incoming box parameters, and were providing totally bogus stride/layer stride, and other bits, for when a non-full-surface map was requested. Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Samuel Pitoiset <[email protected]> Cc: <[email protected]>
* st/mesa: don't assume that the whole surface gets mappedIlia Mirkin2016-06-241-7/+6
| | | | | | | | | | Under some circumstances, the driver may choose to return a temporary surface instead of a pointer to the original. Make sure to pass the actual view volume to be mapped to the transfer function rather than adjusting the map pointer after-the-fact. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: drop the DRAW_PREAMBLE packet on PolarisNicolai Hähnle2016-06-242-1/+28
| | | | | | | | It will be removed from the firmware for the Polaris. Cc: 12.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: use DRAW_(INDEX_)INDIRECT_MULTI on PolarisNicolai Hähnle2016-06-241-10/+36
| | | | | | | | The non-MULTI variants will be removed in Polaris firmware. Cc: 12.0 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: handle negative _ColorDrawBufferIndexes values correctlyFrancesco Ansanelli2016-06-241-1/+1
| | | | Signed-off-by: Marek Olšák <[email protected]>
* winsys/radeon: add guard pages when R600_DEBUG=check_vm is enabledNicolai Hähnle2016-06-243-2/+7
| | | | | | This should help flush out GPU VM faults. Reviewed-by: Marek Olšák <[email protected]>
* winsys/amdgpu: add guard pages when R600_DEBUG=check_vm is enabledNicolai Hähnle2016-06-243-2/+8
| | | | | | This should help flush out GPU VM faults. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: report a failure to parse dmesg instead of assertingNicolai Hähnle2016-06-241-1/+6
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeon: check VM faults from DMA flushNicolai Hähnle2016-06-245-6/+68
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: move gfx fence wait out of si_check_vm_faultsNicolai Hähnle2016-06-242-6/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: extract IB and bo list saving into separate functionsNicolai Hähnle2016-06-246-54/+88
| | | | Reviewed-by: Marek Olšák <[email protected]>
* st/mesa: fix readpixels regression with MESA_pack_invertNicolai Hähnle2016-06-241-1/+1
| | | | | | | | Fixes an error introduced in commit 3948cd37973696dc319170877382676809659465. Reported-by: Marek Olšák <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: set LLVM denormal flagsMarek Olšák2016-06-241-2/+5
| | | | | | | | | - make sure FP32 denormals will stay disabled in LLVM in the future (the current default is disabled) - tell LLVM that FP64 denormals are enabled Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: emit 1/sqrt for RSQMarek Olšák2016-06-241-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need the clamped version and we don't have to use any intrinsic. Stats on Tonga: 15382 shaders in 9128 tests Totals: SGPRS: 1230560 -> 1230560 (0.00 %) VGPRS: 469577 -> 462504 (-1.51 %) Code Size: 22089908 -> 21730052 (-1.63 %) bytes LDS: 598 -> 598 (0.00 %) blocks Scratch: 283648 -> 281600 (-0.72 %) bytes per wave Max Waves: 125664 -> 126969 (1.04 %) Wait states: 0 -> 0 (0.00 %) Totals from affected shaders: SGPRS: 547280 -> 547280 (0.00 %) VGPRS: 269132 -> 262059 (-2.63 %) Code Size: 15709604 -> 15349748 (-2.29 %) bytes LDS: 198 -> 198 (0.00 %) blocks Scratch: 74752 -> 72704 (-2.74 %) bytes per wave Max Waves: 47840 -> 49145 (2.73 %) Wait states: 0 -> 0 (0.00 %) Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g: Enable FMA on chips that support itJan Vesely2016-06-242-5/+7
| | | | | | | | | | v2: Merge with PIPE_SHADER_CAP_DOUBLES Add CHIP_HEMLOCK v3: only set the instruction on EG and CM Signed-off-by: Jan Vesely <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* gallium/u_queue: allow the execute function to differ per jobMarek Olšák2016-06-246-15/+18
| | | | | | so that independent types of jobs can use the same queue. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_queue: reduce the number of mutexes by 2Marek Olšák2016-06-242-20/+35
| | | | | | by converting semaphores to condvars and using the main mutex Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_queue: add an option to name threadsMarek Olšák2016-06-244-2/+13
| | | | | | | | for debugging v2: correct the snprintf use Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_queue: add an option to have multiple worker threadsMarek Olšák2016-06-248-23/+71
| | | | | | | | independent jobs don't have to be stuck on only one thread v2: use CALLOC & FREE Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_queue: rewrite util_queue_fence to allow multiple waitersMarek Olšák2016-06-242-16/+43
| | | | | | | | Checking "signalled" is first done without a mutex, then with a mutex. Also, checking without waiting doesn't lock the mutex. This is racy, but should be safe. Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium/u_queue: use a ring instead of a stackMarek Olšák2016-06-244-20/+47
| | | | | | | | and allow specifying its size in util_queue_init. v2: use CALLOC & FREE Reviewed-by: Nicolai Hähnle <[email protected]>
* i965: Preserve the internal format of the dri imageJordan Justen2016-06-231-3/+10
| | | | | | | | | | | | | | | | | | Since the OpenGLES API is strict about the internal format matching the for many operations, we need to preserve it. See _mesa_es3_error_check_format_and_type in src/mesa/main/glformats.c. Fixes ES2-CTS.gtf.GL2ExtensionTests.egl_image.egl_image Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96351 Reported-by: Mark Janes <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Cc: Kristian Høgsberg <[email protected]> Cc: Chad Versace <[email protected]> Cc: "12.0" <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* anv: Add anv_render_pass_attachment::store_opChad Versace2016-06-232-2/+2
| | | | | | | | | | Will be needed for resolving auxiliary surfaces. I didn't add anv_render_pass_attachment::stencil_store_op, as the driver would likely never use it, as stencil surfaces never have auxiliary surfaces. Reviewed-by: Jason Ekstrand <[email protected]>
* gbm: Fix commentsGurkirpal Singh2016-06-231-2/+2
| | | | Reviewed-by: Chad Versace <[email protected]>
* gbm: doc fixesEric Engestrom2016-06-232-4/+4
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* Remove wrongly repeated words in commentsGiuseppe Bilotta2016-06-2346-54/+54
| | | | | | | | | | | | | | | | | Clean up misrepetitions ('if if', 'the the' etc) found throughout the comments. This has been done manually, after grepping case-insensitively for duplicate if, is, the, then, do, for, an, plus a few other typos corrected in fly-by v2: * proper commit message and non-joke title; * replace two 'as is' followed by 'is' to 'as-is'. v3: * 'a integer' => 'an integer' and similar (originally spotted by Jason Ekstrand, I fixed a few other similar ones while at it) Signed-off-by: Giuseppe Bilotta <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* svga: update some comments in svga_buffer_handle()Brian Paul2016-06-231-10/+3
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: add a const qualifier in svga_buffer_upload_piecewise()Brian Paul2016-06-231-1/+1
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: minor code refactor for svga_buffer_upload_command()Brian Paul2016-06-231-5/+21
| | | | | | Put the HBS code into a separate function. Reviewed-by: Charmaine Lee <[email protected]>
* svga: minor code simplification in svga_context_finish()Brian Paul2016-06-231-1/+1
| | | | | | Signed-off-by: Brian Paul <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
* i965: Implement rasterizer discard via SOL unless required for queries.Kenneth Graunke2016-06-232-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | We currently use CL_INVOCATION_COUNT for the GL_PRIMITIVES_GENERATED query, which involves passing all primitives to the clipper. When rasterizer discard is enabled, we program the clipper in REJECT_ALL mode, rather than using the SOL stage's "Rendering Disable" feature. See commit f09b91f78247409f54c975f56cb10d5f350fe64e for an explanation of why we implement GL_PRIMITIVES_GENERATED this way. Apparently the SOL stage's "Rendering Disable" feature is a lot faster than having the clipper reject all primitives. It's safe to use when no GL_PRIMITIVES_GENERATED query is active, as we don't care about CL_INVOCATION_COUNT incrementing. This patch makes us use SO_RENDERING_DISABLE when no query is active, but continues falling back to the clipper in REJECT_ALL mode when the queries are enabled. It brings back the perf_debug for the clipper case (which I removed in commit 1f9445ff57b, thinking it wasn't useful). Improves performance in Gl32GSCloth by 84.8303% +/- 2.07132% (n = 10) on my Broadwell GT2 laptop. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Combine 3DSTATE_STREAMOUT emitters and genX_sol_state atoms.Kenneth Graunke2016-06-234-99/+37
| | | | | | | | | | | They're basically the same. Let's avoid the code duplication. v2: Fix SO_BUFFER_ENABLE stuff to only happen on Gen < 8 (caught by Jason Ekstrand). Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* glsl: Don't constant propagate arrays.Kenneth Graunke2016-06-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Constant propagation on arrays doesn't make a lot of sense. If the array is only accessed with constant indexes, then opt_array_splitting would split it up. Otherwise, we have variable indexing. If there's multiple accesses, then constant propagation would end up replicating the data. The lower_const_arrays_to_uniforms pass creates uniforms for each ir_constant with array type that it encounters. This means that it creates redundant uniforms for each copy of the constant, which means uploading too much data. It can even mean exceeding the maximum number of uniform components, causing link failures. We could try and teach the pass to de-duplicate the data by hashing constants, but it makes more sense to avoid duplicating it in the first place. We should promote constant arrays to uniforms, then propagate the uniform access. Fixes the TressFX shaders from Tomb Raider, which exceeded the maximum number of uniform components by a huge margin and failed to link. On Broadwell: total instructions in shared programs: 9067702 -> 9068202 (0.01%) instructions in affected programs: 10335 -> 10835 (4.84%) helped: 10 (Hoard, Shadow of Mordor, Amnesia: The Dark Descent) HURT: 20 (Natural Selection 2) loops in affected programs: 4 -> 0 The hurt programs appear to no longer have a constarray uniform, as all constants were successfully propagated. Apparently before this patch, we successfully unrolled a loop containing array access, but only after promoting constant arrays to uniforms. With this patch, we unroll it first, so all array access is direct, and the array is split up, and individual constants are propagated. This seems better. Cc: [email protected] Reported-by: Karol Herbst <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* glsl: Make lower_const_arrays_to_uniforms work directly on constants.Kenneth Graunke2016-06-231-8/+3
| | | | | | | | | | | | | There's really no point in looking at ir_dereference_array of a constant. It also misses cases like: (assign () (var_ref tmp) (constant (array ...) ...)) No changes in shader-db, but keeps it working after the next commit. Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>