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* radv/ac: use build_gep0 instead of opencoding it.Dave Airlie2016-12-081-9/+5
| | | | | | Reviewed by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: disable the constant engine (CE) on Carrizo and StoneyMarek Olšák2016-12-081-1/+4
| | | | | | | | It must be disabled until the kernel bug is fixed, and then we'll enable CE based on the DRM version. Cc: 12.0 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: Fix typo: "llvm.fs.interp" => "llvm.SI.fs.interp"Michel Dänzer2016-12-081-1/+1
| | | | | | | | Fixes lots of pixel shaders failing to compile with LLVM 3.9 or older. Trivial. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99013#c4
* radv: make push constants optionalDave Airlie2016-12-071-5/+17
| | | | | | | | We don't set the push constants slot up unless something will cause us to need it. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: only emit descriptor sgprs when neededDave Airlie2016-12-071-25/+26
| | | | | | | | | This only emits enough descriptor sgprs for the number of sets in the layout, and only emits the descriptors necessary for the current stage. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move userdata sgpr ownership to compiler side.Dave Airlie2016-12-073-73/+208
| | | | | | | | | | | | This isn't fully what we want yet, but is a good step on the way. This allows the compiler to create the information structures for the state setting side, however the state setting still expects things to be pretty much in 2 sgpr wide register sets, and can't handle the indirect setting yet. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: refactor out the constant setting user sgpr code.Dave Airlie2016-12-071-18/+17
| | | | | | | | This just refactors out some common code to make future changes easier to understand. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: refactor out the descriptor user sgpr setting.Dave Airlie2016-12-071-18/+18
| | | | | | | This just splits some common code into a utility function. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: only bind descriptor sets to stages that need themDave Airlie2016-12-071-16/+29
| | | | | | | | | This copies the push constant code and only binds descriptor sets to the stages that need them. It also now has to dirty descriptors on pipeline binds. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move descriptor set userdata emission to draw flush time.Dave Airlie2016-12-072-2/+23
| | | | | | | | | | | This is another step towards having the compiler decide the user sgpr layout. This still emits the descriptors sets for all shader types, but we will fix this later. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: refactor descriptor set userdata emission out.Dave Airlie2016-12-071-15/+22
| | | | | | | This just moves this into a separate function. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: pass pipeline to constant flush functionDave Airlie2016-12-071-4/+6
| | | | | | | I'll need this later rather than just the layout. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: consolidate compute pipeline flushing (v1.1)Dave Airlie2016-12-071-12/+14
| | | | | | | | | | This just moves some common code into a utility function to avoid having to change multiple places later. v1.1: rename function to better reflect what it does. (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: wait for outstanding LDS instructions in memory barriers if neededMarek Olšák2016-12-071-1/+17
| | | | | Cc: 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* tgsi: fix the src type of TGSI_OPCODE_MEMBARMarek Olšák2016-12-071-0/+1
| | | | | | | It's a literal integer. The next commit will need this. Cc: 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: wait for outstanding memory instructions in TCS barriersMarek Olšák2016-12-071-1/+5
| | | | | Cc: 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: allow specifying simm16 of emit_waitcnt at call sitesMarek Olšák2016-12-071-5/+7
| | | | | | | The next commit will use this. Cc: 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: write shader descriptors into hang reportsMarek Olšák2016-12-073-0/+117
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: check for sampler state CSO corruptionMarek Olšák2016-12-073-0/+17
| | | | | | | | It really happens. v2: declare "magic" in debug builds only Reviewed-by: Nicolai Hähnle <[email protected]> (v1)
* radeonsi: properly declare context sampler statesMarek Olšák2016-12-073-4/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix incorrect FMASK checking in bind_sampler_statesMarek Olšák2016-12-071-4/+4
| | | | | Cc: 12.0 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: always restore sampler states when unbinding sampler viewsMarek Olšák2016-12-071-3/+8
| | | | | Cc: 12.0 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: take LDS into account for compute shader occupancy statsMarek Olšák2016-12-071-11/+18
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: round lod_bias to a multiple of 1/256Marek Olšák2016-12-071-0/+6
| | | | | | | This reduces the number of sampler states 3.6x in Batman Arkham: Origins. (from ~7200 to ~2000) Reviewed-by: Nicolai Hähnle <[email protected]>
* gallium: decrease the size of pipe_sampler_state fieldsMarek Olšák2016-12-071-3/+3
| | | | | | | | We've had unused bits. Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* cso: don't release sampler states that are boundMarek Olšák2016-12-071-1/+3
| | | | | | | | | | | | | | This fixes random radeonsi GPU hangs in Batman Arkham: Origins (Wine) and probably many other games too. cso_cache deletes sampler states when the cache size is too big and doesn't check which sampler states are bound, causing use-after-free in drivers. Because of that, radeonsi uploaded garbage sampler states and the hardware went bananas. Other drivers may have experienced similar issues. Cc: 12.0 13.0 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* i965: Increase max texture to 16k for gen7+Jordan Justen2016-12-071-3/+10
| | | | | | Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98297 Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/blorp_blit: Add split_blorp_blit_debug switchJordan Justen2016-12-071-3/+9
| | | | | | | | | Enabling this debug switch causes surface shrinking to happen by default, and lowers the surface size limit which causes blorp blits to be split. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/blorp_blit: Enable splitting large blorp blitsJordan Justen2016-12-071-1/+40
| | | | | | | | | | | | | | | | Detect when the surface sizes are too large for a blorp blit. When it is too large, the blorp blit will be split into a smaller operation and attempted again. For gen7, this fixes the cts test: ES3-CTS.gtf.GL3Tests.framebuffer_blit.framebuffer_blit_functionality_multisampled_to_singlesampled_blit It will also enable us to increase our renderable size from 8k x 8k to 16k x 16k. Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/blorp_blit: Move RGB=>R conversion to follow blit splittingJordan Justen2016-12-071-48/+65
| | | | | | | | | | | | | | In blorp_copy, when RGB surfaces are copied, we convert the destination surface to a Red only surface, but 3 times as wide. This introduces an implicit restriction of "mod 3" for the destination width. It is easier to handle the blorp split buffer offsetting with the original RGB surface, and do the RGB=>R after this. Suggested-by: Jason Ekstrand <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/blorp_blit: Adjust blorp surface parameters for split blitsJordan Justen2016-12-071-3/+94
| | | | | | | | | | | | If try_blorp_blit() previously returned that a blit was too large, shrink_surface_params() will be used to update the surface parameters for the smaller blit so the blit operation can proceed. v2: * Use double instead of float. (Jason) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/blorp_blit: Split blorp blits if they are too largeJordan Justen2016-12-071-6/+96
| | | | | | | | | | | | | | | | | | | | | We rename do_blorp_blit() to try_blorp_blit(), and add a return error if the surface size for the blit is too large. Now, do_blorp_blit() is rewritten to try to split the blit into smaller operations if try_blorp_blit() fails. Note: In this commit, try_blorp_blit() will always attempt to blit and never return an error, which matches the previous behavior. We will enable the size checking and splitting in a future commit. The motivation for this splitting is that in some cases when we flatten an image, it's dimensions grow, and this can then exceed the programmable hardware limits. An example is w-tiled+MSAA blits. v2: * Use double instead of float. (Jason) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* intel/blorp_blit: Create structure for src & dst coordinatesJordan Justen2016-12-071-19/+56
| | | | | | | | | | | | | | This will be useful for splitting blits into smaller sizes. We also make the coordinates of type double rather than float. Since we will be splitting and scaling the coordinates, we might require extra precision in the calculations. v2: * Use double instead of float. (Jason) Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* vulkan: use STATIC_ASSERT instead of static_assertEdward O'Callaghan2016-12-073-3/+3
| | | | | | | | Following the spirit of commit 23d1799f, fixes compilation warnings on Android build due to lack of C11 features. Signed-off-by: Edward O'Callaghan <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: enable INTEL_conservative_rasterization on Gen9+Lionel Landwerlin2016-12-076-5/+18
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* mesa: add support for GL_INTEL_conservative_rasterizationLionel Landwerlin2016-12-0713-7/+129
| | | | | Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* i965: Add i965 plumbing for ARB_post_depth_coverage for i965 (gen9+).Plamena Manolova2016-12-076-4/+15
| | | | | | | | | | This extension allows the fragment shader to control whether values in gl_SampleMaskIn[] reflect the coverage after application of the early depth and stencil tests. Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* mesa: Add GL and GLSL plumbing for ARB_post_depth_coverage for i965 (gen9+).Plamena Manolova2016-12-0711-1/+53
| | | | | | | | | This extension allows the fragment shader to control whether values in gl_SampleMaskIn[] reflect the coverage after application of the early depth and stencil tests. Signed-off-by: Plamena Manolova <[email protected]> Reviewed-by: Chris Forbes <[email protected]>
* radeonsi: fix isolines tess factor writes to control ringNicolai Hähnle2016-12-071-4/+12
| | | | | | Fixes piglit arb_tessellation_shader/execution/isoline{_no_tcs}.shader_test. Cc: [email protected]
* i965: Drop redundant key->outputs_written initialization.Kenneth Graunke2016-12-061-2/+0
| | | | | | | This was already set to the same value earlier. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Initialize "separate" flag in VUE maps.Kenneth Graunke2016-12-061-0/+3
| | | | | | | | | | | | This was uninitialized, which resulted in weird looking printouts where it appeared that the TCS output and TES input patch URB entries differed in SSO/non-SSO layout. There is no "separable" layout for both, as they're tied together. It should have no other actual effect. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* nir: In split_var_copies_block, uint, int, and bool types cannot be matricesIan Romanick2016-12-061-3/+5
| | | | | | | | Noticed while adding support for 64-bit integer types. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* radeonsi: Use amdgcn intrinsics for fs interpolationTom Stellard2016-12-071-54/+142
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* freedreno/a5xx: fix draw packet size with index bufferRob Clark2016-12-061-1/+1
| | | | | | gpuaddr of idx buffer is now two dwords (64b). Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: gmem bypass modeRob Clark2016-12-061-0/+72
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix emit_string_marker()Rob Clark2016-12-061-1/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: pitch alignment should match gmem alignmentRob Clark2016-12-065-15/+22
| | | | | | | Deal w/ differing gmem tile size alignment between generations, and make sure texture pitch matches. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: more formatsRob Clark2016-12-061-41/+41
| | | | | | Bunch of stuff we can at least turn on for vbo formats. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix fragfaceRob Clark2016-12-061-2/+4
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix fragcoordRob Clark2016-12-061-4/+11
| | | | Signed-off-by: Rob Clark <[email protected]>
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