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| * progs/vp: print program and error info when program does not compileBrian Paul2009-09-141-0/+6
| * glsl: added some link debug code (disabled)Brian Paul2009-09-141-0/+15
| * docs: document linker/preprocessor bug fixBrian Paul2009-09-141-0/+2
| * glsl: remove extra #version directives from concatenated shader sourcesBrian Paul2009-09-141-0/+28
| * configure: fix commentThierry Vignaud2009-09-141-1/+1
| * Use CFLAGS as HOST_CFLAGS by defaultDan Nicholson2009-09-121-0/+1
| * mesa: raise GL_INVALID_ENUM not GL_INVALID_VALUE for glTexParamter errorsVinson Lee2009-09-111-3/+3
* | gl: restore some PFNGL typedefsBrian Paul2009-09-151-0/+15
* | gallium: Add Mac OS to pipe/p_thread.h.Vinson Lee2009-09-141-5/+5
* | docs: mention the new Gallium llvmpipe driverBrian Paul2009-09-111-0/+4
* | llvmpipe: asst fixes for 'make linux-llvmpipe'Brian Paul2009-09-113-0/+6
* | radeon: Remove structure allocation from iterator variable.Pauli Nieminen2009-09-111-1/+1
* | Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-103-1/+56
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| * docs: document Gallium glDrawPixels(GL_STENCIL_INDEX) fixBrian Paul2009-09-101-0/+1
| * softpipe: minor indentation fixBrian Paul2009-09-101-1/+1
| * softpipe: set dirty_render_cache in softpipe_clear()Brian Paul2009-09-101-0/+2
| * docs: initial 7.5.2 release notes pageBrian Paul2009-09-102-0/+52
* | intel: disable intel_stencil_drawpixels() for nowBrian Paul2009-09-101-0/+16
* | Fix merge failIan Romanick2009-09-101-13/+0
* | tgsi: use new tgsi_call_record to handle execution mask stacksBrian Paul2009-09-102-14/+43
* | mesa: need to set all stencil bits to 0 before setting the 1 bitsBrian Paul2009-09-101-0/+9
* | Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick2009-09-102-1/+6
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| * intel: add B43 chipset supportZhenyu Wang2009-09-102-1/+6
* | i965: Fix relocation delta for WM surfaces.Eric Anholt2009-09-101-1/+1
* | mesa: in texenvprogram code, only do saturation when really needed.Brian Paul2009-09-101-8/+53
* | gallium: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h.Vinson Lee2009-09-101-1/+1
* | radeon: Change debugging code to use macros instead of inline functions.Pauli Nieminen2009-09-102-43/+27
* | mesa: include new u_format.csv file in tarballsBrian Paul2009-09-091-0/+1
* | radeon: Add more verbose error message for failed command buffer.Pauli Nieminen2009-09-091-1/+3
* | Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-098-6/+28
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| * scons: Set default_dri to no for Mac OS.Vinson Lee2009-09-091-2/+2
| * mesa: bump version to 7.5.2Brian Paul2009-09-083-5/+5
| * i965: fix incorrect test for vertex position attributeBrian Paul2009-09-083-1/+4
| * egl: also use X types for building on Apple/MacOS XBrian Paul2009-09-081-1/+2
| * prog/glsl: fix Makefile for samplers_array.Peter Hutterer2009-09-071-1/+1
| * i965: Fix warnings in intel_pixel_read.c.Eric Anholt2009-09-041-0/+4
| * intel: Also get the DRI2 front buffer when doing front buffer reading.Eric Anholt2009-09-044-1/+29
| * intel: Update Mesa state before span setup in glReadPixels.Eric Anholt2009-09-043-3/+13
| * intel: Move intel_pixel_read.c to shared for use with i965.Eric Anholt2009-09-042-306/+307
| * i965: Add missing state dependency of sf_unit on _NEW_BUFFERS.Eric Anholt2009-09-041-2/+4
| * intel: Align cubemap texture height to its padding requirements.Eric Anholt2009-09-041-0/+10
| * intel: Align untiled region height to 2 according to 965 docs.Eric Anholt2009-09-041-0/+7
| * i965: Fix source depth reg setting for FSes reading and writing to depth.Eric Anholt2009-09-043-1/+5
| * i965: Respect CondSwizzle in OPCODE_IF.Eric Anholt2009-09-041-1/+21
| * i965: asst clean-ups, etc in brw_vs_emit()Brian Paul2009-09-041-11/+10
| * i965: Emit conditional code updates as required for GLSL VS if statements.Eric Anholt2009-09-041-0/+13
| * i965: Spell "conditional" correctly.Eric Anholt2009-09-043-15/+15
| * i965: Fix RECT shadow sampling by not losing the other texcoords.Eric Anholt2009-09-041-1/+5
| * i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt2009-09-041-0/+14
| * i965: Even if no VS inputs are set, still load some amount of URB as required.Eric Anholt2009-09-041-0/+11
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