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* anv/meta_clear: Don't trash state if no clears are neededJason Ekstrand2015-11-211-0/+26
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* anv/meta_clear: Don't try to clear depth-stencil without LOAD_OP_CLEARJason Ekstrand2015-11-211-5/+7
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* anv/meta: Add initial support for multi-slice array and 3-D copiesJason Ekstrand2015-11-201-148/+200
| | | | | We still need to fix up a few bits once we have real CPP values, but this should get us a long ways.
* anv/meta: Use array textures for 2DJason Ekstrand2015-11-201-10/+3
| | | | | This a total of 1 extra instruction in the shader and gives us a lot more flexibility in how we do blits.
* anv/meta: Keep z coordinate flat while blittingJason Ekstrand2015-11-201-2/+2
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* nir/spirv: Rework decoration iterationJason Ekstrand2015-11-201-8/+9
| | | | | | The old code didn't work correctly if you had member decorations after non-member decorations. Since glslang never gave us any of those, it wasn't properly tested.
* nir/spirv: Handle OpNopJason Ekstrand2015-11-201-0/+5
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* gen8_state: Clamp sampler values to HW limitationsJason Ekstrand2015-11-202-3/+16
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* nir/spirv: Add support for runtime arraysJason Ekstrand2015-11-201-2/+6
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* gen8/pipeline: Properly handle MIN/MAX blend opsJason Ekstrand2015-11-201-0/+17
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* gen8/pipeline: Set IndependentAlphaBlendEnable properlyJason Ekstrand2015-11-201-0/+6
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* gen8/pipeline: Minor blending fixesJason Ekstrand2015-11-201-2/+4
| | | | This makes various fields match upstream mesa
* anv: Put all of the descriptor set stuff together in one fileJason Ekstrand2015-11-184-464/+504
| | | | | | The stuff to take descriptor sets and turn them into binding tables and sampler tables is still in anv_cmd_buffer.c. We may want to consider putting it in anv_descriptor_set.c eventually.
* anv/device: Update the right sampler in UpdateDescriptorSetsJason Ekstrand2015-11-181-1/+1
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* anv/cmd_buffer: Add a new genX_cmd_buffer file for shared codeJason Ekstrand2015-11-186-449/+286
| | | | | | | | | | | This file contains code that can be shared across gens modulo recompiling. In particular, we can share STATE_BASE_ADDRESS setup and handling of the vkPipelineBarrier call. Not sharing STATE_BASE_ADDRESS setup has already been a source of bugs and the gen7 and gen8 implementations of PipelineBarrier were line-for-line identical. Incidentally, this should fix MOCS settings for dynamic and surface state on Haswell.
* anv/gen7: A bunch of depth-stencil fixesJason Ekstrand2015-11-183-13/+15
| | | | | | There are various bits which move around between Haswell and Ivy Bridge that we weren't taking into account. This also makes us actually set the StencilWriteEnable in a sane way.
* gen7/pipeline: Re-arrange stencil parameters to match gen8Jason Ekstrand2015-11-171-11/+10
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* anv/gen7: Implement CmdPipelineBarrierJason Ekstrand2015-11-171-1/+128
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* anv/gen7: Don't use the upper bound on dynamic state base addressJason Ekstrand2015-11-171-3/+0
| | | | | It doesn't do much for us and, if we have to resize the dynamic state block pool for any reason, it becomes out-of-date.
* anv: Add initial Haswell supportJason Ekstrand2015-11-178-77/+171
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* anv: Add macros for doing per-gen compilationJason Ekstrand2015-11-172-11/+169
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* anv/entrypoints: Add dispatch support for haswellJason Ekstrand2015-11-171-1/+5
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* anv/entrypoints: Use devinfo instead of a gen numberJason Ekstrand2015-11-172-6/+11
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* anv/cmd_buffer: Pack the 3DSTATE_VF packet on-demandJason Ekstrand2015-11-174-16/+12
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* anv/formats: Don't advertise stencil texture/blit prior to BroadwellJason Ekstrand2015-11-171-2/+4
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* anv: Only include the pack headers where neededJason Ekstrand2015-11-1612-27/+46
| | | | | | | Previously, we were including gen7_pack.h, gen75_pack.h, and gen8_pack.h in anv_private.h. As we add more gens, this is going to become untenable. This commit moves things around so that we only use the pack headers when and if we need them.
* anv/cmd_buffer: Move gen-specific stuff into the appropreate filesJason Ekstrand2015-11-164-236/+240
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* nir/spirv: Add support for separate samplers and texturesJason Ekstrand2015-11-142-16/+87
| | | | | | | This gets tricky in a few places because we have to pass vtn_sampled_image values through OpAccessChain, but it works ok. At some point, it probably needs to be cleaned up but it doesn't occur to me exactly how to do that at the moment. We'll see how this approach goes.
* anv/cmd_buffer: Add a default descriptor type caseJason Ekstrand2015-11-141-0/+4
| | | | This silences a bunch of compiler warnings.
* anv/apply_pipeline_layout: Handle separate samplers and texturesJason Ekstrand2015-11-141-17/+73
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* Merge branch 'wip/i965-separate-sampler-tex' into vulkanJason Ekstrand2015-11-1416-74/+181
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| * i965/vec4: Plumb separate surfaces and samplers through from NIRJason Ekstrand2015-11-143-13/+30
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| * i965/vec4: Separate the sampler from the surface in generate_texJason Ekstrand2015-11-141-5/+13
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| * i965/fs: Plumb separate surfaces and samplers through from NIRJason Ekstrand2015-11-146-36/+60
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| * i965/fs: Separate the sampler from the surface in generate_texJason Ekstrand2015-11-142-6/+15
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| * nir: Separate texture from sampler in nir_tex_instrJason Ekstrand2015-11-148-17/+66
| | | | | | | | | | | | | | | | | | This commit adds the capability to NIR to support separate textures and samplers. As it currently stands, glsl_to_nir only sets the sampler and leaves the texture alone as it did before and nir_lower_samplers assumes this. However, backends can, if they wish, assume that they are separate because nir_lower_samplers sets both texture and sampler index (they are the same in this case).
* | Merge remote-tracking branch 'mesa-public/master' into vulkanJason Ekstrand2015-11-14336-4388/+9083
|\| | | | | | | This pulls in Matt's big compiler refactor.
| * nouveau: don't expose HEVC decoding supportIlia Mirkin2015-11-141-0/+1
| | | | | | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Cc: [email protected]
| * nir: Silence GCC maybe-uninitialized warnings.Vinson Lee2015-11-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | nir/nir_control_flow.c: In function ‘split_block_cursor.isra.11’: nir/nir_control_flow.c:460:15: warning: ‘after’ may be used uninitialized in this function [-Wmaybe-uninitialized] *_after = after; ^ nir/nir_control_flow.c:458:16: warning: ‘before’ may be used uninitialized in this function [-Wmaybe-uninitialized] *_before = before; ^ Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
| * i965: Add a SHADER_OPCODE_URB_READ_SIMD8_PER_SLOT opcode.Kenneth Graunke2015-11-134-5/+10
| | | | | | | | | | | | | | | | | | | | | | We need to use per-slot offsets when there's non-uniform indexing, as each SIMD channel could have a different index. We want to use them for any non-constant index (even if uniform), as it lives in the message header instead of the descriptor, allowing us to set offsets in GRFs rather than immediates. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Abdiel Janulgue <[email protected]>
| * glsl: Allow implicit int -> uint conversions for the % operator.Kenneth Graunke2015-11-131-9/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GLSL 4.00 and GL_ARB_gpu_shader5 introduced a new int -> uint implicit conversion rule and updated the rules for modulus to use them. (In earlier languages, none of the implicit conversion rules did anything relevant, so there was no point in applying them.) This allows expressions such as: int foo; uint bar; uint mod = foo % bar; Cc: [email protected] Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
| * i965: Print input/output VUE maps on INTEL_DEBUG=vs, gs.Kenneth Graunke2015-11-134-1/+40
| | | | | | | | | | | | | | | | | | | | | | | | I've been carrying around a patch to do this for the last few months, and it's been exceedingly useful for debugging GS and tessellation problems. I've caught lots of bugs by inspecting the interface expectations of two adjacent stages. It's not that much spam, so I figure we may as well just print it. Signed-off-by: Kenneth Graunke <[email protected]> Acked-by: Matt Turner <[email protected]>
| * i965: Make convert_attr_sources_to_hw_regs handle stride == 0.Kenneth Graunke2015-11-131-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | This makes expressions like component(fs_reg(ATTR, n), 7) get a proper <0,1,0> region instead of the invalid <0,8,0>. Nobody uses this today, but I plan to. v2: Rebase on Matt's changes; simplify. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Matt Turner <[email protected]> [v1]
| * nir: Add helpers for getting input/output intrinsic sources.Kenneth Graunke2015-11-132-0/+45
| | | | | | | | | | | | | | | | | | | | With the many variants of IO intrinsics, particular sources are often in different locations. It's convenient to say "give me the indirect offset" or "give me the vertex index" and have it just work, without having to think about exactly which kind of intrinsic you have. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * nir: Don't lower TCS outputs to temporaries.Kenneth Graunke2015-11-131-0/+3
| | | | | | | | | | | | | | | | We'd like to shadow these when possible, but the current code doesn't work properly for TCS outputs. For now, disable it. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * nir: Allow outputs reads and add the relevant intrinsics.Kenneth Graunke2015-11-134-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Normally, we rely on nir_lower_outputs_to_temporaries to create shadow variables for outputs, buffering the results and writing them all out at the end of the program. However, this is infeasible for tessellation control shader outputs. Tessellation control shaders can generate multiple output vertices, and write per-vertex outputs. These are arrays indexed by the vertex number; each thread only writes one element, but can read any other element - including those being concurrently written by other threads. The barrier() intrinsic synchronizes between threads. Even if we tried to shadow every output element (which is of dubious value), we'd have to read updated values in at barrier() time, which means we need to allow output reads. Most stages should continue using nir_lower_outputs_to_temporaries(), but in theory drivers could choose not to if they really wanted. v2: Rebase to accomodate Jason's review feedback. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * nir/lower_io: Introduce nir_store_per_vertex_output intrinsics.Kenneth Graunke2015-11-133-5/+26
| | | | | | | | | | | | | | | | | | | | | | Similar to nir_load_per_vertex_input, but for outputs. This is not useful in geometry shaders, but will be useful in tessellation shaders. v2: Change stage_uses_per_vertex_outputs() to is_per_vertex_output(), taking a nir_variable (requested by Jason Ekstrand). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * nir/lower_io: Use load_per_vertex_input intrinsics for TCS and TES.Kenneth Graunke2015-11-131-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tessellation control shader inputs are an array indexed by the vertex number, like geometry shader inputs. There aren't per-patch TCS inputs. Tessellation evaluation shaders have both per-vertex and per-patch inputs. Per-vertex inputs get the new intrinsics; per-patch inputs continue to use the ordinary load_input intrinsics, as they already work like we want them to. v2: Change stage_uses_per_vertex_inputs into is_per_vertex_input(), which takes a variable (requested by Jason Ekstrand). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
| * i965: Silence unused parameter warnings in get_buffer_rectIan Romanick2015-11-131-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | brw_meta_fast_clear.c: In function 'get_buffer_rect': brw_meta_fast_clear.c:318:37: warning: unused parameter 'brw' [-Wunused-parameter] get_buffer_rect(struct brw_context *brw, struct gl_framebuffer *fb, ^ brw_meta_fast_clear.c:319:44: warning: unused parameter 'irb' [-Wunused-parameter] struct intel_renderbuffer *irb, struct rect *rect) ^ Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
| * meta/generate_mipmap: Don't leak the sampler objectIan Romanick2015-11-131-0/+2
| | | | | | | | | | | | Signed-off-by: Ian Romanick <[email protected]> Cc: "10.6 11.0" <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
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