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* i965: For color clears, only disable writes to components that exist.Kenneth Graunke2014-03-211-1/+1
* i965: Print number of multisamples in INTEL_DEBUG=blorp output.Kenneth Graunke2014-03-211-4/+4
* i965: Drop BLT TexSubImage Y-tiling restriction on Gen6+.Kenneth Graunke2014-03-211-2/+2
* i965: Enable ARB_vertex_type_10f_11f_11f_rev for Gen4/5 also.Chris Forbes2014-03-221-1/+1
* clover: Fix typo in validate_object()Tom Stellard2014-03-211-1/+1
* llvmpipe: add support for b5g6r5_srgbRoland Scheidegger2014-03-215-9/+61
* gallium: add b5g6r5 srgb formatRoland Scheidegger2014-03-214-4/+21
* nvc0/ir: move sample id to second source arg to fix sampler2DMSIlia Mirkin2014-03-202-4/+12
* st/mesa: drop the lowering of quad strips to triangle stripsMarek Olšák2014-03-211-10/+0
* gallium/u_gen_mipmap: remove the software fallbackMarek Olšák2014-03-211-1160/+2
* st/mesa: fix generating mipmaps for cube arraysMarek Olšák2014-03-212-29/+22
* mesa: fix software fallback for generating mipmaps for 3D texturesMarek Olšák2014-03-211-21/+16
* mesa: fix software fallback for generating mipmaps for cube arraysMarek Olšák2014-03-211-2/+5
* mesa: allow generating mipmaps for cube arraysMarek Olšák2014-03-211-0/+4
* mesa: fix texture border handling for cube arraysMarek Olšák2014-03-211-1/+4
* r600g: use more appropriate names for async DMA functionsMarek Olšák2014-03-205-32/+32
* r600g: deobfuscate async DMA codeMarek Olšák2014-03-206-31/+35
* r600g: don't flush the gfx IB explicitly before doing DMAMarek Olšák2014-03-204-11/+0
* winsys/radeon: only add duplicate relocations for DMA if VM isn't supportedMarek Olšák2014-03-201-10/+13
* radeonsi: Implement DMA blitNiels Ole Salscheider2014-03-206-20/+391
* radeon: Move r600_need_dma_space to common codeNiels Ole Salscheider2014-03-207-15/+15
* llvmpipe: Tighten check for alpha-only formatsRichard Sandiford2014-03-201-1/+1
* nouveau: don't assume libdrm include prefixJonathan Gray2014-03-205-5/+5
* nouveau: use DLOPEN_LIBS instead of -ldlJonathan Gray2014-03-201-1/+1
* c11/threads: don't include assert.h if the assert macro is already definedBrian Paul2014-03-192-0/+4
* nouveau: there may not have been a texture if the fbo was incompleteIlia Mirkin2014-03-191-1/+2
* nouveau: add forgotten GL_COMPRESSED_INTENSITY to texture format listIlia Mirkin2014-03-191-0/+1
* mesa/main: condition GL_DEPTH_STENCIL on ARB_depth_textureIlia Mirkin2014-03-191-8/+3
* loader: add special logic to distinguish nouveau from nouveau_vieuxIlia Mirkin2014-03-195-13/+76
* glsl: Allow dot() on scalars, and throw out dotlike().Matt Turner2014-03-183-11/+5
* glsl: Optimize pow(x, 2) into x * x.Matt Turner2014-03-181-0/+8
* glsl: Match whitespace changes from previous patch.Matt Turner2014-03-181-4/+4
* glsl: Expose pack/unpack built-ins for ARB_gpu_shader5.Matt Turner2014-03-181-9/+17
* i965: Drop some more dead code from the old CACHED_BATCH feature.Eric Anholt2014-03-184-38/+0
* i965: Drop special case for edgeflag thanks to Marek's change to core.Eric Anholt2014-03-181-9/+0
* mesa: include stdbool.h in register_allocate.h to fix buildBrian Paul2014-03-181-0/+2
* i965: Enable EWA anisotropic filtering algorithmIan Romanick2014-03-181-0/+1
* i965: Actually initialize simd16_unsupported and no16_msg.Kenneth Graunke2014-03-181-0/+2
* i965/upload: Refactor open-coded ALIGN-like computations.Kenneth Graunke2014-03-181-3/+9
* i965: Fix indentation in brw_upload_indices().Kenneth Graunke2014-03-181-19/+19
* i965: Consolidate code for setting brw->ib.start_vertex_offset.Kenneth Graunke2014-03-181-9/+6
* i965: Allocate register sets at screen creation, not context creation.Kenneth Graunke2014-03-186-88/+88
* i965: Allocate the screen using ralloc rather than calloc.Kenneth Graunke2014-03-181-2/+3
* ra: Convert another bool array to bitsets.Eric Anholt2014-03-181-6/+7
* ra: Use a bitset for storing which registers belong to a class.Kenneth Graunke2014-03-181-5/+10
* ra: Create a reg_belongs_to_class() helper function.Kenneth Graunke2014-03-181-2/+11
* ra: Use bool instead of GLboolean.Kenneth Graunke2014-03-182-28/+29
* i965: Accurately bail on SIMD16 compiles.Kenneth Graunke2014-03-183-34/+82
* i965/fs: Support pull parameters in SIMD16 mode.Kenneth Graunke2014-03-182-11/+13
* i965/fs: Use a single instance of the pull_constant_loc[] array.Kenneth Graunke2014-03-182-28/+6
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