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* glsl: Properly add functions during lazy built-in prototype importing.Kenneth Graunke2010-12-063-7/+25
| | | | | | | | | | | | The original lazy built-in importing patch did not add the newly created function to the symbol table, nor actually emit it into the IR stream. Adding it to the symbol table is non-trivial since importing occurs when generating some ir_call in a nested scope. A new add_global_function method, backed by new symbol_table code in the previous patch, handles this. Fixes bug #32030.
* symbol_table: Add support for adding a symbol at top-level/global scope.Kenneth Graunke2010-12-062-5/+84
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* glsl: Factor out code which emits a new function into the IR stream.Kenneth Graunke2010-12-062-18/+26
| | | | A future commit will use the newly created function in a second place.
* st/mesa: Unbind all constant buffersJakob Bornecrantz2010-12-061-2/+2
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* r600g: remove useless flush mapJerome Glisse2010-12-062-30/+1
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: avoid useless shader rebuild at draw callJerome Glisse2010-12-067-47/+108
| | | | | | | | | Avoid rebuilding constant shader state at each draw call, factor out spi update that might change at each draw call. Best would be to update spi only when revealent states change (likely only flat shading & sprite point). Signed-off-by: Jerome Glisse <[email protected]>
* r600g: build fetch shader from vertex elementsJerome Glisse2010-12-0611-44/+619
| | | | | | | | | | | | Vertex elements change are less frequent than draw call, those to avoid rebuilding fetch shader to often build the fetch shader along vertex elements. This also allow to move vertex buffer setup out of draw path and make update to it less frequent. Shader update can still be improved to only update SPI regs (based on some rasterizer state like flat shading or point sprite ...). Signed-off-by: Jerome Glisse <[email protected]>
* mesa: Bump the number of bits in the register index.José Fonseca2010-12-061-1/+1
| | | | | | More than 1023 temporaries were being used for a Cinebench shader before doing temporary optimization, causing the index value to wrap around to -1024.
* st/mesa: fix mipmap generation bugBrian Paul2010-12-062-1/+8
| | | | | | | | | | | In st_finalize_texture() we were looking at the st_texture_object:: lastLevel field instead of the pipe_resource::last_level field to determine which resource to store the mipmap in. Then, in st_generate_mipmap() we need to call st_finalize_texture() to make sure the destination resource is properly allocated. These changes fix the broken piglit fbo-generatemipmap-formats test.
* mesa/llvm: use llvm-config --cppflagsBrian Paul2010-12-061-3/+2
| | | | | | | Use --cppflags instead of --cflags so that we get the -I and -D flags we want, but not compiler options like -O3. A similar change should probably be made for autoconf.
* gallium/util: minor formatting fixesBrian Paul2010-12-061-3/+3
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* mesa: add error margin to clip mask debug/check codeBrian Paul2010-12-061-2/+29
| | | | | | | | When X or Y or Z is close to W the outcome of the floating point clip test comparision may be different between the C and x86 asm paths. That's OK; don't report an error. See fd.o bug 32093
* i965: Remove INTEL_DEBUG=glsl_force now that there's no brw_wm_glsl.cEric Anholt2010-12-062-7/+0
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* i965: Nuke brw_wm_glsl.c.Eric Anholt2010-12-068-1057/+10
| | | | | | | | | | It was only used for gen6 fragment programs (not GLSL shaders) at this point, and it was clearly unsuited to the task -- missing opcodes, corrupted texturing, and assertion failures hit various applications of all sorts. It was easier to patch up the non-glsl for remaining gen6 changes than to make brw_wm_glsl.c complete. Bug #30530
* i965: Add support for the instruction compression bits on gen6.Eric Anholt2010-12-064-47/+91
| | | | | | Since the 8-wide first-quarter and 16-wide first-half have the same bit encoding, we now need to track "do you want instruction compression" in the compile state.
* i965: Align gen6 push constant size to dispatch width.Eric Anholt2010-12-061-1/+2
| | | | | | | The FS backend is fine with register level granularity. But for the brw_wm_emit.c backend, it expects pairs of regs to be used for the constants, because the whole world is pairs of regs. If an odd number got used, we went looking for interpolation in the wrong place.
* i965: Make the sampler's implied move on gen6 be a raw move.Eric Anholt2010-12-061-1/+1
| | | | We were accidentally doing a float-to-uint conversion.
* i965: Fix up gen6 samplers for their usage by brw_wm_emit.cEric Anholt2010-12-061-7/+9
| | | | | We were trying to do the implied move even when we'd already manually moved the real header in place.
* i965: Fix gen6 interpolation setup for 16-wide.Eric Anholt2010-12-061-15/+26
| | | | | | In the SF and brw_fs.cpp fixes to set up interpolation sanely on gen6, the setup for 16-wide interpolation was left behind. This brings relative sanity to that path too.
* i965: Don't smash a group of coordinates doing gen6 16-wide sampler headers.Eric Anholt2010-12-061-0/+1
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* i965: Fix up 16-wide gen6 FB writes after various refactoring.Eric Anholt2010-12-061-9/+8
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* i965: Provide delta_xy reg to gen6 non-GLSL path PINTERP.Eric Anholt2010-12-061-8/+6
| | | | Fixes many assertion failures in that path.
* i965: Move payload reg setup to compile, not lookup time.Eric Anholt2010-12-069-110/+118
| | | | | | | | Payload reg setup on gen6 depends more on the dispatch width as well as the uses_depth, computes_depth, and other flags. That's something we want to decide at compile time, not at cache lookup. As a bonus, the fragment shader program cache lookup should be cheaper now that there's less to compute for the hash key.
* mapi: Rewrite mapi_abi.py to get rid of preprocessor magic.Chia-I Wu2010-12-0613-395/+346
| | | | | | | | The preprocessor magic in mapi was nothing but obfuscation. Rewrite mapi_abi.py to generate real C code. This commit removes the hack added in 43121f20866bb89e8dac92bd92ec85a943704b7e.
* egl: _eglFilterArray should not allocate.Chia-I Wu2010-12-064-24/+47
| | | | | Otherwise, when it is called from within a driver, the caller cannot free the returned data (on Windows).
* i965: Fix GS state uploading on SandybridgeZhenyu Wang2010-12-062-5/+14
| | | | | | | | Need to check the required primitive type for GS on Sandybridge, and when GS is disabled, the new state has to be issued too, instead of only updating URB state with no GS entry, that caused hang on Sandybridge. This fixes hang issue during conformance suite testing.
* i965: fix for flat shading on SandybridgeXiang, Haihao2010-12-061-2/+9
| | | | | use constant interpolation instead of linear interpolation for attributes COL0,COL1 if GL_FLAT is used. This fixes mesa demo bounce.
* r600g: Cleanup fetch shader resources in r600_pipe_shader_destroy().Henri Verbeet2010-12-051-0/+5
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* r600g: Cleanup block bo references in r600_context_fini().Henri Verbeet2010-12-051-0/+3
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* st/mesa: initialize key in st_vp_varientMarek Olšák2010-12-051-0/+2
| | | | | | | | | This fixes endless vertex shader recompilations in find_translated_vp if the shader contains an edge flag output. NOTE: This is a candidate for the 7.9 branch. Signed-off-by Brian Paul <[email protected]>
* gallium/trace: check bind_vertex_sampler_states and set_vertex_sampler_viewsXavier Chantry2010-12-051-0/+6
| | | | | | Signed-off-by: Xavier Chantry <[email protected]> Reviewed-by: Jakob Bornecrantz <wallbraker at gmail.com> Signed-off-by: Patrice Mandin <[email protected]>
* init ps->context with util_surfaces_get and do_getXavier Chantry2010-12-054-14/+16
| | | | | | Signed-off-by: Xavier Chantry <[email protected]> Reviewed-by: Jakob Bornecrantz <wallbraker at gmail.com> Signed-off-by: Patrice Mandin <[email protected]>
* nvfx: fixes after array textures mergeXavier Chantry2010-12-054-19/+35
| | | | | Signed-off-by: Xavier Chantry <[email protected]> Signed-off-by: Patrice Mandin <[email protected]>
* r300g: optimize looping over atomsMarek Olšák2010-12-0513-119/+121
| | | | This also removes DBG_STATS (the stats can be obtained with valgrind instead).
* r300g: cleanup winsysMarek Olšák2010-12-0517-640/+456
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* r300g: try and use all of vertex constant spaceDave Airlie2010-12-054-47/+62
| | | | | | | | | | Finished up by Marek Olšák. We can set the constant space to use a different area per-call to the shader, we can avoid flushing the PVS as often as we do by spreading out the constants across the whole constant space. Signed-off-by: Marek Olšák <[email protected]>
* r300g: do not use the index parameter in set_constant_bufferMarek Olšák2010-12-051-2/+1
| | | | | | It appears to be a constant buffer index (in case there are more constant buffers explicitly used by a shader), i.e. something that Gallium currently does not use. We treated it incorrectly as the offset to a constant buffer.
* gallium/noop: Add prototype for noop_init_state_functions.Vinson Lee2010-12-041-0/+2
| | | | | | Silences this GCC warning. noop_state.c:247: warning: no previous prototype for 'noop_init_state_functions'
* i965: Fix compile warning about missing opcodes.Eric Anholt2010-12-041-0/+5
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* i965: Update gen6 SF state on fragment program change too.Eric Anholt2010-12-041-1/+3
| | | | | SF state depends on what inputs there are to the fragment program, not just the outputs of the VS.
* i965: Update gen6 WM state on compiled program change, not just FP change.Eric Anholt2010-12-041-1/+3
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* intel: Add an env var override to execute for a different GPU revision.Eric Anholt2010-12-044-9/+15
| | | | | | | Sometimes I'm on the train and want to just read what's generated under INTEL_DEBUG=vs,wm for some code on another generation. Or, for the next gen enablement we'll want to dump aub files before we have the actual hardware. This will let us do that.
* st/vega: Fix pipe blend state for various blend modes.Chia-I Wu2010-12-043-60/+76
| | | | | | | | | rgb_src_factor and rgb_dst_factor should be PIPE_BLENDFACTOR_ONE for VG_BLEND_SRC_IN and VG_BLEND_DST_IN respectively. VG_BLEND_SRC_OVER can be supported only when the fb has no alpha channel. VG_BLEND_DST_OVER and VG_BLEND_ADDITIVE have to be supported with a shader. Note that Porter-Duff blending rules assume premultiplied alpha.
* st/vega: Add blend shaders for all blend modes.Chia-I Wu2010-12-044-72/+145
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* st/vega: Fix VG_BLEND_MULTIPLY.Chia-I Wu2010-12-041-1/+1
| | | | | TEMP[1].w will be needed for OUT.w just below. Use TEMP[0] to store the intermediate value.
* mesa: Clean up header file inclusion in texobj.h.Vinson Lee2010-12-041-1/+2
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* mesa: Clean up header file inclusion in texgetimage.h.Vinson Lee2010-12-041-1/+5
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* mesa: Clean up header file inclusion in texformat.h.Vinson Lee2010-12-041-1/+1
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* mesa: Clean up header file inclusion in texenvprogram.h.Vinson Lee2010-12-041-1/+1
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* mesa: Clean up header file inclusion in texcompress_s3tc.h.Vinson Lee2010-12-041-1/+5
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