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* vc4: Avoid reusing a pointer from c->outputs[] after add_output().Eric Anholt2014-11-121-5/+6
| | | | add_output() can resize the qreg array, so we might use a stale pointer.
* vc4: Fix assumption of TGSI OUT[0] being POSITION in the VS.Eric Anholt2014-11-121-5/+5
| | | | | | | | All the shaders we've received so far had this be the case, but with nir-to-tgsi that changed. I might decide to make nir-to-tgsi keep the outputs in the same order, for debugging sanity, but I'm not sure.
* nvc0: remove unused mm_VRAM_fe0Ilia Mirkin2014-11-122-9/+0
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* st/glx: Implement GLX_EXT_create_context_es2_profile.José Fonseca2014-11-122-37/+54
| | | | | | | | apitrace now supports it, and it makes it much easier to test tracing/replaying on OpenGL ES contexts since GLX_EXT_create_context_{es2,es}_profile are widely available. Reviewed-by: Brian Paul <[email protected]>
* Revert "clover: Fix build after llvm r221375"Tom Stellard2014-11-121-4/+0
| | | | | | This reverts commit cd93d82ba9ec8cd8e4f54bbee16d7b47c542de71. llvm r221375 was reverted, so this commit needs to be too.
* gallivm: Fix build with LLVM 3.6 (r221751).José Fonseca2014-11-121-1/+10
| | | | | | Tested with LLVM 3.3, 3.4, 3.5, and 3.6. Trivial.
* i965/cfg: Remove if_block/else_block.Matt Turner2014-11-113-30/+1
| | | | | | | | I used these in the SEL peephole, but they require extra tracking and fix ups. The SEL peephole can pretty easily find the blocks it needs without these. Reviewed-by: Jason Ekstrand <[email protected]>
* i965/fs: Don't use if_block/else_block in SEL peephole.Matt Turner2014-11-111-6/+11
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* ilo: clean up gen6_3DSTATE_SF()Chia-I Wu2014-11-113-90/+105
| | | | | | | | | | | Make the helpers fill out valid Gen7 3DSTATE_SF and 3STATE_SBE. This prevents the helpers from having to do dw[0] = GEN7_SBE_DW1_x; // setting DW1 value to dw[0]!? and simplifies gen7_3DSTATE_{SF,SBE}(). Signed-off-by: Chia-I Wu <[email protected]>
* ilo: clean up gen7_3DSTATE_STREAMOUT()Chia-I Wu2014-11-112-45/+35
| | | | | | | Render stream and render enable are independent from so enable. Having a single return point makes it easier to see that. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: rework gen7_3DSTATE_SO_DECL_LIST()Chia-I Wu2014-11-111-60/+66
| | | | | | | Started to make pipe_stream_output_info mandatory, but ended up adding support for stream id and making a workaround Gen7-specific. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add 3DSTATE_SO_BUFFER variantsChia-I Wu2014-11-112-24/+25
| | | | | | Add gen7_disable_3DSTATE_SO_BUFFER() to disable SO buffers. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add gen6_3dstate_constant()Chia-I Wu2014-11-112-84/+67
| | | | | | | It replaces gen6_fill_3dstate_constant(). gen6_3DSTATE_CONSTANT_{VS,GS,PS} are made wrappers of the new function. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_{HS,DS}Chia-I Wu2014-11-112-12/+6
| | | | | | Rename them to gen7_disable_3DSTATE_{HS,DS}() to reflect the fact. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_GSChia-I Wu2014-11-113-63/+100
| | | | | | | Add gen6_so_3DSTATE_GS(), gen6_disable_3DSTATE_GS(), and gen7_disable_3DSTATE_GS() to do SO on GEN6 or to disable GS. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_VSChia-I Wu2014-11-113-16/+22
| | | | | | Add gen6_disable_3DSTATE_VS() to disable VS. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_PSChia-I Wu2014-11-112-36/+41
| | | | | | Add gen7_disable_3DSTATE_PS() to disable PS. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_WMChia-I Wu2014-11-113-54/+61
| | | | | | | Add gen6_hiz_3DSTATE_WM() and gen7_hiz_3DSTATE_WM() for HiZ ops without dispatching. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: add variants of 3DSTATE_CLIPChia-I Wu2014-11-113-24/+32
| | | | | | Add gen6_disable_3DSTATE_CLIP to disable clipping. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: prefix 3DSTATE_VF with gen75Chia-I Wu2014-11-112-4/+4
| | | | | | 3DSTATE_VF is Gen7.5+ only. Signed-off-by: Chia-I Wu <[email protected]>
* st/va: MPEG4 call vlVaDecoderFixMPEG4Startcode()Michael Varga2014-11-101-0/+7
| | | | | | If the VOP and GOV headers were truncated they will be regenerated. Signed-off-by: Michael Varga <[email protected]>
* st/va: MPEG4 generate GOV and VOP headerMichael Varga2014-11-101-0/+92
| | | | | | Also, Implemented a small locally used interface for writing bits to a buffer. Signed-off-by: Michael Varga <[email protected]>
* st/va: MPEG4 populate the SPS structureMichael Varga2014-11-101-0/+6
| | | | Signed-off-by: Michael Varga <[email protected]>
* st/va: MPEG4 populate the iq matrix buffersMichael Varga2014-11-101-0/+16
| | | | Signed-off-by: Michael Varga <[email protected]>
* st/va: MPEG4 populate the PPS structureMichael Varga2014-11-102-0/+81
| | | | Signed-off-by: Michael Varga <[email protected]>
* st/va: refactored handleVASliceDataBufferTypeMichael Varga2014-11-101-35/+40
| | | | | | | This patch cleans the function handleVASliceDataBufferType() for better readability. Signed-off-by: Michael Varga <[email protected]>
* mesa: Remove _mesa_max_buffer_indexIan Romanick2014-11-102-52/+0
| | | | | | | It appears to be completely unused since f9be8543 (February 2012). Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* mesa: Uniform logging is very, very unlikelyIan Romanick2014-11-101-2/+2
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* glsl: Swap the order of glsl_type::name and ::lengthIan Romanick2014-11-102-8/+8
| | | | | | | | | | | | On x86-64 this saves 8 bytes of padding in the structure, and this reduces the size of the structure to 32 bytes. v2: Fix constructor so that GCC won't warn about the order of initialization. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* glsl: Store glsl_type::vector_elements and ::matrix_columns as uint8_tIan Romanick2014-11-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to the total number of bits used in the bitfield, this does not increase the size of the structure. It does, however, reduce the number of instructions required each time one of these fields is accessed. To access ::matrix_columns with the bitfield, three instructions were required: movzbl 0x9(%rdx),%eax shr %al and $0x7,%eax As a uint8_t, only one instruction is required. movzbl 0xa(%rdx),%eax These fields are accessed *a lot*. Valgrind callgrind results for a trace of Tesseract: _mesa_Uniform4fv _mesa_Uniform4f _mesa_Uniform1i Before (64-bit): 48,103,497 16,556,096 676,447 After (64-bit): 45,722,616 15,737,964 670,607 _mesa_Uniform4fv _mesa_Uniform4f _mesa_Uniform1i Before (32-bit): 61,472,611 21,051,222 821,361 After (32-bit): 57,987,421 19,872,226 811,609 Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa: Don't check for API_OPENGLES in _mesa_uniform_matrixIan Romanick2014-11-101-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | There are no uniforms in OpenGL ES 1.x, so we can't even get to this code in that API. Also, reorder the checks. First check that transpose is true, then check whether or not that is legal in the current API. transpose should never be true in an ES2 context, so this gets one check (the more expensive one) out of the main path. Valgrind callgrind results for a trace of Tesseract: _mesa_UniformMatrix4fv _mesa_UniformMatrix3fv Before (64-bit): 96,119,025 24,240,510 After (64-bit): 90,726,569 22,926,662 _mesa_UniformMatrix4fv _mesa_UniformMatrix3fv Before (32-bit): 132,434,452 29,051,808 After (32-bit): 126,658,112 27,989,316 Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa: Rework array error checks in validate_uniform_parametersIan Romanick2014-11-101-19/+22
| | | | | | | | | | | | | | | | | | | | | | Before ARB_explicit_uniform_location, Mesa's location encoding allowed locations for non-array types that had non-zero array indices. Basically, part of the location was the uniform and part was the array index. This meant that some checks had to occur for arrays and non-arrays. This is no longer possible, we the checks can be split up. Valgrind callgrind results for a trace of Tesseract: _mesa_Uniform4fv _mesa_Uniform4f _mesa_Uniform1i Before (64-bit): 50,499,557 17,487,316 686,227 After (64-bit): 50,023,791 17,274,432 684,293 _mesa_Uniform4fv _mesa_Uniform4f _mesa_Uniform1i Before (32-bit): 62,968,039 21,732,380 828,147 After (32-bit): 62,373,967 21,490,756 826,223 Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa: Get some gl_shader_program::LinkStatus checking out of the main pathIan Romanick2014-11-101-6/+19
| | | | | | | | | | I really wanted to remove 'shProg != NULL' as well, but that would have required adding a dummy program as the default program. That seemed like more churn than removing one test was worth. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa: Rework location == -1 error checkingIan Romanick2014-11-101-38/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | Only one caller wanted to generate an error when location == -1, so move the error generation to that caller. There will be more callers in the future that do not want to generate errors. Move the location == -1 check later in validate_uniform_parameters. As currently implemented, glUniform1iv(-1, -1, data) would not generate an error, but it should due to count being < 0. The location that I have moved it to will make more sense with the next commit. Valgrind callgrind results for a trace of Tesseract: _mesa_Uniform4fv _mesa_Uniform4f _mesa_Uniform1i Before (64-bit): 51,241,217 17,740,162 689,181 After (64-bit): 50,499,557 17,487,316 686,227 _mesa_Uniform4fv _mesa_Uniform4f _mesa_Uniform1i Before (32-bit): 63,940,605 21,987,918 831,065 After (32-bit): 62,968,039 21,732,380 828,147 Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa: Minor clean ups in _mesa_uniformIan Romanick2014-11-101-23/+9
| | | | | | Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa: Remove GLSL_TYPE_SAMPLER checkIan Romanick2014-11-101-2/+1
| | | | | | | | | Noting the assertion just a few lines earlier, returnType cannot be GLSL_TYPE_SAMPLER. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* mesa/main: Pass the data that _mesa_uniform actually wantsIan Romanick2014-11-103-119/+54
| | | | | | | | | | The GL_ enums were previously used because glsl_types.h couldn't be used in C code. That was fixed some time ago (and uniforms.c already includes glsl_types.h), so this is no longer necessary. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Tapani Pälli <[email protected]>
* ilo: derive fb blending caps at bind timeChia-I Wu2014-11-103-78/+101
| | | | | | | | Derive whether a RT supports blending, logicop, and the like when set_framebuffer_state() is called. This enables us to simplify gen6_BLEND_STATE(). Signed-off-by: Chia-I Wu <[email protected]>
* ilo: remove inlined state functionsChia-I Wu2014-11-104-236/+177
| | | | | | | We had some inlined state functions for dispatching. They were not needed with the new top/bottom split. Signed-off-by: Chia-I Wu <[email protected]>
* ilo: use top/bottom split for state functionsChia-I Wu2014-11-109-1852/+1856
| | | | | | | Follow the builder and split state functions into top (vertex processing) and bottom (pixel processing). Signed-off-by: Chia-I Wu <[email protected]>
* i965: Advertise a line width of 40.0 on Cherryview and Skylake.Kenneth Graunke2014-11-081-1/+5
| | | | | | | | | According to the documentation, line widths higher than 40.0 may have quality problems. That's already 20 times larger than we've been exposing, so it seems totally sufficient. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Advertise larger line widths.Kenneth Graunke2014-11-081-3/+9
| | | | | | | | | | | | | | | | We've artificially been limiting this to 5 for no particular reason. On Gen4-5, the limit is [0, 7.5] with a granularity of 0.5 (U3.1). On Gen6+, the limit is [0, 7.9921875]. Since it's a U3.7, the granularity should be 0.125 (1/8). This patch conservatively advertises one granularity smaller than the hardware's maximum value, just in case there's a problem using the largest possible value. On Gen4-5, this is 7.5 - 0.5 = 7.0. On Gen6+, this is 8.0 - 0.125 = 7.875. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Use ctx->Const.MaxLineWidth when clamping ctx->Line.Width.Kenneth Graunke2014-11-084-5/+8
| | | | | | | | | | | | Rather than hardcoding platform values in every code path, just use the maximum value we set. Currently, ctx->Const.LineWidth == 5, which is smaller than the hardware limit. But applications shouldn't be using a value larger than we support anyway. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* i965: Set Line Width correctly on Cherryview and Skylake.Kenneth Graunke2014-11-082-1/+6
| | | | | | | Line Width moved to DW1 bits 29:12. It's actually now a U11.7. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]>
* docs: add news item and link release notes for mesa 10.3.3Emil Velikov2014-11-082-0/+7
| | | | Signed-off-by: Emil Velikov <[email protected]>
* docs: Add sha256 sums for the 10.3.3 releaseEmil Velikov2014-11-081-1/+3
| | | | | Signed-off-by: Emil Velikov <[email protected]> (cherry picked from commit 9cc26056ee13f25c5785fef81b31487f1429baa4)
* Add release notes for the 10.3.3 releaseEmil Velikov2014-11-081-0/+207
| | | | | Signed-off-by: Emil Velikov <[email protected]> (cherry picked from commit 1a9cc5f50db5d27530a3449743b43aac389d781f)
* util/format: Fix clamping to 32bit integers.José Fonseca2014-11-081-0/+27
| | | | | | | | | | | | | | | | Use clamping constants that guarantee no integer overflows. As spotted by Chris Forbes. This causes the code to change as: - value |= (uint32_t)CLAMP(src[0], 0.0f, 4294967295.0f); + value |= (uint32_t)CLAMP(src[0], 0.0f, 4294967040.0f); - value |= (uint32_t)((int32_t)CLAMP(src[0], -2147483648.0f, 2147483647.0f)); + value |= (uint32_t)((int32_t)CLAMP(src[0], -2147483648.0f, 2147483520.0f)); Reviewed-by: Roland Scheidegger <[email protected]>
* util/format: Generate floating point constants for clamping.José Fonseca2014-11-081-4/+4
| | | | | | | | | | | | | | | | | | | | | This commit causes the generated C code to change as union util_format_r32g32b32a32_sscaled pixel; - pixel.chan.r = (int32_t)CLAMP(src[0], -2147483648, 2147483647); - pixel.chan.g = (int32_t)CLAMP(src[1], -2147483648, 2147483647); - pixel.chan.b = (int32_t)CLAMP(src[2], -2147483648, 2147483647); - pixel.chan.a = (int32_t)CLAMP(src[3], -2147483648, 2147483647); + pixel.chan.r = (int32_t)CLAMP(src[0], -2147483648.0f, 2147483647.0f); + pixel.chan.g = (int32_t)CLAMP(src[1], -2147483648.0f, 2147483647.0f); + pixel.chan.b = (int32_t)CLAMP(src[2], -2147483648.0f, 2147483647.0f); + pixel.chan.a = (int32_t)CLAMP(src[3], -2147483648.0f, 2147483647.0f); memcpy(dst, &pixel, sizeof pixel); which surprisingly makes a difference for MSVC. Thanks to Juraj Svec for diagnosing this and drafting a fix. Fixes https://bugs.freedesktop.org/show_bug.cgi?id=29661
* glsl/list: Revert unintentional file mode change in previous commit.Vinson Lee2014-11-071-0/+0
| | | | Signed-off-by: Vinson Lee <[email protected]>
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