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* radv: Implement cache flushing for the MEC.Bas Nieuwenhuizen2016-12-181-7/+29
* radv: add semaphore supportDave Airlie2016-12-183-11/+72
* radv: pass queue index into winsys submissionDave Airlie2016-12-183-5/+13
* radv: init compute queue and avoid initing transfer queuesDave Airlie2016-12-183-15/+35
* radv/winsys: Make WaitIdle queue aware.Bas Nieuwenhuizen2016-12-185-21/+38
* radv/meta: update header infoDave Airlie2016-12-181-1/+2
* radv: hook compute clears into clear image api.Dave Airlie2016-12-181-8/+33
* radv: clear image implementation for compute queueDave Airlie2016-12-183-9/+272
* radv/meta: split clear image out into a separate layer clear functionDave Airlie2016-12-181-117/+128
* radv: implement image->image copies using compute shaderDave Airlie2016-12-184-6/+343
* radv: add a compute shader implementation for buffer to imageDave Airlie2016-12-183-6/+325
* radv: Use correct pitch for views with different block size.Bas Nieuwenhuizen2016-12-181-1/+4
* radv: Store queue family in command buffers.Dave Airlie2016-12-182-2/+35
* radv: start fixing up queue allocate for multiple queuesDave Airlie2016-12-182-15/+53
* radv/winsys: start adding support for DMA/compute queueDave Airlie2016-12-181-5/+20
* radv/winsys: Expose number of compute/dma rings.Bas Nieuwenhuizen2016-12-182-2/+15
* freedreno/a5xx: border color supportRob Clark2016-12-181-3/+160
* freedreno/a5xx: use MRT0 to import linear zsRob Clark2016-12-181-5/+20
* freedreno: fdN_gmem_restore_format() is not gen specificRob Clark2016-12-188-50/+25
* freedreno/a5xx: cargo-cult end-batch sequence more faithfullyRob Clark2016-12-184-4/+39
* freedreno/a5xx: misc fixRob Clark2016-12-181-1/+1
* freedreno/a5xx: fix (at least some) vtx formatsRob Clark2016-12-181-1/+1
* freedreno/a5xx: more formatsRob Clark2016-12-181-25/+25
* freedreno/a5xx: fixup capsRob Clark2016-12-182-6/+11
* freedreno/a5xx: fix random faults on first sysmem drawRob Clark2016-12-181-0/+3
* freedreno: update generated headersRob Clark2016-12-186-17/+80
* freedreno/a5xx: fix stride/size for mem->gmem blitsRob Clark2016-12-181-5/+7
* radv/winsys: consolidate request->fence codeDave Airlie2016-12-171-22/+19
* radv: handle fence allocation failingDave Airlie2016-12-171-1/+4
* radv: Don't bail out on pipeline create failure.Bas Nieuwenhuizen2016-12-171-21/+17
* spirv/nir: add support for ImageGatherExtendedIlia Mirkin2016-12-161-7/+69
* anv: Fix uniform and storage buffer offset alignment limits.Francisco Jerez2016-12-161-2/+2
* nir: Remove nir_array from lower_locals_to_regsThomas Helland2016-12-161-9/+0
* swr: Implement fence attached work queues for deferred deletion.Bruce Cherniak2016-12-169-54/+255
* nir: Turn imov/fmov of undef into undefTimothy Arceri2016-12-161-6/+6
* egl/x11: cleanup init codeEric Engestrom2016-12-151-14/+10
* nir/lower_tex: fix number of components in replace_gradient_with_lod()Iago Toral Quiroga2016-12-151-1/+2
* Revert "nir: Turn imov/fmov of undef into undef."Timothy Arceri2016-12-151-3/+1
* i965/vec4: Fix TCS output reads with non-zero component qualifiers.Kenneth Graunke2016-12-141-5/+5
* i965/disasm: Decode dataport constant cache control fields.Francisco Jerez2016-12-141-0/+1
* i965/fs: Remove the FS_OPCODE_SET_SIMD4X2_OFFSET virtual opcode.Francisco Jerez2016-12-144-33/+0
* i965/fs: Drop useless access mode override from pull constant generator code.Francisco Jerez2016-12-141-2/+0
* i965/fs: Fetch one cacheline of pull constants at a time.Francisco Jerez2016-12-142-19/+18
* i965/fs: Expose arbitrary pull constant load sizes to the IR.Francisco Jerez2016-12-144-27/+26
* i965: Factor out oword block read and write message control calculation.Francisco Jerez2016-12-142-12/+8
* i965/fs: Switch to the constant cache for uniform pull constants.Francisco Jerez2016-12-144-91/+36
* i965: Let the caller of brw_set_dp_write/read_message control the target cache.Francisco Jerez2016-12-143-42/+43
* i965/gen6+: Invalidate constant cache on brw_emit_mi_flush().Francisco Jerez2016-12-141-0/+1
* genxml: Make Gen8 3DSTATE_DS SIMD8 enable work like Gen9+.Kenneth Graunke2016-12-141-1/+4
* genxml: Rename "DS Function Enable" to "Function Enable".Kenneth Graunke2016-12-142-2/+2
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