summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* docs: update intro.html to mention new APIs, etcBrian Paul2017-02-091-11/+31
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* docs: the site is now hosted by freedesktop.orgBrian Paul2017-02-091-2/+1
| | | | Reviewed-by: Eric Engestrom <[email protected]>
* radv: Add CPU color packing for VK_FORMAT_A2B10G10R10_UNORM_PACK32.Bas Nieuwenhuizen2017-02-081-2/+6
| | | | | | | | | For allowing fast color clears in the main render targets of dota2. [airlied: fix clear_vals[1] as suggested by Andres. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa: (trivial) include <inttypes.h> for PRIx64 macrosRoland Scheidegger2017-02-081-0/+1
| | | | Fixes a compile error with mingw.
* swr: [rasterizer jitter] Pass LLVM-IR size into jitterTim Rowley2017-02-083-3/+4
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Frontend SIMD16 WIPTim Rowley2017-02-084-293/+331
| | | | | | | | | Removed temporary scafolding in PA, widended the PA_STATE interface for SIMD16, and implemented PA_STATE_CUT and PA_TESS for SIMD16. PA_STATE_CUT and PA_TESS now work in SIMD16. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] Disable unsafe FP optimizations in the jitterTim Rowley2017-02-081-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Frontend SIMD16 WIPTim Rowley2017-02-084-142/+243
| | | | | | | Widen simdvertex to SIMD16/simd16vertex in frontend for passing VS attributes from VS to PA. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] Add DEBUGTRAP jit builder functionTim Rowley2017-02-082-1/+9
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] Multisample blend jit fixTim Rowley2017-02-081-2/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] Change SimdVector representation to arrayTim Rowley2017-02-082-6/+2
| | | | | | | | | | Make all SimdVectors in LLVM represented as simdscalar[4] rather than a struct. Fixes issues with promotion of values from i32 to i64 to match register width. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] Fix issues with stream-out on llvm>=3.8Tim Rowley2017-02-083-6/+6
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] Adjust jitter header includesTim Rowley2017-02-086-11/+11
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] Frontend SIMD16 WIPTim Rowley2017-02-085-43/+813
| | | | | | | | SIMD16 Primitive Assembly (PA) only supports TriList and RectList. CUT_AWARE_PA, TESS, GS, and SO disabled in the SIMD16 front end. Reviewed-by: Bruce Cherniak <[email protected]>
* docs: update package contentsEric Engestrom2017-02-081-2/+2
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* docs: fix unpacking instructionsEric Engestrom2017-02-081-20/+4
| | | | | | | | | | | | File names were wrong, file formats were wrong, bunzip command was wrong... I also removed all but the simplest example; people who use pipes already know how to untar, so let's simplify and remove potential confusion for non-tech-savvy users. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* docs: remove dead 'beta' linkEric Engestrom2017-02-081-1/+2
| | | | | | | | Release candidates haven't been in a 'beta' subdir in a long time, so let's replace the dead link with an explanation instead. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* docs: add a note about the new version schemeEric Engestrom2017-02-081-0/+8
| | | | | Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* r600/sb: Fix memory leakBartosz Tomczyk2017-02-081-1/+7
| | | | Signed-off-by: Marek Olšák <[email protected]>
* mesa: use PRId64/PRIu64 when printing 64-bit intsTimothy Arceri2017-02-081-2/+2
| | | | | | V2: actually use PRIu64 Reviewed-by: Dave Airlie <[email protected]>
* mesa/st: fix strict aliasing issue in int64 code.Dave Airlie2017-02-081-4/+2
| | | | | | | This fixes the int64 code same as the double code. Reviewed-by: Timothy Arceri <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* mesa/uniform: fix strict aliasing issues with int64 code.Dave Airlie2017-02-081-12/+26
| | | | | | | This fixes these like the double version does. Reviewed-by: Timothy Arceri <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: handle dcc in explicit image resolve path. (v2)Dave Airlie2017-02-071-3/+8
| | | | | | | | We need to initialize dcc like we do in the subpass path. v2: fix initial/final layouts Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Enable fast clears by default.Bas Nieuwenhuizen2017-02-073-4/+4
| | | | | | | | Works for me on dota2 and talos now. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]>
* spirv: Add more asserts in vtn_vector_constructJason Ekstrand2017-02-071-0/+15
| | | | | Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99465
* configure.ac: remove src/gallium/winsys/intel/drm/Makefile referenceEmil Velikov2017-02-071-1/+0
| | | | | | | | Not wired up (not referenced in any SUBDIR), leading to `make distcheck' failure. Fixes: d77fa310ed8 "ilo: EOL drop unmaintained gallium drv from buildsys" Signed-off-by: Emil Velikov <[email protected]>
* docs: reword ilo removal noteEmil Velikov2017-02-071-2/+1
| | | | | | | Properly annotate <li> and keep the note analogous to all the previous ones - OpenVG, st/egl, etc. Signed-off-by: Emil Velikov <[email protected]>
* configure.ac: Remove redundant libglvnd stanzaBoyan Ding2017-02-071-49/+32
| | | | | | | | | | | There were two "libglvnd configuration" section in the squashed commit that added libglvnd support, while only one in the original libglvnd branch. A following commit moves one of them downwards. Now remove the upper "older" one and move GL_LIB name decision downwards after the new libglvnd configuration section. Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Boyan Ding <[email protected]>
* travis: use both cores for make/make checkEmil Velikov2017-02-071-0/+1
| | | | | | | | The instance offers 2 cores, so use them to speed things up. v2: Set MAKEFLAGS instead [Eric] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* travis: add nearly all gallium drivers to the listEmil Velikov2017-02-071-2/+2
| | | | | | | | | | | | Note: we need the explicit --enable-freedreno for libdrm since the latter is 'smart' and disables it if building on !arm platforms. The radeonsi and swr are explicitly left out since they require 'too-recent' LLVM - 3.6 Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Andres Gomez <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* travis: correct libdrm required regex to also track libdrm itselfEmil Velikov2017-02-071-1/+1
| | | | | | | | | | | | The current regex was tracking only the libdrm_foo packages, while with recent changed we bumped only (and rightfully so) libdrm. Fix the regex to track any libdrm package. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Andres Gomez <[email protected]> Reviewed-by: Rhys Kidd <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* configure.ac: add swr to the gallium drivers list.Emil Velikov2017-02-071-1/+1
| | | | | | | | v2: Rebase on top of ILO removal. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Andres Gomez <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* configure.ac: list all the dri-drivers in the help stringEmil Velikov2017-02-071-1/+1
| | | | | | | | | | | It's unlikely that any of the additions come as a suprise to anyone i915, nouveau, radeon, r200. Regardless, state clearly what's available. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Andres Gomez <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* glsl: correct compute shader checks for memoryBarrier functionsMarc Di Luzio2017-02-061-6/+12
| | | | | | | | | | | | | | | | As per the spec - "The functions memoryBarrierShared() and groupMemoryBarrier() are available only in compute shaders; the other functions are available in all shader types." Conform to this by adding another delegate to check for compute shader support instead of only whether the current stage is compute This allows some fragment shaders in Dirt Rally to compile Cc: "17.0" <[email protected]> Reviewed-by: Anuj Phogat <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* gallium/tgsi: fix oob access in parse instructionLi Qiang2017-02-071-1/+1
| | | | | | | | | | When parsing texture instruction, it doesn't stop if the 'cur' is ',', the loop variable 'i' will also be increased and be used to index the 'inst.TexOffsets' array. This can lead an oob access issue. This patch avoid this. Reviewed-by: Dave Airlie <[email protected]> Signed-off-by: Li Qiang <[email protected]>
* Revert "i965: Disable guardband clipping in the smaller-than-viewport case."Kenneth Graunke2017-02-061-31/+0
| | | | | | | | | | | | | | | | | | | This reverts commit 0bac2551e40410e2251daf4fd9faf69310ab34ce. Now that we position the guardband correctly (applying translations in addition to scaling) and made it as large (or larger) than the render target, this shouldn't be necessary. Now we leave guardband clipping enabled 100% of the time, like the Windows driver does. Fixes GL45-CTS.gtf21.GL2FixedTests.clip.clip. It tries to draw a 16384x64 rectangle, and it appears that some kind of numerical imprecisions in the clipper result in some edge pixels going missing. The Windows driver passes this test because of guardband clipping. Cc: "17.0" <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Always scissor on Gen6-7.5 instead of disabling guardband.Kenneth Graunke2017-02-063-48/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we disabled the guardband when the viewport was smaller than the framebuffer on Gen6-7.5, to prevent portions of primitives from being draw outside of the viewport. On Gen8+, we relied on the viewport extents test to effectively scissor this away for us. We can simply always enable scissoring instead. We already include the viewport in the scissor rectangle, so this will effectively do the viewport extents test for us. (The only difference is that the scissor rectangle doesn't support sub-pixel values. I think that's okay.) Given that the viewport extents test is essentially a second scissor, and is enabled for basically all 3D drawing on Gen8+, it stands to reason that scissoring is cheap. Enabling the guardband reduces the cost of clipping, which is expensive. The Windows driver appears to never disable guardband clipping, and appears to use scissoring in this case. I don't know if they leave it on universally though. This fixes misrendering in Blender, where the "floor plane" grid lines started rendering at wrong angles after I disabled XY clipping of line primitives. Enabling the guardband seems to solve the issue. Cc: "17.0" <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99339 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Use a better guardband calculation.Jason Ekstrand2017-02-064-82/+126
| | | | | | | | | | | | | | | | | | | | | (Patch co-authored by Jason and Ken.) We scaled the guardband based on the viewport size, but failed to take into account the translation portion of the viewport transform. This meant the guardband was always centered around the origin. We want it to be centered around the screen-space drawing area, which is the intersection of the viewport and the render target. At best, getting this wrong would reduce the guardband's effectiveness in some cases. At worst, it might break things - objects outside of the guardband are trivially rejected, so getting the guardband in the wrong place and leaving guardband clipping enabled could cause problems. v2: drop clamping of positive maximums. Cc: "17.0" <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* i965: Combine the Gen6 SF and Clip viewport atoms.Kenneth Graunke2017-02-063-57/+30
| | | | | | | | | | The next patch will make the guardband calculation dependent on the transformation matrix. Instead of computing it in both atoms, just combine them into a single atom. Cc: "17.0" <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Topi Pohjolainen <[email protected]>
* radv: pass FMASK alignment to applicationDave Airlie2017-02-071-0/+1
| | | | | | | | As was done for dcc and cmask. Cc: "17.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Pass DCC alignment to application.Bas Nieuwenhuizen2017-02-071-0/+1
| | | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]>
* radv: Pass CMASK alignment to application.Bas Nieuwenhuizen2017-02-071-0/+1
| | | | | | | | | | CMASK alignment can be greater than image data alignment, so pass it to the app so that it knows what alignment to backing memory should have. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: avoid the fmask path when doing txs.Dave Airlie2017-02-061-1/+2
| | | | | | | | This fixes the vulkan samples deferredmultisampling test. Cc: "17.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* swr: [rasterizer core] Removed unused clip code.Bruce Cherniak2017-02-062-26/+0
| | | | | | Removed unused Clip() and FRUSTUM_CLIP_MASK define. Reviewed-by: Tim Rowley <[email protected]>
* swr: [rasterizer core] Remove dead code Clipper::ClipScalar()Bruce Cherniak2017-02-061-39/+0
| | | | | | | | | | | | | Clipper::ClipScalar() is dead code and should be removed. It is causing an error with gcc-7 because it references a now defunct member. v2: includes bugzilla reference, same code change Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99633 CC: "13.0 17.0" <[email protected]> Tested-by: Vinson Lee <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Tim Rowley <[email protected]>
* gallium: Remove vc4 simulator hack from loader infrastructure.Eric Anholt2017-02-062-21/+0
| | | | | | | | | | Now that there's MESA_LOADER_DRIVER_OVERRIDE for choosing the driver name we load, we don't need this any more. v2: Get the junk out of pipe_loader_drm.c, too. Reviewed-by: Emil Velikov <[email protected]> (v1) Reviewed-by: Nicolai Hähnle <[email protected]> (v2)
* loader: Add an environment variable to override driver name choice.Eric Anholt2017-02-061-0/+11
| | | | | | | | | | My vc4 simulator has been implemented so far by having an entrypoint claiming to be i965, which was a bit gross. The simulator would be a lot less special if we entered through the vc4 entrypoint like normal, so add a loader environment variable to allow the i965 fd to probe as vc4. Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* targets: Use a macro to reduce cut and paste in driver setup.Eric Anholt2017-02-061-111/+22
| | | | | | | | | | All the replicated prototypes/function bodies obfuscated the interesting logic of the file: the mapping from driver enable macros to entrypoints we expose, and the way that the swrast entrypoints are special compared to the DRM entrypoints. Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeon/ac: move common llvm build functions to a separate file.Dave Airlie2017-02-077-851/+934
| | | | | | | | | Suggested by Marek. Reviewed-by: Marek Olšák <[email protected]> Acked-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* eglmesaext: add new enums for EGL_MESA_drm_image_formatsNicolai Hähnle2017-02-061-0/+7
| | | | Reviewed-by: Eric Engestrom <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 07:56:29 +0000