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* radv: Dump command buffer on hang.Bas Nieuwenhuizen2017-01-096-9/+150
| | | | | | | | | | | | | v2: - Now use the filename specified by RADV_TRACE_FILE env var. - Use the same var to enable tracing. I thought we could as well always set the filename explicitly instead of having some arbitrary defaults, and at that point we don't need a separate feature enable. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac/debug: Move IB decode to common code.Bas Nieuwenhuizen2017-01-097-332/+420
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac/debug: Move sid_tables.h generation to common code.Bas Nieuwenhuizen2017-01-096-15/+12
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* relnotes: Claim OpenGL 4.5 rather than 4.4Jason Ekstrand2017-01-091-3/+3
| | | | Acked-by: Matt Turner <[email protected]>
* mesa: Bump the version to 17.0Jason Ekstrand2017-01-092-5/+5
| | | | Acked-by: Matt Turner <[email protected]>
* radeonsi: fix the Witcher 2 black transitionsMarek Olšák2017-01-091-2/+13
| | | | | | | | v2: do it properly Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98238 Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: set si_shader_context::input_decls for ranged decls correctlyMarek Olšák2017-01-091-1/+4
| | | | | | | | This has no effect because no code uses those members with ranged decls. Tested-by: Edmondo Tommasina <[email protected]> Acked-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: cleanly communicate whether si_shader_dump should check R600_DEBUGMarek Olšák2017-01-095-13/+15
| | | | | | Tested-by: Edmondo Tommasina <[email protected]> Acked-by: Edward O'Callaghan <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* isl: render target cube maps should be handled as 2D images, not cubesIago Toral Quiroga2017-01-091-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes layered rendering Vulkan CTS tests with cube (arrays). We also do this in the GL driver, see this code from gen8_depth_state.c for example: case GL_TEXTURE_CUBE_MAP_ARRAY: case GL_TEXTURE_CUBE_MAP: /* The PRM claims that we should use BRW_SURFACE_CUBE for this * situation, but experiments show that gl_Layer doesn't work when we do * this. So we use BRW_SURFACE_2D, since for rendering purposes this is * equivalent. */ surftype = BRW_SURFACE_2D; depth *= 6; break; So I guess we simply forgot to port this workaround to Vulkan. v2: tweak the conditions so the special case is cube texture sampling rather than anything else (Jason) Fixes: dEQP-VK.geometry.layered.cube* Reviewed-by: Jason Ekstrand <[email protected]>
* anv: don't skip the VUE header if we are reading gl_Layer in a fragment shaderIago Toral Quiroga2017-01-091-4/+16
| | | | | | | This is the same we do in the GL driver: the hardware provides gl_Layer in the VUE header, so when the fragment shader reads it we can't skip it. Reviewed-by: Jason Ekstrand <[email protected]>
* anv: enable shaderFloat64 featureSamuel Iglesias Gonsálvez2017-01-091-1/+1
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv: enable float64 feature on supported platformsSamuel Iglesias Gonsálvez2017-01-091-1/+5
| | | | | | | | v2: - Remove image_ms_array initialization (Jason) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: enable SpvCapabilityFloat64 only to supported platformsSamuel Iglesias Gonsálvez2017-01-092-1/+5
| | | | | | | | v2 (Jason): - Use nir_spirv_supported_extensions to check if the feature is enabled. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir/i965: use two slots from inputs_read for dvec3/dvec4 vertex input attributesJuan A. Suarez Romero2017-01-099-60/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far, input_reads was a bitmap tracking which vertex input locations were being used. In OpenGL, an attribute bigger than a vec4 (like a dvec3 or dvec4) consumes just one location, any other small attribute. So we mark the proper bit in inputs_read, and also the same bit in double_inputs_read if the attribute is a dvec3/dvec4. But in Vulkan, this is slightly different: a dvec3/dvec4 attribute consumes two locations, not just one. And hence two bits would be marked in inputs_read for the same vertex input attribute. To avoid handling two different situations in NIR, we just choose the latest one: in OpenGL, when creating NIR from GLSL/IR, any dvec3/dvec4 vertex input attribute is marked with two bits in the inputs_read bitmap (and also in the double_inputs_read), and following attributes are adjusted accordingly. As example, if in our GLSL/IR shader we have three attributes: layout(location = 0) vec3 attr0; layout(location = 1) dvec4 attr1; layout(location = 2) dvec3 attr2; then in our NIR shader we put attr0 in location 0, attr1 in locations 1 and 2, and attr2 in location 3 and 4. Checking carefully, basically we are using slots rather than locations in NIR. When emitting the vertices, we do a inverse map to know the corresponding location for each slot. v2 (Jason): - use two slots from inputs_read for dvec3/dvec4 NIR from GLSL/IR. v3 (Jason): - Fix commit log error. - Use ladder ifs and fix braces. - elements_double is divisible by 2, don't need DIV_ROUND_UP(). - Use if ladder instead of a switch. - Add comment about hardware restriction in 64bit vertex attributes. Reviewed-by: Jason Ekstrand <[email protected]>
* isl: fix VA64 support for double and dvecN vertex attributesSamuel Iglesias Gonsálvez2017-01-092-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | We use *64*_PASSTHRU formats to upload vertex attributes of 64 bits to avoid conversions. From the BDW PRM, Volume 2d, page 586 (VERTEX_ELEMENT_STATE): "When SourceElementFormat is set to one of the *64*_PASSTHRU formats, 64-bit components are stored in the URB without any conversion. In this case, vertex elements must be written as 128 or 256 bits, with VFCOMP_STORE_0 being used to pad the output as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red component into the URB, Component 1 must be specified as VFCOMP_STORE_0 (with Components 2,3 set to VFCOMP_NOSTORE) in order to output a 128-bit vertex element, or Components 1-3 must be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex element. Likewise, use of R64G64B64_PASSTHRU requires Component 3 to be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex element." v2,v3 (Jason): - Don't delete unused formats. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline: get map for double input attributesJuan A. Suarez Romero2017-01-091-0/+1
| | | | Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add support for doubles to OpSpecConstantSamuel Iglesias Gonsálvez2017-01-095-8/+55
| | | | | | | | | v2 (Jason): - Fix indent in radv change - Add vtn_u64_literal() helper to take 64 bits (Jason) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv/nir: add (un)packDouble2x32() translationSamuel Iglesias Gonsálvez2017-01-091-0/+2
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv/nir: implement DF conversionsSamuel Iglesias Gonsálvez2017-01-093-13/+23
| | | | | | | | SPIR-V does not have special opcodes for DF conversions. We need to identify them by checking the bit size of the operand and the result. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: add nir_type_conversion_op()Samuel Iglesias Gonsálvez2017-01-092-0/+83
| | | | | | | | | | | | | | This function returns the nir_op corresponding to the conversion between the given nir_alu_type arguments. This function lacks support for integer-based types with bit_size != 32 and for float16 conversion ops. v2: - Improve readiness of the code and delete cases that don't happen now (Jason) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: add nir_get_nir_type_for_glsl_type()Samuel Iglesias Gonsálvez2017-01-091-0/+24
| | | | | | | | | | | v2 (Jason): - Refactor nir_get_nir_type_for_glsl_type() to avoid using unneeded helpers (Jason) v3: - Use return directly (Jason) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add support for doubles on OpComposite{Insert,Extract}Samuel Iglesias Gonsálvez2017-01-091-0/+1
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: Enable double floating points when copying variables in ↵Samuel Iglesias Gonsálvez2017-01-091-0/+1
| | | | | | | _vtn_variable_copy() Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add double support to _vtn_block_load_store()Samuel Iglesias Gonsálvez2017-01-091-0/+1
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add double support to _vtn_variable_load_storeSamuel Iglesias Gonsálvez2017-01-091-0/+1
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add double support to SpvOpCompositeExtractSamuel Iglesias Gonsálvez2017-01-091-2/+14
| | | | | | | | v2 (Jason): - Add asserts. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: fix SpvOpSpecConstantOp with SpvOpVectorShuffle working with ↵Samuel Iglesias Gonsálvez2017-01-091-12/+40
| | | | | | | | | | | | | | | | | double-based vecs We need to pick two 32-bit values per component to perform the right shuffle operation. v2 (Jason): - Add assert to check matching bit sizes (Jason) - Simplify the code to pick components (Jason) v3: - Switch on bit_size once (Jason) - Add comment to explain the constant value for unused components (Erik) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add DF support to SpvOp*ConstantCompositeSamuel Iglesias Gonsálvez2017-01-091-3/+11
| | | | | | | | v2 (Jason): - Add assert. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add DF support to vtn_const_ssa_value()Samuel Iglesias Gonsálvez2017-01-091-3/+5
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add support for loading DF constantsSamuel Iglesias Gonsálvez2017-01-091-2/+10
| | | | | | | | v2 (Jason): - Add assert. Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: add definition of double based data typesSamuel Iglesias Gonsálvez2017-01-091-2/+4
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* spirv: fix typo in spec_constant_decoration_cb()Samuel Iglesias Gonsálvez2017-01-091-2/+2
| | | | | Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* radv: drop unused fields in physical device.Dave Airlie2017-01-091-6/+0
| | | | Signed-off-by: Dave Airlie <[email protected]>
* i965: call intel_prepare_render always when reading pixelsTapani Pälli2017-01-091-6/+6
| | | | | | | | | | | | | | Currently we do this only in the fallback code (when tiled memcpy version failed) but it needs to be done always so that we have correct read and write buffer in place. No regressions seen in CI. Fixes: dEQP-EGL.functional.buffer_age.* Signed-off-by: Tapani Pälli <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98330 Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* st/mesa: pass gl_program to st_bind_ubos()Timothy Arceri2017-01-091-18/+18
| | | | | | We no longer need anything from gl_linked_shader. Reviewed-by: Eric Anholt <[email protected]>
* st/mesa: pass gl_program to st_bind_images()Timothy Arceri2017-01-091-24/+22
| | | | | | We no longer need anything from gl_linked_shader. Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: stop passing gl_linked_shader to set_affected_state_flags()Timothy Arceri2017-01-091-7/+6
| | | | | | We now get everything we need from the gl_program param. Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa/glsl: set num_images directly in shader_infoTimothy Arceri2017-01-096-20/+13
| | | | | | This change also removes the now duplicate NumImages field. Reviewed-by: Nicolai Hähnle <[email protected]>
* st/mesa: pass gl_program to st_bind_ssbos()Timothy Arceri2017-01-091-21/+21
| | | | | | We no longer need to pass gl_shader_program. Reviewed-by: Nicolai Hähnle <[email protected]>
* nir: add another comparison simplificationTimothy Arceri2017-01-091-0/+2
| | | | | | | | | | | | | | | | On BDW: total instructions in shared programs: 13061877 -> 13060965 (-0.01%) instructions in affected programs: 133569 -> 132657 (-0.68%) helped: 566 HURT: 0 total cycles in shared programs: 256611784 -> 256599536 (-0.00%) cycles in affected programs: 861016 -> 848768 (-1.42%) helped: 379 HURT: 73 Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Turn bcsel of +/- 1.0 and 0.0 into b2f sequences.Kenneth Graunke2017-01-091-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On BDW: total instructions in shared programs: 13074882 -> 13068703 (-0.05%) instructions in affected programs: 1823116 -> 1816937 (-0.34%) helped: 4187 HURT: 537 total cycles in shared programs: 256622718 -> 256425382 (-0.08%) cycles in affected programs: 123790120 -> 123592784 (-0.16%) helped: 3823 HURT: 2037 total spills in shared programs: 15276 -> 14929 (-2.27%) spills in affected programs: 9446 -> 9099 (-3.67%) helped: 352 HURT: 1 total fills in shared programs: 20496 -> 20144 (-1.72%) fills in affected programs: 13040 -> 12688 (-2.70%) helped: 352 HURT: 1 LOST: 2 GAINED: 21 v2: Rely on 'a' being a well-formed boolean (Connor, Eric). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* nir: Convert ineg(b2i(a)) to a if it's a boolean.Kenneth Graunke2017-01-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On BDW: total instructions in shared programs: 13071119 -> 13070371 (-0.01%) instructions in affected programs: 83424 -> 82676 (-0.90%) helped: 505 HURT: 45 (all TCS, all hurt by a single instruction) total cycles in shared programs: 256601322 -> 256588932 (-0.00%) cycles in affected programs: 819410 -> 807020 (-1.51%) helped: 450 HURT: 57 total loops in shared programs: 2950 -> 2942 (-0.27%) loops in affected programs: 8 -> 0 helped: 7 HURT: 0 v2: Drop unnecessary 'a@bool' annotation (Connor, Eric). Add a comment explaining the rule (Ian). Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ian Romanick <[email protected]> [v1] Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* i965: Move TES input VUE map calculation out a layer.Kenneth Graunke2017-01-073-9/+11
| | | | | | | | | | | In Vulkan, we'll compile the TCS and TES at the same time, so I can just pass the TCS output VUE map to brw_compile_tes as the TES input VUE map. So, we only need to do this in GL. Move it to the GL-specific layer. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Pass NULL for gl_program when compiling TES.Kenneth Graunke2017-01-071-1/+1
| | | | | | | | This isn't needed, and Vulkan doesn't have one. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Move TES spacing/domain/topology setup to brw_compile_tes().Kenneth Graunke2017-01-072-33/+34
| | | | | | | | Moving this down a layer lets us share code between Vulkan and GL. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* i965: Access TES shader info via NIR.Kenneth Graunke2017-01-071-6/+6
| | | | | | | | NIR exists in both GL and Vulkan, but gl_program is GL specific. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* mesa: Introduce a compiler enum for tessellation spacing.Kenneth Graunke2017-01-0711-47/+54
| | | | | | | | | | It feels weird using GL_* enums in a Vulkan driver. v2: Fix the TESS_SPACING -> PIPE_TESS_SPACING conversion. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* compiler: Change shader_info->tes.vertex_order into a ccw boolean.Kenneth Graunke2017-01-074-13/+7
| | | | | | | | | | The vertex order is either clockwise or counterclockwise. We can just store a "ccw" boolean rather than GLenum values. I don't want to use GLenums in a Vulkan driver, and even in GL a simple boolean works fine. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* anv/pipeline: Call NIR passes using NIR_PASS_VJason Ekstrand2017-01-071-31/+15
| | | | | | This lets us get validation without having to do it manually. Reviewed-by: Timothy Arceri <[email protected]>
* anv/pipeline: Only call remove_dead_variables onceJason Ekstrand2017-01-071-3/+3
| | | | | | | It can handle multiple modes at a time now so there's no reason to call it repeatedly. Reviewed-by: Timothy Arceri <[email protected]>
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