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* r5xx: Add emit_mad() for FP.Corbin Simpson2008-05-251-2/+65
| | | | | If it uses MAD, emit it with emit_mad()! (Now available at your local grocer's. Multiply and add responsibly.)
* r5xx: Consolidate FP tex insts.Corbin Simpson2008-05-241-15/+5
| | | | They're all the same, really.
* r5xx: Fix SGE/SLT.Corbin Simpson2008-05-241-32/+64
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* r5xx: Remove some debugging cruft.Corbin Simpson2008-05-241-4/+1
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* r500: missed a couple of inst4s.Dave Airlie2008-05-241-2/+1
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* r500: add depth output writeDave Airlie2008-05-241-33/+36
| | | | Not sure how well this works yet, but we need to set the alpha to w_omask
* r5xx: Clean up some compiler warnings.Corbin Simpson2008-05-231-1/+1
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* r5xx: Move dumb_shader.Corbin Simpson2008-05-231-77/+75
| | | | Was getting ticked having to scroll around it, lawl.
* r5xx: Add OPCODE_DST.Corbin Simpson2008-05-231-1/+28
| | | | Works completely, swizzles and everything.
* r5xx: More trig work.Corbin Simpson2008-05-231-29/+107
| | | | SCS now works. COS/SIN have slight issues still.
* r500: bump state atom size up for fp and fp constantsDave Airlie2008-05-222-2/+6
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* r5xx: Fixed LRP.Corbin Simpson2008-05-211-8/+12
| | | | Works perfectly. It's a complex one, though, so it might fail in weird ways...
* r5xx: Change debug info for readability.Corbin Simpson2008-05-211-1/+1
| | | | It's weird seeing the compiled program before the assembly, that's all.
* r5xx: Initial (broken) OPCODE_LRP.Corbin Simpson2008-05-211-0/+43
| | | | Will compile, run, and not eat your kids, but the math is wrong.
* r5xx: Add OPCODE_POW.Corbin Simpson2008-05-211-0/+47
| | | | Necessary for Google Earth, among other things.
* r500: print out opcode stringDave Airlie2008-05-211-1/+1
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* r500: set the RS unit register for R500 not R300 dangnammit..Dave Airlie2008-05-211-3/+3
| | | | | | So this appears to be my BUG. damn it to hell. also fix sec color to be more like spec says.
* r500: finish main texture instruction decodingDave Airlie2008-05-211-3/+28
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* r5xx: Count refs so we don't have to guess on temp reg allocation.Corbin Simpson2008-05-201-10/+25
| | | | As a bonus, we can now have multiple temp temps, by slot.
* r5xx: Fixup SOP insts.Corbin Simpson2008-05-191-4/+4
| | | | Use the correct swizzle for alpha/SOP stuff.
* r5xx: New fix for COS/SIN/SCS.Corbin Simpson2008-05-191-23/+22
| | | | Not perfect yet, but getting better.
* r300/r500: fixup some of the register write sizesDave Airlie2008-05-201-6/+7
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* r300: some ctrl-m's wierd.Dave Airlie2008-05-201-20/+20
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* r300/r500: fix RS col fmt bitsDave Airlie2008-05-201-2/+2
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* r5xx: Fixup emit_tex, add debugging info, enable temp temps.Corbin Simpson2008-05-191-65/+105
| | | | | emit_tex now chases itself with an OUT if needed. Added airlied's dump_program, with some fixes.
* r500: add more input srcsDave Airlie2008-05-191-16/+26
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* r500: fix swz gets and some returnsDave Airlie2008-05-191-6/+7
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* r500: add mask debuggingDave Airlie2008-05-191-1/+26
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* r500: add fragment program debug dumperDave Airlie2008-05-191-0/+145
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* r5xx: Fix magic offsets for output fifo write masks.Corbin Simpson2008-05-191-2/+2
| | | | Well, this sure explains a lot.
* r5xx: Swap sources for CMP.Corbin Simpson2008-05-181-8/+13
| | | | Follows the same pattern as the op on r3xx/r4xx. Thanks airlied.
* r5xx: Fix typo of epic proportions.Corbin Simpson2008-05-181-1/+1
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* r5xx: ALU/OUT fixups.Corbin Simpson2008-05-181-56/+43
| | | | Lots of small changes. Intentionally breaks some tex stuffs.
* r300: fixup US_OUT_FMT bitsDave Airlie2008-05-181-5/+9
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* r500: you can have a single texcoordDave Airlie2008-05-181-2/+5
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* r5xx: Add OPCODE_KIL.Corbin Simpson2008-05-171-0/+6
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* r5xx: Added OPCODE_DPH.Corbin Simpson2008-05-171-0/+20
| | | | Like DP4, but with one swizzle change.
* r5xx: Fix FRC.Corbin Simpson2008-05-171-0/+2
| | | | | This makes tri-frc work. (Remind me again why I'm allowed near a compiler, lawl.)
* r5xx: Fix SCS.Corbin Simpson2008-05-171-11/+21
| | | | | Output instructions need to be marked OUT so they can write to the fifo. Also, negation doesn't work with SWZ yet.
* r5xx: Add OPCODE_SWZ.Corbin Simpson2008-05-171-0/+4
| | | | It's so easy!
* r5xx: Add OPCODE_SCS.Corbin Simpson2008-05-171-1/+51
| | | | It's disabled, though, because it doesn't work. I'll figure it out later...
* r5xx: Adding more opcodes.Corbin Simpson2008-05-171-0/+82
| | | | | | EX2, FRC, LG2, SIN, RCP, and RSQ, if you care. All of these except FRC are like COS. This pretty much rounds out the set of opcodes which can be done in one ALU inst.
* r5xx: First swing at OPCODE_COS.Corbin Simpson2008-05-171-0/+14
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* r5xx: Unbreak MAX and MIN.Corbin Simpson2008-05-171-2/+2
| | | | Both of them had faulty copypasta.
* r500: set fragprog end to correct placeDave Airlie2008-05-171-3/+4
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* r300: SC register naming cleanupAlex Deucher2008-05-172-31/+37
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* r500: write out the correct FP registersAlex Deucher2008-05-176-6/+43
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* r500: default rsunit swizzle like fglrxDave Airlie2008-05-152-3/+14
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* r500: shift tex src properlyDave Airlie2008-05-151-2/+2
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* r500: fixup r500 rs unit texture coordinate countingDave Airlie2008-05-151-13/+15
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