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* r600: lds load cleanups.Dave Airlie2017-11-291-6/+8
* r600_shader: only load from LDS what is really usedGert Wollny2017-11-291-7/+26
* r600/sb: handle jump after target to end of program. (v2)Dave Airlie2017-11-291-0/+5
* i965: Change a ret == -1 check to ret != 0.Kenneth Graunke2017-11-281-1/+1
* i965: Use C99 struct initializers in brw_bufmgr.c.Kenneth Graunke2017-11-281-91/+49
* i965: Move perf_debug and WARN_ONCE back to brw_context.h.Kenneth Graunke2017-11-282-29/+29
* i965: const a few structs and vars to avoid writing to them by accidentEric Engestrom2017-11-281-4/+4
* i965: Fix Smooth Point Enables.Kenneth Graunke2017-11-281-1/+1
* meson: build virgl driverDylan Baker2017-11-286-6/+114
* meson: build svga driver on linuxDylan Baker2017-11-285-3/+146
* meson: build r600 driverDylan Baker2017-11-286-11/+155
* meson: build r300 driverDylan Baker2017-11-284-7/+176
* meson: build i915g driverDylan Baker2017-11-285-4/+116
* svga: move svga_is_format_supported() to svga_format.cBrian Paul2017-11-283-121/+129
* svga: s/unsigned/SVGA3dDevCapIndex/Brian Paul2017-11-281-3/+6
* i965: perf: add support for CoffeeLake GT3Lionel Landwerlin2017-11-285-2/+10712
* i965: perf: add support for CoffeeLake GT2Lionel Landwerlin2017-11-285-2/+10484
* i965: perf: add busyness metric sets on gen8/9 platformsLionel Landwerlin2017-11-287-0/+1231
* i965: fix time elapsed counter equations in VME/Media configsLionel Landwerlin2017-11-286-12/+12
* i965: perf: update counter names on gen8/9 platformsLionel Landwerlin2017-11-288-116/+116
* i965: add a debug option to disable oa config loadingLionel Landwerlin2017-11-283-2/+4
* i965: perf: add support for userspace configurationsLionel Landwerlin2017-11-281-8/+101
* i965: perf: update configs for loading from userspaceLionel Landwerlin2017-11-2810-0/+243
* util: add mesa-sha1 test to mesonEric Engestrom2017-11-281-0/+9
* compiler: fix typoEric Engestrom2017-11-281-1/+1
* compiler: use NDEBUG to guard assertsEric Engestrom2017-11-283-6/+6
* broadcom: use NDEBUG to guard assertsEric Engestrom2017-11-281-5/+5
* vc4: check preprocessor token existence using #ifdef instead of #ifEric Engestrom2017-11-281-3/+3
* docs/llvmpipe.html: Minor editsBen Crocker2017-11-281-7/+7
* st/dri: replace hard-coded array size with ARRAY_SIZE()Eric Engestrom2017-11-281-1/+1
* radeonsi/gfx9: simplify condition for on-chip ESGSNicolai Hähnle2017-11-281-3/+1
* radeonsi: clarify that si_shader_selector::esgs_itemsize is set for the ES partNicolai Hähnle2017-11-281-1/+3
* radeonsi: use si_shader_context instead of lp_build_context in more placesNicolai Hähnle2017-11-281-27/+23
* radeonsi: cleanup si_initialize_color_surfaceNicolai Hähnle2017-11-281-12/+12
* radeonsi: avoid attempting to create CMASK if the tiling mode doesn't have itNicolai Hähnle2017-11-281-0/+2
* radeonsi: check that we don't leak fine.buf referencesNicolai Hähnle2017-11-281-0/+2
* ac/surface: fix indentationNicolai Hähnle2017-11-281-1/+1
* amd/common: sid.h cleanupsNicolai Hähnle2017-11-283-20/+38
* st_glsl_to_tgsi: check for the tail sentinel in merge_two_dstsNicolai Hähnle2017-11-281-3/+3
* mesa/gles: adjust internal format in glTexSubImage2D error checksTapani Pälli2017-11-281-1/+55
* radv: Use the suffixed versions of VK_QUEUE_GLOBAL_PRIORITY_*Jason Ekstrand2017-11-271-4/+4
* vulkan: Update the XML and headers to 1.0.66Jason Ekstrand2017-11-272-24/+116
* intel/blorp: Drop blorp_resolve_ccs_attachmentJason Ekstrand2017-11-272-61/+20
* anv: Let blorp handle indirect clear colors for CCS resolvesJason Ekstrand2017-11-273-67/+20
* anv: Move get_fast_clear_state_address into anv_private.hJason Ekstrand2017-11-272-50/+33
* intel/blorp: Take a range of layers in blorp_ccs_resolveJason Ekstrand2017-11-273-4/+8
* intel/blorp: Add initial support for indirect clear colorsJason Ekstrand2017-11-276-0/+109
* i965/blorp: Use a designated initializer for blorp_surfJason Ekstrand2017-11-271-8/+9
* intel/blorp: Add fast-clear to the special case in MSAA resolvesJason Ekstrand2017-11-271-2/+9
* intel/blorp/blit: Rename blorp_nir_txf_ms_mcsJason Ekstrand2017-11-271-4/+5
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